Revision 006f3a48
b/hw/ppc_newworld.c | ||
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32 | 32 |
#include "net.h" |
33 | 33 |
#include "sysemu.h" |
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#include "boards.h" |
35 |
#include "fw_cfg.h" |
|
35 | 36 |
#include "escc.h" |
36 | 37 |
|
37 | 38 |
#define MAX_IDE_BUS 2 |
38 | 39 |
#define VGA_BIOS_SIZE 65536 |
40 |
#define CFG_ADDR 0xf0000510 |
|
39 | 41 |
|
40 | 42 |
/* debug UniNorth */ |
41 | 43 |
//#define DEBUG_UNIN |
... | ... | |
103 | 105 |
int ppc_boot_device; |
104 | 106 |
int index; |
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BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
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void *fw_cfg; |
|
106 | 109 |
void *dbdma; |
107 | 110 |
|
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linux_boot = (kernel_filename != NULL); |
... | ... | |
135 | 138 |
/* allocate and load BIOS */ |
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bios_offset = qemu_ram_alloc(BIOS_SIZE); |
137 | 140 |
if (bios_name == NULL) |
138 |
bios_name = BIOS_FILENAME;
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|
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bios_name = PROM_FILENAME;
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|
139 | 142 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
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bios_size = load_image(buf, phys_ram_base + bios_offset); |
|
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cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM); |
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144 |
|
|
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/* Load OpenBIOS (ELF) */ |
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bios_size = load_elf(buf, 0, NULL, NULL, NULL); |
|
141 | 147 |
if (bios_size < 0 || bios_size > BIOS_SIZE) { |
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cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf); |
143 | 149 |
exit(1); |
144 | 150 |
} |
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bios_size = (bios_size + 0xfff) & ~0xfff; |
|
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if (bios_size > 0x00080000) { |
|
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/* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */ |
|
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cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n"); |
|
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} |
|
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cpu_register_physical_memory((uint32_t)(-bios_size), |
|
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bios_size, bios_offset | IO_MEM_ROM); |
|
152 | 151 |
|
153 | 152 |
/* allocate and load VGA BIOS */ |
154 | 153 |
vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
... | ... | |
337 | 336 |
graphic_width, graphic_height, graphic_depth); |
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/* No PCI init: the BIOS will do it */ |
339 | 338 |
|
340 |
/* Special port to get debug messages from Open-Firmware */ |
|
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register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); |
|
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fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
|
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fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); |
|
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fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
|
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fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99); |
|
342 | 343 |
} |
343 | 344 |
|
344 | 345 |
QEMUMachine core99_machine = { |
b/pc-bios/README | ||
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42 | 42 |
firmware implementation. The goal is to implement a 100% IEEE |
43 | 43 |
1275-1994 (referred to as Open Firmware) compliant firmware. |
44 | 44 |
The included Sparc32 and Sparc64 images are built from SVN revision 395. |
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The included PowerPC image is built from SVN revision 418.
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|
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The included PowerPC image is built from SVN revision 450.
|
|
46 | 46 |
|
47 | 47 |
- The PXE roms come from Rom-o-Matic etherboot 5.4.2. |
48 | 48 |
pcnet32:pcnet32 -- [0x1022,0x2000] |
b/qemu-doc.texi | ||
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2433 | 2433 |
|
2434 | 2434 |
@itemize @minus |
2435 | 2435 |
@item |
2436 |
UniNorth PCI Bridge |
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2436 |
UniNorth or Grackle PCI Bridge
|
|
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@item |
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PCI VGA compatible card with VESA Bochs Extensions |
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@item |
... | ... | |
2471 | 2471 |
@url{http://perso.magic.fr/l_indien/OpenHackWare/index.htm}. |
2472 | 2472 |
|
2473 | 2473 |
Since version 0.9.1, QEMU uses OpenBIOS @url{http://www.openbios.org/} |
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for the g3beige PowerMac machine. OpenBIOS is a free (GPL v2) portable
|
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2475 |
firmware implementation. The goal is to implement a 100% IEEE
|
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1275-1994 (referred to as Open Firmware) compliant firmware. |
|
2474 |
for the g3beige and mac99 PowerMac machines. OpenBIOS is a free (GPL
|
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v2) portable firmware implementation. The goal is to implement a 100%
|
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2476 |
IEEE 1275-1994 (referred to as Open Firmware) compliant firmware.
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2477 | 2477 |
|
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@c man begin OPTIONS |
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|
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