History | View | Annotate | Download (33.3 kB)
gt64xxx: remove savevm support
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
gt64xxx: set isa_mem_base during registration
isa_mem_base is computed from registers during reset, but due to QEMUlimitations some devices (e.g. VGA card) need to know it earlier whenthey are registered.
Workaround this by setting the value during registration instead of...
gt64xxx: qdev conversion
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
isa_mmio: Always use little endian
This patch converts the ISA MMIO bridge code to always use little endian mmio.All bswap code that existed was only there to convert from native cpuendianness to little endian ISA devices.
Signed-off-by: Alexander Graf <agraf@suse.de>...
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
pci: use PCI_DEVFN() where appropriate.
Use PCI_DEVFN() and PCI_FUNC_MAX where appropriate.This patch make it clear that func = 0.
test:The following object files with/without this patch are stripped and compared.They remains same. arm-softmmu/versatile_pci.o...
savevm: Add DeviceState param
When available, we'd like to be able to access the DeviceStatewhen registering a savevm. For buses with a get_dev_path()function, this will allow us to create more unique savevmid strings.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>...
Fix hw/gt64xxx.c compilation with DEBUG defined
Use TARGET_FMT_plx as format placeholder for target_phys_addr_t
Signed-off-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Compile isa_mmio only once
Push TARGET_WORDS_BIGENDIAN dependency to board level.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Do not use dprintf
dprintf is already claimed by POSIX1, and on at least one systemis implemented as a macro
[1] http://www.opengroup.org/onlinepubs/9699919799/functions/dprintf.html
Signed-off-by: malc <av1474@comtv.ru>
gt64xxx: remove gt64120_{read, write}_config().
They call only pci_default_{read, write}_config().So they aren't necessary.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
pci_host.h: move functions in pci_host.h into .c file.
split static functions in pci_host.h into pci_host.c andpci_host_template.h.Later a structures declared in pci_host.h, PCIHostState, will be used.However pci_host.h doesn't allow to include itself easily. This patches...
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
We want the argument pass to set_irq to be opaque
piix_pci want to pass more things that the pic
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make CPURead/WriteFunc structure 'const'
Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internalio regions (ROM, unassigned, notdirty). Remove the parameter to reducethe API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Add common BusState
Implement and use a common device bus state. The main side-effect isthat creating a bus and attaching it to a parent device are no longerseparate operations. For legacy code we allow a NULL parent, but thatshould go away eventually....
Add and use remaining #defines for PCI device IDs (Stuart Brady)
This patch adds and uses #defines for the remaining hardcoded PCIdevice IDs. It also moves definitions taken from linux/pci_ids.hinto a separate header (hw/pci_ids.h), removes the 'RTL' from...
Add and use #defines for PCI device classes
This patch adds and uses #defines for PCI device classes and subclases,using a new pci_config_set_class() function, similar to the recentlyadded pci_config_set_vendor_id() and pci_config_set_device_id().
Change since v1: fixed compilation of hw/sun4u.c...
Define PCI vendor and device IDs in pci.h (Stuart Brady)
This patch defines PCI vendor and device IDs in pci.h (matching thosefrom Linux's pci_ids.h), and uses those definitions where appropriate.
Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id()...
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
GT64XXX: fix endianness issues:
- Byte swapping for internal GT64XXX registers is controlled by the bit 12 of the Configuration Register and not by the PCI Internal Command register.- The bit 0 of the PCI Internal Command register controls byte swapping...
Add statics and missing #includes for prototypes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3683 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
removed warning
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
Check the Galilleo config register instead of hardcoding the endianness.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3417 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Remove superfluous gt64xxx_pci_mapping calls.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3064 c046a42c-6fe2-441c-8c8c-71466251a162
Impement Galilleo ISD register.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3061 c046a42c-6fe2-441c-8c8c-71466251a162
Revert the Gallileo PCI mapping patch, it conflicts with the supposedly"generic" PC-style implementation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2981 c046a42c-6fe2-441c-8c8c-71466251a162
More PCI mapping/remapping for Gallileo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2972 c046a42c-6fe2-441c-8c8c-71466251a162
Unbreak PCI config register, noticed by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2957 c046a42c-6fe2-441c-8c8c-71466251a162
Initialize more GT64xxx registers on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2956 c046a42c-6fe2-441c-8c8c-71466251a162
Fix some Malta PCI config bits.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2955 c046a42c-6fe2-441c-8c8c-71466251a162
PCI device saving for GT64xxx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2954 c046a42c-6fe2-441c-8c8c-71466251a162
Implement some more Gallileo registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2953 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PCI irq mapping on Malta.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2951 c046a42c-6fe2-441c-8c8c-71466251a162
Gallileo fixes, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2670 c046a42c-6fe2-441c-8c8c-71466251a162
Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
A VGA card for the Malta board.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2494 c046a42c-6fe2-441c-8c8c-71466251a162
Fix GT-64xxx PCI mapping, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2471 c046a42c-6fe2-441c-8c8c-71466251a162
Fix GT64120 mapping with REDBOOT, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2366 c046a42c-6fe2-441c-8c8c-71466251a162
Reworking MIPS interrupt handling, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
Big endian support for Gallileo, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2330 c046a42c-6fe2-441c-8c8c-71466251a162
Gallileo GT64xxx support, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2318 c046a42c-6fe2-441c-8c8c-71466251a162