Revision 01d6a890
| b/target-arm/exec.h | ||
|---|---|---|
| 19 | 19 |
*/ |
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#include "dyngen-exec.h" |
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|
| 22 |
#if defined(__sparc__) |
|
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struct CPUARMState *env; |
|
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uint32_t T0; |
|
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uint32_t T1; |
|
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uint32_t T2; |
|
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#else |
|
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register struct CPUARMState *env asm(AREG0); |
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register uint32_t T0 asm(AREG1); |
| 24 | 30 |
register uint32_t T1 asm(AREG2); |
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register uint32_t T2 asm(AREG3); |
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#endif |
|
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|
| 27 | 34 |
/* TODO: Put these in FP regs on targets that have such things. */ |
| 28 | 35 |
/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ |
| b/target-mips/exec.h | ||
|---|---|---|
| 7 | 7 |
#include "mips-defs.h" |
| 8 | 8 |
#include "dyngen-exec.h" |
| 9 | 9 |
|
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#if defined(__sparc__) |
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struct CPUMIPSState *env; |
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#else |
|
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register struct CPUMIPSState *env asm(AREG0); |
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#endif |
|
| 11 | 15 |
|
| 12 | 16 |
#if defined (USE_64BITS_REGS) |
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typedef int64_t host_int_t; |
| ... | ... | |
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typedef uint32_t host_uint_t; |
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#endif |
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|
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#if defined(__sparc__) |
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host_uint_t T0; |
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host_uint_t T1; |
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host_uint_t T2; |
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#else |
|
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#if TARGET_LONG_BITS > HOST_LONG_BITS |
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#define T0 (env->t0) |
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#define T1 (env->t1) |
| ... | ... | |
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register host_uint_t T1 asm(AREG2); |
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register host_uint_t T2 asm(AREG3); |
| 28 | 37 |
#endif |
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#endif |
|
| 29 | 39 |
|
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#if defined (USE_HOST_FLOAT_REGS) |
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#error "implement me." |
| b/target-sparc/exec.h | ||
|---|---|---|
| 3 | 3 |
#include "dyngen-exec.h" |
| 4 | 4 |
#include "config.h" |
| 5 | 5 |
|
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#if defined(__sparc__) |
|
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struct CPUSPARCState *env; |
|
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#else |
|
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register struct CPUSPARCState *env asm(AREG0); |
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#endif |
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|
|
| 7 | 12 |
#ifdef TARGET_SPARC64 |
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#define T0 (env->t0) |
| 9 | 14 |
#define T1 (env->t1) |
| 10 | 15 |
#define T2 (env->t2) |
| 11 | 16 |
#define REGWPTR env->regwptr |
| 12 | 17 |
#else |
| 18 |
#if defined(__sparc__) |
|
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register uint32_t T0 asm(AREG3); |
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register uint32_t T1 asm(AREG2); |
|
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#else |
|
| 13 | 22 |
register uint32_t T0 asm(AREG1); |
| 14 | 23 |
register uint32_t T1 asm(AREG2); |
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#endif |
|
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|
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#undef REG_REGWPTR // Broken |
| 17 | 27 |
#ifdef REG_REGWPTR |
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#if defined(__sparc__) |
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register uint32_t *REGWPTR asm(AREG4); |
|
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#else |
|
| 18 | 31 |
register uint32_t *REGWPTR asm(AREG3); |
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#endif |
|
| 19 | 33 |
#define reg_REGWPTR |
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|
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#ifdef AREG4 |
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#if defined(__sparc__) |
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register uint32_t T2 asm(AREG0); |
|
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#else |
|
| 22 | 39 |
register uint32_t T2 asm(AREG4); |
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#endif |
|
| 23 | 41 |
#define reg_T2 |
| 24 | 42 |
#else |
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#define T2 (env->t2) |
| ... | ... | |
| 27 | 45 |
|
| 28 | 46 |
#else |
| 29 | 47 |
#define REGWPTR env->regwptr |
| 48 |
#if defined(__sparc__) |
|
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register uint32_t T2 asm(AREG0); |
|
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#else |
|
| 30 | 51 |
register uint32_t T2 asm(AREG3); |
| 52 |
#endif |
|
| 31 | 53 |
#define reg_T2 |
| 32 | 54 |
#endif |
| 33 | 55 |
#endif |
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