Revision 0208def1 hw/pci_bridge.c

b/hw/pci_bridge.c
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    }
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}
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void pci_bridge_disable_base_limit(PCIDevice *dev)
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{
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    uint8_t *conf = dev->config;
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    pci_byte_test_and_set_mask(conf + PCI_IO_BASE,
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                               PCI_IO_RANGE_MASK & 0xff);
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    pci_byte_test_and_clear_mask(conf + PCI_IO_LIMIT,
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                                 PCI_IO_RANGE_MASK & 0xff);
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    pci_word_test_and_set_mask(conf + PCI_MEMORY_BASE,
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                               PCI_MEMORY_RANGE_MASK & 0xffff);
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    pci_word_test_and_clear_mask(conf + PCI_MEMORY_LIMIT,
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                                 PCI_MEMORY_RANGE_MASK & 0xffff);
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    pci_word_test_and_set_mask(conf + PCI_PREF_MEMORY_BASE,
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                               PCI_PREF_RANGE_MASK & 0xffff);
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    pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT,
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                                 PCI_PREF_RANGE_MASK & 0xffff);
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    pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0);
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    pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0);
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}
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/* reset bridge specific configuration registers */
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void pci_bridge_reset_reg(PCIDevice *dev)
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{
......
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    conf[PCI_SUBORDINATE_BUS] = 0;
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    conf[PCI_SEC_LATENCY_TIMER] = 0;
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    conf[PCI_IO_BASE] = 0;
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    conf[PCI_IO_LIMIT] = 0;
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    pci_set_word(conf + PCI_MEMORY_BASE, 0);
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    pci_set_word(conf + PCI_MEMORY_LIMIT, 0);
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    pci_set_word(conf + PCI_PREF_MEMORY_BASE, 0);
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    pci_set_word(conf + PCI_PREF_MEMORY_LIMIT, 0);
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    /*
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     * the default values for base/limit registers aren't specified
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     * in the PCI-to-PCI-bridge spec. So we don't thouch them here.
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     * Each implementation can override it.
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     * typical implementation does
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     * zero base/limit registers or
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     * disable forwarding: pci_bridge_disable_base_limit()
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     * If disable forwarding is wanted, call pci_bridge_disable_base_limit()
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     * after this function.
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     */
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    pci_byte_test_and_clear_mask(conf + PCI_IO_BASE,
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                                 PCI_IO_RANGE_MASK & 0xff);
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    pci_byte_test_and_clear_mask(conf + PCI_IO_LIMIT,
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                                 PCI_IO_RANGE_MASK & 0xff);
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    pci_word_test_and_clear_mask(conf + PCI_MEMORY_BASE,
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                                 PCI_MEMORY_RANGE_MASK & 0xffff);
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    pci_word_test_and_clear_mask(conf + PCI_MEMORY_LIMIT,
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                                 PCI_MEMORY_RANGE_MASK & 0xffff);
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    pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_BASE,
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                                 PCI_PREF_RANGE_MASK & 0xffff);
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    pci_word_test_and_clear_mask(conf + PCI_PREF_MEMORY_LIMIT,
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                                 PCI_PREF_RANGE_MASK & 0xffff);
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    pci_set_word(conf + PCI_PREF_BASE_UPPER32, 0);
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    pci_set_word(conf + PCI_PREF_LIMIT_UPPER32, 0);
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