Revision 021f0674

b/hw/mips_malta.c
945 945
    serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]);
946 946
    serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]);
947 947
    if (parallel_hds[0])
948
        parallel_init(0x378, isa_reserve_irq(7), parallel_hds[0]);
948
        parallel_init(0, parallel_hds[0]);
949 949
    for(i = 0; i < MAX_FD; i++) {
950 950
        dinfo = drive_get(IF_FLOPPY, 0, i);
951 951
        fd[i] = dinfo ? dinfo->bdrv : NULL;
b/hw/parallel.c
78 78
    int it_shift;
79 79
};
80 80

  
81
typedef struct ISAParallelState {
82
    ISADevice dev;
83
    uint32_t iobase;
84
    uint32_t isairq;
85
    ParallelState state;
86
} ISAParallelState;
87

  
81 88
static void parallel_update_irq(ParallelState *s)
82 89
{
83 90
    if (s->irq_pending)
......
438 445
    s->last_read_offset = ~0U;
439 446
}
440 447

  
441
/* If fd is zero, it means that the parallel device uses the console */
442
ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr)
448
static int parallel_isa_initfn(ISADevice *dev)
443 449
{
444
    ParallelState *s;
450
    ISAParallelState *isa = DO_UPCAST(ISAParallelState, dev, dev);
451
    ParallelState *s = &isa->state;
452
    int base = isa->iobase;
445 453
    uint8_t dummy;
446 454

  
447
    s = qemu_mallocz(sizeof(ParallelState));
448
    s->irq = irq;
449
    s->chr = chr;
455
    if (!s->chr) {
456
        fprintf(stderr, "Can't create parallel device, empty char device\n");
457
        exit(1);
458
    }
459

  
460
    isa_init_irq(dev, &s->irq, isa->isairq);
450 461
    parallel_reset(s);
451 462
    qemu_register_reset(parallel_reset, s);
452 463

  
453
    if (qemu_chr_ioctl(chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
464
    if (qemu_chr_ioctl(s->chr, CHR_IOCTL_PP_READ_STATUS, &dummy) == 0) {
454 465
        s->hw_driver = 1;
455 466
        s->status = dummy;
456 467
    }
......
469 480
        register_ioport_write(base, 8, 1, parallel_ioport_write_sw, s);
470 481
        register_ioport_read(base, 8, 1, parallel_ioport_read_sw, s);
471 482
    }
472
    return s;
483
    return 0;
484
}
485

  
486
static const int isa_parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
487

  
488
ParallelState *parallel_init(int index, CharDriverState *chr)
489
{
490
    ISADevice *dev;
491

  
492
    dev = isa_create("isa-parallel");
493
    qdev_prop_set_uint32(&dev->qdev, "iobase", isa_parallel_io[index]);
494
    qdev_prop_set_uint32(&dev->qdev, "irq", 7);
495
    qdev_prop_set_chr(&dev->qdev, "chardev", chr);
496
    if (qdev_init(&dev->qdev) != 0)
497
        return NULL;
498
    return &DO_UPCAST(ISAParallelState, dev, dev)->state;
473 499
}
474 500

  
475 501
/* Memory mapped interface */
......
547 573
    cpu_register_physical_memory(base, 8 << it_shift, io_sw);
548 574
    return s;
549 575
}
576

  
577
static ISADeviceInfo parallel_isa_info = {
578
    .qdev.name  = "isa-parallel",
579
    .qdev.size  = sizeof(ISAParallelState),
580
    .init       = parallel_isa_initfn,
581
    .qdev.props = (Property[]) {
582
        DEFINE_PROP_HEX32("iobase", ISAParallelState, iobase,  0x378),
583
        DEFINE_PROP_UINT32("irq",   ISAParallelState, isairq,  7),
584
        DEFINE_PROP_CHR("chardev",  ISAParallelState, state.chr),
585
        DEFINE_PROP_END_OF_LIST(),
586
    },
587
};
588

  
589
static void parallel_register_devices(void)
590
{
591
    isa_qdev_register(&parallel_isa_info);
592
}
593

  
594
device_init(parallel_register_devices)
b/hw/pc.c
1340 1340

  
1341 1341
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1342 1342
        if (parallel_hds[i]) {
1343
            parallel_init(parallel_io[i], isa_reserve_irq(parallel_irq[i]),
1344
                          parallel_hds[i]);
1343
            parallel_init(i, parallel_hds[i]);
1345 1344
        }
1346 1345
    }
1347 1346

  
b/hw/pc.h
16 16
/* parallel.c */
17 17

  
18 18
typedef struct ParallelState ParallelState;
19
ParallelState *parallel_init(int base, qemu_irq irq, CharDriverState *chr);
19
ParallelState *parallel_init(int index, CharDriverState *chr);
20 20
ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
21 21

  
22 22
/* i8259.c */
b/hw/sun4u.c
610 610

  
611 611
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
612 612
        if (parallel_hds[i]) {
613
            parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/,
614
                          parallel_hds[i]);
613
            parallel_init(i, parallel_hds[i]);
615 614
        }
616 615
    }
617 616

  

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