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root / target-arm @ 023fe10d

Name Size
  nwfpe
cpu.h 2.4 kB
exec.h 1.3 kB
op.c 12.7 kB
op_template.h 1.2 kB
translate.c 23.4 kB

Latest revisions

# Date Author Comment
beddab75 05/05/2004 09:36 pm bellard

arm load/store half word fix (Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@785 c046a42c-6fe2-441c-8c8c-71466251a162
d720b93d 04/25/2004 08:57 pm bellard

precise self modifying code support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
e19e89a5 03/21/2004 07:08 pm bellard

more log items

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@676 c046a42c-6fe2-441c-8c8c-71466251a162
537730b9 02/22/2004 03:40 pm bellard

zero offset optimisation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162
3d57da2a 02/16/2004 11:47 pm bellard

suppressed dummy FPU ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@610 c046a42c-6fe2-441c-8c8c-71466251a162
00406dff 02/16/2004 11:43 pm bellard

added arm nwfpe support (initial patch by Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@609 c046a42c-6fe2-441c-8c8c-71466251a162
3cf1e035 01/24/2004 05:19 pm bellard

added TARGET_LONG_BITS

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162
a6b025d3 01/24/2004 05:18 pm bellard

added cpu_get_phys_page_debug()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@579 c046a42c-6fe2-441c-8c8c-71466251a162
bd497938 01/05/2004 02:06 am bellard

use generic GenOpFunc

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162
163a7cb6 11/30/2003 09:40 pm bellard

imull fix (suggested by Robert J. Harley)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@478 c046a42c-6fe2-441c-8c8c-71466251a162

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