Revision 04762841

b/Makefile.target
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obj-i386-y += vmmouse.o vmport.o hpet.o
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obj-i386-y += device-hotplug.o pci-hotplug.o smbios.o wdt_ib700.o
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obj-i386-y += debugcon.o multiboot.o
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obj-i386-y += pm_smbus.o
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obj-i386-y += pm_smbus.o apm.o
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# shared objects
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obj-ppc-y = ppc.o
......
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obj-mips-y += g364fb.o jazz_led.o
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obj-mips-y += gt64xxx.o pckbd.o mc146818rtc.o
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obj-mips-y += piix4.o cirrus_vga.o
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obj-mips-y += pm_smbus.o
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obj-mips-y += pm_smbus.o apm.o
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obj-microblaze-y = petalogix_s3adsp1800_mmu.o
227 227

  
b/hw/acpi.c
17 17
 */
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#include "hw.h"
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#include "pc.h"
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#include "apm.h"
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#include "pm_smbus.h"
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#include "pci.h"
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#include "qemu-timer.h"
......
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    uint16_t pmsts;
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    uint16_t pmen;
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    uint16_t pmcntrl;
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    uint8_t apmc;
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    uint8_t apms;
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    APMState apm;
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    QEMUTimer *tmr_timer;
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    int64_t tmr_overflow_time;
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......
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    return val;
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}
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static void pm_smi_writeb(void *opaque, uint32_t addr, uint32_t val)
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static void apm_ctrl_changed(uint32_t val, void *arg)
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{
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    PIIX4PMState *s = opaque;
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    addr &= 1;
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#ifdef DEBUG
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    printf("pm_smi_writeb addr=0x%x val=0x%02x\n", addr, val);
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#endif
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    if (addr == 0) {
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        s->apmc = val;
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        /* ACPI specs 3.0, 4.7.2.5 */
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        if (val == ACPI_ENABLE) {
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            s->pmcntrl |= SCI_EN;
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        } else if (val == ACPI_DISABLE) {
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            s->pmcntrl &= ~SCI_EN;
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        }
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    PIIX4PMState *s = arg;
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        if (s->dev.config[0x5b] & (1 << 1)) {
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            if (s->smi_irq) {
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                qemu_irq_raise(s->smi_irq);
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            }
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        }
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    } else {
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        s->apms = val;
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    /* ACPI specs 3.0, 4.7.2.5 */
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    if (val == ACPI_ENABLE) {
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        s->pmcntrl |= SCI_EN;
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    } else if (val == ACPI_DISABLE) {
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        s->pmcntrl &= ~SCI_EN;
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    }
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}
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static uint32_t pm_smi_readb(void *opaque, uint32_t addr)
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{
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    PIIX4PMState *s = opaque;
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    uint32_t val;
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    addr &= 1;
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    if (addr == 0) {
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        val = s->apmc;
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    } else {
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        val = s->apms;
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    if (s->dev.config[0x5b] & (1 << 1)) {
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        if (s->smi_irq) {
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            qemu_irq_raise(s->smi_irq);
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        }
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    }
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#ifdef DEBUG
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    printf("pm_smi_readb addr=0x%x val=0x%02x\n", addr, val);
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#endif
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    return val;
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}
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static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val)
......
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        VMSTATE_UINT16(pmsts, PIIX4PMState),
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        VMSTATE_UINT16(pmen, PIIX4PMState),
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        VMSTATE_UINT16(pmcntrl, PIIX4PMState),
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        VMSTATE_UINT8(apmc, PIIX4PMState),
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        VMSTATE_UINT8(apms, PIIX4PMState),
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        VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
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        VMSTATE_TIMER(tmr_timer, PIIX4PMState),
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        VMSTATE_INT64(tmr_overflow_time, PIIX4PMState),
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        VMSTATE_END_OF_LIST()
......
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    pci_conf[0x40] = 0x01; /* PM io base read only bit */
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    register_ioport_write(0xb2, 2, 1, pm_smi_writeb, s);
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    register_ioport_read(0xb2, 2, 1, pm_smi_readb, s);
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    /* APM */
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    apm_init(&s->apm, apm_ctrl_changed, s);
380 355

  
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    register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s);
382 357

  
b/hw/apm.c
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/*
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 * QEMU PC APM controller Emulation
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 * This is split out from acpi.c
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 *
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 * Copyright (c) 2006 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License version 2 as published by the Free Software Foundation.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>
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 */
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#include "apm.h"
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#include "hw.h"
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#include "isa.h"
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//#define DEBUG
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/* fixed I/O location */
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#define APM_CNT_IOPORT  0xb2
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#define APM_STS_IOPORT  0xb3
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static void apm_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
31
{
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    APMState *apm = opaque;
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    addr &= 1;
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#ifdef DEBUG
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    printf("apm_ioport_writeb addr=0x%x val=0x%02x\n", addr, val);
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#endif
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    if (addr == 0) {
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        apm->apmc = val;
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40
        if (apm->callback) {
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            (apm->callback)(val, apm->arg);
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        }
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    } else {
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        apm->apms = val;
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    }
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}
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static uint32_t apm_ioport_readb(void *opaque, uint32_t addr)
49
{
50
    APMState *apm = opaque;
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    uint32_t val;
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    addr &= 1;
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    if (addr == 0) {
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        val = apm->apmc;
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    } else {
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        val = apm->apms;
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    }
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#ifdef DEBUG
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    printf("apm_ioport_readb addr=0x%x val=0x%02x\n", addr, val);
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#endif
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    return val;
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}
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const VMStateDescription vmstate_apm = {
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    .name = "APM State",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .minimum_version_id_old = 1,
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    .fields = (VMStateField[]) {
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        VMSTATE_UINT8(apmc, APMState),
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        VMSTATE_UINT8(apms, APMState),
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        VMSTATE_END_OF_LIST()
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    }
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};
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void apm_init(APMState *apm, apm_ctrl_changed_t callback, void *arg)
78
{
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    apm->callback = callback;
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    apm->arg = arg;
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    /* ioport 0xb2, 0xb3 */
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    register_ioport_write(APM_CNT_IOPORT, 2, 1, apm_ioport_writeb, apm);
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    register_ioport_read(APM_CNT_IOPORT, 2, 1, apm_ioport_readb, apm);
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}
b/hw/apm.h
1
#ifndef APM_H
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#define APM_H
3

  
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#include <stdint.h>
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#include "qemu-common.h"
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#include "hw.h"
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typedef void (*apm_ctrl_changed_t)(uint32_t val, void *arg);
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typedef struct APMState {
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    uint8_t apmc;
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    uint8_t apms;
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    apm_ctrl_changed_t callback;
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    void *arg;
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} APMState;
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void apm_init(APMState *s, apm_ctrl_changed_t callback, void *arg);
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extern const VMStateDescription vmstate_apm;
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#endif /* APM_H */

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