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1
/*
2
 *  PowerPC emulation micro-operations for qemu.
3
 * 
4
 *  Copyright (c) 2003-2007 Jocelyn Mayer
5
 *
6
 * This library is free software; you can redistribute it and/or
7
 * modify it under the terms of the GNU Lesser General Public
8
 * License as published by the Free Software Foundation; either
9
 * version 2 of the License, or (at your option) any later version.
10
 *
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 * This library is distributed in the hope that it will be useful,
12
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14
 * Lesser General Public License for more details.
15
 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
20

    
21
//#define DEBUG_OP
22

    
23
#include "config.h"
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#include "exec.h"
25
#include "op_helper.h"
26

    
27
/* XXX: this is to be suppressed */
28
#define regs (env)
29

    
30
#define FT0 (env->ft0)
31
#define FT1 (env->ft1)
32
#define FT2 (env->ft2)
33

    
34
/* XXX: this is to be suppressed... */
35
#define PPC_OP(name) void OPPROTO glue(op_, name)(void)
36

    
37
#define REG 0
38
#include "op_template.h"
39

    
40
#define REG 1
41
#include "op_template.h"
42

    
43
#define REG 2
44
#include "op_template.h"
45

    
46
#define REG 3
47
#include "op_template.h"
48

    
49
#define REG 4
50
#include "op_template.h"
51

    
52
#define REG 5
53
#include "op_template.h"
54

    
55
#define REG 6
56
#include "op_template.h"
57

    
58
#define REG 7
59
#include "op_template.h"
60

    
61
#define REG 8
62
#include "op_template.h"
63

    
64
#define REG 9
65
#include "op_template.h"
66

    
67
#define REG 10
68
#include "op_template.h"
69

    
70
#define REG 11
71
#include "op_template.h"
72

    
73
#define REG 12
74
#include "op_template.h"
75

    
76
#define REG 13
77
#include "op_template.h"
78

    
79
#define REG 14
80
#include "op_template.h"
81

    
82
#define REG 15
83
#include "op_template.h"
84

    
85
#define REG 16
86
#include "op_template.h"
87

    
88
#define REG 17
89
#include "op_template.h"
90

    
91
#define REG 18
92
#include "op_template.h"
93

    
94
#define REG 19
95
#include "op_template.h"
96

    
97
#define REG 20
98
#include "op_template.h"
99

    
100
#define REG 21
101
#include "op_template.h"
102

    
103
#define REG 22
104
#include "op_template.h"
105

    
106
#define REG 23
107
#include "op_template.h"
108

    
109
#define REG 24
110
#include "op_template.h"
111

    
112
#define REG 25
113
#include "op_template.h"
114

    
115
#define REG 26
116
#include "op_template.h"
117

    
118
#define REG 27
119
#include "op_template.h"
120

    
121
#define REG 28
122
#include "op_template.h"
123

    
124
#define REG 29
125
#include "op_template.h"
126

    
127
#define REG 30
128
#include "op_template.h"
129

    
130
#define REG 31
131
#include "op_template.h"
132

    
133
/* PowerPC state maintenance operations */
134
/* set_Rc0 */
135
PPC_OP(set_Rc0)
136
{
137
    env->crf[0] = T0 | xer_ov;
138
    RETURN();
139
}
140

    
141
/* Set Rc1 (for floating point arithmetic) */
142
PPC_OP(set_Rc1)
143
{
144
    env->crf[1] = regs->fpscr[7];
145
    RETURN();
146
}
147

    
148
/* Constants load */
149
void OPPROTO op_reset_T0 (void)
150
{
151
    T0 = 0;
152
    RETURN();
153
}
154

    
155
PPC_OP(set_T0)
156
{
157
    T0 = (uint32_t)PARAM1;
158
    RETURN();
159
}
160

    
161
#if defined(TARGET_PPC64)
162
void OPPROTO op_set_T0_64 (void)
163
{
164
    T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
165
    RETURN();
166
}
167
#endif
168

    
169
PPC_OP(set_T1)
170
{
171
    T1 = (uint32_t)PARAM1;
172
    RETURN();
173
}
174

    
175
#if defined(TARGET_PPC64)
176
void OPPROTO op_set_T1_64 (void)
177
{
178
    T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
179
    RETURN();
180
}
181
#endif
182

    
183
#if 0 // unused
184
PPC_OP(set_T2)
185
{
186
    T2 = PARAM(1);
187
    RETURN();
188
}
189
#endif
190

    
191
void OPPROTO op_move_T1_T0 (void)
192
{
193
    T1 = T0;
194
    RETURN();
195
}
196

    
197
void OPPROTO op_move_T2_T0 (void)
198
{
199
    T2 = T0;
200
    RETURN();
201
}
202

    
203
/* Generate exceptions */
204
PPC_OP(raise_exception_err)
205
{
206
    do_raise_exception_err(PARAM(1), PARAM(2));
207
}
208

    
209
PPC_OP(update_nip)
210
{
211
    env->nip = (uint32_t)PARAM1;
212
    RETURN();
213
}
214

    
215
#if defined(TARGET_PPC64)
216
void OPPROTO op_update_nip_64 (void)
217
{
218
    env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
219
    RETURN();
220
}
221
#endif
222

    
223
PPC_OP(debug)
224
{
225
    do_raise_exception(EXCP_DEBUG);
226
}
227

    
228
PPC_OP(exit_tb)
229
{
230
    EXIT_TB();
231
}
232

    
233
/* Load/store special registers */
234
PPC_OP(load_cr)
235
{
236
    do_load_cr();
237
    RETURN();
238
}
239

    
240
PPC_OP(store_cr)
241
{
242
    do_store_cr(PARAM(1));
243
    RETURN();
244
}
245

    
246
void OPPROTO op_load_cro (void)
247
{
248
    T0 = env->crf[PARAM1];
249
    RETURN();
250
}
251

    
252
void OPPROTO op_store_cro (void)
253
{
254
    env->crf[PARAM1] = T0;
255
    RETURN();
256
}
257

    
258
PPC_OP(load_xer_cr)
259
{
260
    T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);
261
    RETURN();
262
}
263

    
264
PPC_OP(clear_xer_cr)
265
{
266
    xer_so = 0;
267
    xer_ov = 0;
268
    xer_ca = 0;
269
    RETURN();
270
}
271

    
272
PPC_OP(load_xer_bc)
273
{
274
    T1 = xer_bc;
275
    RETURN();
276
}
277

    
278
void OPPROTO op_store_xer_bc (void)
279
{
280
    xer_bc = T0;
281
    RETURN();
282
}
283

    
284
PPC_OP(load_xer)
285
{
286
    do_load_xer();
287
    RETURN();
288
}
289

    
290
PPC_OP(store_xer)
291
{
292
    do_store_xer();
293
    RETURN();
294
}
295

    
296
#if !defined(CONFIG_USER_ONLY)
297
/* Segment registers load and store */
298
PPC_OP(load_sr)
299
{
300
    T0 = regs->sr[T1];
301
    RETURN();
302
}
303

    
304
PPC_OP(store_sr)
305
{
306
    do_store_sr(env, T1, T0);
307
    RETURN();
308
}
309

    
310
PPC_OP(load_sdr1)
311
{
312
    T0 = regs->sdr1;
313
    RETURN();
314
}
315

    
316
PPC_OP(store_sdr1)
317
{
318
    do_store_sdr1(env, T0);
319
    RETURN();
320
}
321

    
322
#if defined (TARGET_PPC64)
323
void OPPROTO op_load_asr (void)
324
{
325
    T0 = env->asr;
326
    RETURN();
327
}
328

    
329
void OPPROTO op_store_asr (void)
330
{
331
    ppc_store_asr(env, T0);
332
    RETURN();
333
}
334
#endif
335

    
336
PPC_OP(load_msr)
337
{
338
    T0 = do_load_msr(env);
339
    RETURN();
340
}
341

    
342
PPC_OP(store_msr)
343
{
344
    do_store_msr(env, T0);
345
    RETURN();
346
}
347

    
348
#if defined (TARGET_PPC64)
349
void OPPROTO op_store_msr_32 (void)
350
{
351
    ppc_store_msr_32(env, T0);
352
    RETURN();
353
}
354
#endif
355
#endif
356

    
357
/* SPR */
358
PPC_OP(load_spr)
359
{
360
    T0 = regs->spr[PARAM(1)];
361
    RETURN();
362
}
363

    
364
PPC_OP(store_spr)
365
{
366
    regs->spr[PARAM(1)] = T0;
367
    RETURN();
368
}
369

    
370
PPC_OP(load_lr)
371
{
372
    T0 = regs->lr;
373
    RETURN();
374
}
375

    
376
PPC_OP(store_lr)
377
{
378
    regs->lr = T0;
379
    RETURN();
380
}
381

    
382
PPC_OP(load_ctr)
383
{
384
    T0 = regs->ctr;
385
    RETURN();
386
}
387

    
388
PPC_OP(store_ctr)
389
{
390
    regs->ctr = T0;
391
    RETURN();
392
}
393

    
394
PPC_OP(load_tbl)
395
{
396
    T0 = cpu_ppc_load_tbl(regs);
397
    RETURN();
398
}
399

    
400
PPC_OP(load_tbu)
401
{
402
    T0 = cpu_ppc_load_tbu(regs);
403
    RETURN();
404
}
405

    
406
#if !defined(CONFIG_USER_ONLY)
407
PPC_OP(store_tbl)
408
{
409
    cpu_ppc_store_tbl(regs, T0);
410
    RETURN();
411
}
412

    
413
PPC_OP(store_tbu)
414
{
415
    cpu_ppc_store_tbu(regs, T0);
416
    RETURN();
417
}
418

    
419
PPC_OP(load_decr)
420
{
421
    T0 = cpu_ppc_load_decr(regs);
422
    RETURN();
423
}
424

    
425
PPC_OP(store_decr)
426
{
427
    cpu_ppc_store_decr(regs, T0);
428
    RETURN();
429
}
430

    
431
PPC_OP(load_ibat)
432
{
433
    T0 = regs->IBAT[PARAM(1)][PARAM(2)];
434
    RETURN();
435
}
436

    
437
void OPPROTO op_store_ibatu (void)
438
{
439
    do_store_ibatu(env, PARAM1, T0);
440
    RETURN();
441
}
442

    
443
void OPPROTO op_store_ibatl (void)
444
{
445
#if 1
446
    env->IBAT[1][PARAM1] = T0;
447
#else
448
    do_store_ibatl(env, PARAM1, T0);
449
#endif
450
    RETURN();
451
}
452

    
453
PPC_OP(load_dbat)
454
{
455
    T0 = regs->DBAT[PARAM(1)][PARAM(2)];
456
    RETURN();
457
}
458

    
459
void OPPROTO op_store_dbatu (void)
460
{
461
    do_store_dbatu(env, PARAM1, T0);
462
    RETURN();
463
}
464

    
465
void OPPROTO op_store_dbatl (void)
466
{
467
#if 1
468
    env->DBAT[1][PARAM1] = T0;
469
#else
470
    do_store_dbatl(env, PARAM1, T0);
471
#endif
472
    RETURN();
473
}
474
#endif /* !defined(CONFIG_USER_ONLY) */
475

    
476
/* FPSCR */
477
PPC_OP(load_fpscr)
478
{
479
    do_load_fpscr();
480
    RETURN();
481
}
482

    
483
PPC_OP(store_fpscr)
484
{
485
    do_store_fpscr(PARAM1);
486
    RETURN();
487
}
488

    
489
PPC_OP(reset_scrfx)
490
{
491
    regs->fpscr[7] &= ~0x8;
492
    RETURN();
493
}
494

    
495
/* crf operations */
496
PPC_OP(getbit_T0)
497
{
498
    T0 = (T0 >> PARAM(1)) & 1;
499
    RETURN();
500
}
501

    
502
PPC_OP(getbit_T1)
503
{
504
    T1 = (T1 >> PARAM(1)) & 1;
505
    RETURN();
506
}
507

    
508
PPC_OP(setcrfbit)
509
{
510
    T1 = (T1 & PARAM(1)) | (T0 << PARAM(2));
511
    RETURN();
512
}
513

    
514
/* Branch */
515
#define EIP regs->nip
516

    
517
PPC_OP(setlr)
518
{
519
    regs->lr = (uint32_t)PARAM1;
520
    RETURN();
521
}
522

    
523
#if defined (TARGET_PPC64)
524
void OPPROTO op_setlr_64 (void)
525
{
526
    regs->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
527
    RETURN();
528
}
529
#endif
530

    
531
PPC_OP(goto_tb0)
532
{
533
    GOTO_TB(op_goto_tb0, PARAM1, 0);
534
}
535

    
536
PPC_OP(goto_tb1)
537
{
538
    GOTO_TB(op_goto_tb1, PARAM1, 1);
539
}
540

    
541
void OPPROTO op_b_T1 (void)
542
{
543
    regs->nip = (uint32_t)(T1 & ~3);
544
    RETURN();
545
}
546

    
547
#if defined (TARGET_PPC64)
548
void OPPROTO op_b_T1_64 (void)
549
{
550
    regs->nip = (uint64_t)(T1 & ~3);
551
    RETURN();
552
}
553
#endif
554

    
555
PPC_OP(jz_T0)
556
{
557
    if (!T0)
558
        GOTO_LABEL_PARAM(1);
559
    RETURN();
560
}
561

    
562
void OPPROTO op_btest_T1 (void)
563
{
564
    if (T0) {
565
        regs->nip = (uint32_t)(T1 & ~3);
566
    } else {
567
        regs->nip = (uint32_t)PARAM1;
568
    }
569
    RETURN();
570
}
571

    
572
#if defined (TARGET_PPC64)
573
void OPPROTO op_btest_T1_64 (void)
574
{
575
    if (T0) {
576
        regs->nip = (uint64_t)(T1 & ~3);
577
    } else {
578
        regs->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;
579
    }
580
    RETURN();
581
}
582
#endif
583

    
584
PPC_OP(movl_T1_ctr)
585
{
586
    T1 = regs->ctr;
587
    RETURN();
588
}
589

    
590
PPC_OP(movl_T1_lr)
591
{
592
    T1 = regs->lr;
593
    RETURN();
594
}
595

    
596
/* tests with result in T0 */
597
void OPPROTO op_test_ctr (void)
598
{
599
    T0 = (uint32_t)regs->ctr;
600
    RETURN();
601
}
602

    
603
#if defined(TARGET_PPC64)
604
void OPPROTO op_test_ctr_64 (void)
605
{
606
    T0 = (uint64_t)regs->ctr;
607
    RETURN();
608
}
609
#endif
610

    
611
void OPPROTO op_test_ctr_true (void)
612
{
613
    T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) != 0);
614
    RETURN();
615
}
616

    
617
#if defined(TARGET_PPC64)
618
void OPPROTO op_test_ctr_true_64 (void)
619
{
620
    T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) != 0);
621
    RETURN();
622
}
623
#endif
624

    
625
void OPPROTO op_test_ctr_false (void)
626
{
627
    T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) == 0);
628
    RETURN();
629
}
630

    
631
#if defined(TARGET_PPC64)
632
void OPPROTO op_test_ctr_false_64 (void)
633
{
634
    T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) == 0);
635
    RETURN();
636
}
637
#endif
638

    
639
void OPPROTO op_test_ctrz (void)
640
{
641
    T0 = ((uint32_t)regs->ctr == 0);
642
    RETURN();
643
}
644

    
645
#if defined(TARGET_PPC64)
646
void OPPROTO op_test_ctrz_64 (void)
647
{
648
    T0 = ((uint64_t)regs->ctr == 0);
649
    RETURN();
650
}
651
#endif
652

    
653
void OPPROTO op_test_ctrz_true (void)
654
{
655
    T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) != 0);
656
    RETURN();
657
}
658

    
659
#if defined(TARGET_PPC64)
660
void OPPROTO op_test_ctrz_true_64 (void)
661
{
662
    T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) != 0);
663
    RETURN();
664
}
665
#endif
666

    
667
void OPPROTO op_test_ctrz_false (void)
668
{
669
    T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) == 0);
670
    RETURN();
671
}
672

    
673
#if defined(TARGET_PPC64)
674
void OPPROTO op_test_ctrz_false_64 (void)
675
{
676
    T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) == 0);
677
    RETURN();
678
}
679
#endif
680

    
681
PPC_OP(test_true)
682
{
683
    T0 = (T0 & PARAM(1));
684
    RETURN();
685
}
686

    
687
PPC_OP(test_false)
688
{
689
    T0 = ((T0 & PARAM(1)) == 0);
690
    RETURN();
691
}
692

    
693
/* CTR maintenance */
694
PPC_OP(dec_ctr)
695
{
696
    regs->ctr--;
697
    RETURN();
698
}
699

    
700
/***                           Integer arithmetic                          ***/
701
/* add */
702
PPC_OP(add)
703
{
704
    T0 += T1;
705
    RETURN();
706
}
707

    
708
void OPPROTO op_check_addo (void)
709
{
710
    if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) &
711
                 ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) {
712
        xer_ov = 0;
713
    } else {
714
        xer_so = 1;
715
        xer_ov = 1;
716
    }
717
}
718

    
719
#if defined(TARGET_PPC64)
720
void OPPROTO op_check_addo_64 (void)
721
{
722
    if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) &
723
                 ((uint64_t)T2 ^ (uint64_t)T0) & (1UL << 63)))) {
724
        xer_ov = 0;
725
    } else {
726
        xer_so = 1;
727
        xer_ov = 1;
728
    }
729
}
730
#endif
731

    
732
/* add carrying */
733
void OPPROTO op_check_addc (void)
734
{
735
    if (likely((uint32_t)T0 >= (uint32_t)T2)) {
736
        xer_ca = 0;
737
    } else {
738
        xer_ca = 1;
739
    }
740
    RETURN();
741
}
742

    
743
#if defined(TARGET_PPC64)
744
void OPPROTO op_check_addc_64 (void)
745
{
746
    if (likely((uint64_t)T0 >= (uint64_t)T2)) {
747
        xer_ca = 0;
748
    } else {
749
        xer_ca = 1;
750
    }
751
    RETURN();
752
}
753
#endif
754

    
755
/* add extended */
756
void OPPROTO op_adde (void)
757
{
758
    do_adde();
759
    RETURN();
760
}
761

    
762
#if defined(TARGET_PPC64)
763
void OPPROTO op_adde_64 (void)
764
{
765
    do_adde_64();
766
    RETURN();
767
}
768
#endif
769

    
770
/* add immediate */
771
PPC_OP(addi)
772
{
773
    T0 += PARAM(1);
774
    RETURN();
775
}
776

    
777
/* add to minus one extended */
778
void OPPROTO op_add_me (void)
779
{
780
    T0 += xer_ca + (-1);
781
    if (likely((uint32_t)T1 != 0))
782
        xer_ca = 1;
783
    RETURN();
784
}
785

    
786
#if defined(TARGET_PPC64)
787
void OPPROTO op_add_me_64 (void)
788
{
789
    T0 += xer_ca + (-1);
790
    if (likely((uint64_t)T1 != 0))
791
        xer_ca = 1;
792
    RETURN();
793
}
794
#endif
795

    
796
void OPPROTO op_addmeo (void)
797
{
798
    do_addmeo();
799
    RETURN();
800
}
801

    
802
void OPPROTO op_addmeo_64 (void)
803
{
804
    do_addmeo();
805
    RETURN();
806
}
807

    
808
/* add to zero extended */
809
void OPPROTO op_add_ze (void)
810
{
811
    T0 += xer_ca;
812
    RETURN();
813
}
814

    
815
/* divide word */
816
void OPPROTO op_divw (void)
817
{
818
    if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||
819
                 (int32_t)T1 == 0)) {
820
        T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31));
821
    } else {
822
        T0 = (int32_t)T0 / (int32_t)T1;
823
    }
824
    RETURN();
825
}
826

    
827
#if defined(TARGET_PPC64)
828
void OPPROTO op_divd (void)
829
{
830
    if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) ||
831
                 (int64_t)T1 == 0)) {
832
        T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63));
833
    } else {
834
        T0 = (int64_t)T0 / (int64_t)T1;
835
    }
836
    RETURN();
837
}
838
#endif
839

    
840
void OPPROTO op_divwo (void)
841
{
842
    do_divwo();
843
    RETURN();
844
}
845

    
846
#if defined(TARGET_PPC64)
847
void OPPROTO op_divdo (void)
848
{
849
    do_divdo();
850
    RETURN();
851
}
852
#endif
853

    
854
/* divide word unsigned */
855
void OPPROTO op_divwu (void)
856
{
857
    if (unlikely(T1 == 0)) {
858
        T0 = 0;
859
    } else {
860
        T0 = (uint32_t)T0 / (uint32_t)T1;
861
    }
862
    RETURN();
863
}
864

    
865
#if defined(TARGET_PPC64)
866
void OPPROTO op_divdu (void)
867
{
868
    if (unlikely(T1 == 0)) {
869
        T0 = 0;
870
    } else {
871
        T0 /= T1;
872
    }
873
    RETURN();
874
}
875
#endif
876

    
877
void OPPROTO op_divwuo (void)
878
{
879
    do_divwuo();
880
    RETURN();
881
}
882

    
883
#if defined(TARGET_PPC64)
884
void OPPROTO op_divduo (void)
885
{
886
    do_divduo();
887
    RETURN();
888
}
889
#endif
890

    
891
/* multiply high word */
892
void OPPROTO op_mulhw (void)
893
{
894
    T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32;
895
    RETURN();
896
}
897

    
898
#if defined(TARGET_PPC64)
899
void OPPROTO op_mulhd (void)
900
{
901
    uint64_t tl, th;
902

    
903
    do_imul64(&tl, &th);
904
    T0 = th;
905
    RETURN();
906
}
907
#endif
908

    
909
/* multiply high word unsigned */
910
void OPPROTO op_mulhwu (void)
911
{
912
    T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32;
913
    RETURN();
914
}
915

    
916
#if defined(TARGET_PPC64)
917
void OPPROTO op_mulhdu (void)
918
{
919
    uint64_t tl, th;
920

    
921
    do_mul64(&tl, &th);
922
    T0 = th;
923
    RETURN();
924
}
925
#endif
926

    
927
/* multiply low immediate */
928
PPC_OP(mulli)
929
{
930
    T0 = ((int32_t)T0 * (int32_t)PARAM1);
931
    RETURN();
932
}
933

    
934
/* multiply low word */
935
PPC_OP(mullw)
936
{
937
    T0 = (int32_t)(T0 * T1);
938
    RETURN();
939
}
940

    
941
#if defined(TARGET_PPC64)
942
void OPPROTO op_mulld (void)
943
{
944
    T0 *= T1;
945
    RETURN();
946
}
947
#endif
948

    
949
void OPPROTO op_mullwo (void)
950
{
951
    do_mullwo();
952
    RETURN();
953
}
954

    
955
#if defined(TARGET_PPC64)
956
void OPPROTO op_mulldo (void)
957
{
958
    do_mulldo();
959
    RETURN();
960
}
961
#endif
962

    
963
/* negate */
964
void OPPROTO op_neg (void)
965
{
966
    if (likely(T0 != INT32_MIN)) {
967
        T0 = -(int32_t)T0;
968
    }
969
    RETURN();
970
}
971

    
972
#if defined(TARGET_PPC64)
973
void OPPROTO op_neg_64 (void)
974
{
975
    if (likely(T0 != INT64_MIN)) {
976
        T0 = -(int64_t)T0;
977
    }
978
    RETURN();
979
}
980
#endif
981

    
982
void OPPROTO op_nego (void)
983
{
984
    do_nego();
985
    RETURN();
986
}
987

    
988
#if defined(TARGET_PPC64)
989
void OPPROTO op_nego_64 (void)
990
{
991
    do_nego_64();
992
    RETURN();
993
}
994
#endif
995

    
996
/* substract from */
997
PPC_OP(subf)
998
{
999
    T0 = T1 - T0;
1000
    RETURN();
1001
}
1002

    
1003
void OPPROTO op_check_subfo (void)
1004
{
1005
    if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
1006
                 ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) {
1007
        xer_ov = 0;
1008
    } else {
1009
        xer_so = 1;
1010
        xer_ov = 1;
1011
    }
1012
    RETURN();
1013
}
1014

    
1015
#if defined(TARGET_PPC64)
1016
void OPPROTO op_check_subfo_64 (void)
1017
{
1018
    if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) &
1019
                 ((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) {
1020
        xer_ov = 0;
1021
    } else {
1022
        xer_so = 1;
1023
        xer_ov = 1;
1024
    }
1025
    RETURN();
1026
}
1027
#endif
1028

    
1029
/* substract from carrying */
1030
void OPPROTO op_check_subfc (void)
1031
{
1032
    if (likely((uint32_t)T0 > (uint32_t)T1)) {
1033
        xer_ca = 0;
1034
    } else {
1035
        xer_ca = 1;
1036
    }
1037
    RETURN();
1038
}
1039

    
1040
#if defined(TARGET_PPC64)
1041
void OPPROTO op_check_subfc_64 (void)
1042
{
1043
    if (likely((uint64_t)T0 > (uint64_t)T1)) {
1044
        xer_ca = 0;
1045
    } else {
1046
        xer_ca = 1;
1047
    }
1048
    RETURN();
1049
}
1050
#endif
1051

    
1052
/* substract from extended */
1053
void OPPROTO op_subfe (void)
1054
{
1055
    do_subfe();
1056
    RETURN();
1057
}
1058

    
1059
#if defined(TARGET_PPC64)
1060
void OPPROTO op_subfe_64 (void)
1061
{
1062
    do_subfe_64();
1063
    RETURN();
1064
}
1065
#endif
1066

    
1067
/* substract from immediate carrying */
1068
void OPPROTO op_subfic (void)
1069
{
1070
    T0 = PARAM1 + ~T0 + 1;
1071
    if ((uint32_t)T0 <= (uint32_t)PARAM1) {
1072
        xer_ca = 1;
1073
    } else {
1074
        xer_ca = 0;
1075
    }
1076
    RETURN();
1077
}
1078

    
1079
#if defined(TARGET_PPC64)
1080
void OPPROTO op_subfic_64 (void)
1081
{
1082
    T0 = PARAM1 + ~T0 + 1;
1083
    if ((uint64_t)T0 <= (uint64_t)PARAM1) {
1084
        xer_ca = 1;
1085
    } else {
1086
        xer_ca = 0;
1087
    }
1088
    RETURN();
1089
}
1090
#endif
1091

    
1092
/* substract from minus one extended */
1093
void OPPROTO op_subfme (void)
1094
{
1095
    T0 = ~T0 + xer_ca - 1;
1096
    if (likely((uint32_t)T0 != (uint32_t)-1))
1097
        xer_ca = 1;
1098
    RETURN();
1099
}
1100

    
1101
#if defined(TARGET_PPC64)
1102
void OPPROTO op_subfme_64 (void)
1103
{
1104
    T0 = ~T0 + xer_ca - 1;
1105
    if (likely((uint64_t)T0 != (uint64_t)-1))
1106
        xer_ca = 1;
1107
    RETURN();
1108
}
1109
#endif
1110

    
1111
void OPPROTO op_subfmeo (void)
1112
{
1113
    do_subfmeo();
1114
    RETURN();
1115
}
1116

    
1117
#if defined(TARGET_PPC64)
1118
void OPPROTO op_subfmeo_64 (void)
1119
{
1120
    do_subfmeo_64();
1121
    RETURN();
1122
}
1123
#endif
1124

    
1125
/* substract from zero extended */
1126
void OPPROTO op_subfze (void)
1127
{
1128
    T1 = ~T0;
1129
    T0 = T1 + xer_ca;
1130
    if ((uint32_t)T0 < (uint32_t)T1) {
1131
        xer_ca = 1;
1132
    } else {
1133
        xer_ca = 0;
1134
    }
1135
    RETURN();
1136
}
1137

    
1138
#if defined(TARGET_PPC64)
1139
void OPPROTO op_subfze_64 (void)
1140
{
1141
    T1 = ~T0;
1142
    T0 = T1 + xer_ca;
1143
    if ((uint64_t)T0 < (uint64_t)T1) {
1144
        xer_ca = 1;
1145
    } else {
1146
        xer_ca = 0;
1147
    }
1148
    RETURN();
1149
}
1150
#endif
1151

    
1152
void OPPROTO op_subfzeo (void)
1153
{
1154
    do_subfzeo();
1155
    RETURN();
1156
}
1157

    
1158
#if defined(TARGET_PPC64)
1159
void OPPROTO op_subfzeo_64 (void)
1160
{
1161
    do_subfzeo_64();
1162
    RETURN();
1163
}
1164
#endif
1165

    
1166
/***                           Integer comparison                          ***/
1167
/* compare */
1168
void OPPROTO op_cmp (void)
1169
{
1170
    if ((int32_t)T0 < (int32_t)T1) {
1171
        T0 = 0x08;
1172
    } else if ((int32_t)T0 > (int32_t)T1) {
1173
        T0 = 0x04;
1174
    } else {
1175
        T0 = 0x02;
1176
    }
1177
    RETURN();
1178
}
1179

    
1180
#if defined(TARGET_PPC64)
1181
void OPPROTO op_cmp_64 (void)
1182
{
1183
    if ((int64_t)T0 < (int64_t)T1) {
1184
        T0 = 0x08;
1185
    } else if ((int64_t)T0 > (int64_t)T1) {
1186
        T0 = 0x04;
1187
    } else {
1188
        T0 = 0x02;
1189
    }
1190
    RETURN();
1191
}
1192
#endif
1193

    
1194
/* compare immediate */
1195
void OPPROTO op_cmpi (void)
1196
{
1197
    if ((int32_t)T0 < (int32_t)PARAM1) {
1198
        T0 = 0x08;
1199
    } else if ((int32_t)T0 > (int32_t)PARAM1) {
1200
        T0 = 0x04;
1201
    } else {
1202
        T0 = 0x02;
1203
    }
1204
    RETURN();
1205
}
1206

    
1207
#if defined(TARGET_PPC64)
1208
void OPPROTO op_cmpi_64 (void)
1209
{
1210
    if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) {
1211
        T0 = 0x08;
1212
    } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) {
1213
        T0 = 0x04;
1214
    } else {
1215
        T0 = 0x02;
1216
    }
1217
    RETURN();
1218
}
1219
#endif
1220

    
1221
/* compare logical */
1222
void OPPROTO op_cmpl (void)
1223
{
1224
    if ((uint32_t)T0 < (uint32_t)T1) {
1225
        T0 = 0x08;
1226
    } else if ((uint32_t)T0 > (uint32_t)T1) {
1227
        T0 = 0x04;
1228
    } else {
1229
        T0 = 0x02;
1230
    }
1231
    RETURN();
1232
}
1233

    
1234
#if defined(TARGET_PPC64)
1235
void OPPROTO op_cmpl_64 (void)
1236
{
1237
    if ((uint64_t)T0 < (uint64_t)T1) {
1238
        T0 = 0x08;
1239
    } else if ((uint64_t)T0 > (uint64_t)T1) {
1240
        T0 = 0x04;
1241
    } else {
1242
        T0 = 0x02;
1243
    }
1244
    RETURN();
1245
}
1246
#endif
1247

    
1248
/* compare logical immediate */
1249
void OPPROTO op_cmpli (void)
1250
{
1251
    if ((uint32_t)T0 < (uint32_t)PARAM1) {
1252
        T0 = 0x08;
1253
    } else if ((uint32_t)T0 > (uint32_t)PARAM1) {
1254
        T0 = 0x04;
1255
    } else {
1256
        T0 = 0x02;
1257
    }
1258
    RETURN();
1259
}
1260

    
1261
#if defined(TARGET_PPC64)
1262
void OPPROTO op_cmpli_64 (void)
1263
{
1264
    if ((uint64_t)T0 < (uint64_t)PARAM1) {
1265
        T0 = 0x08;
1266
    } else if ((uint64_t)T0 > (uint64_t)PARAM1) {
1267
        T0 = 0x04;
1268
    } else {
1269
        T0 = 0x02;
1270
    }
1271
    RETURN();
1272
}
1273
#endif
1274

    
1275
void OPPROTO op_isel (void)
1276
{
1277
    if (T0)
1278
        T0 = T1;
1279
    else
1280
        T0 = T2;
1281
    RETURN();
1282
}
1283

    
1284
void OPPROTO op_popcntb (void)
1285
{
1286
    do_popcntb();
1287
    RETURN();
1288
}
1289

    
1290
#if defined(TARGET_PPC64)
1291
void OPPROTO op_popcntb_64 (void)
1292
{
1293
    do_popcntb_64();
1294
    RETURN();
1295
}
1296
#endif
1297

    
1298
/***                            Integer logical                            ***/
1299
/* and */
1300
PPC_OP(and)
1301
{
1302
    T0 &= T1;
1303
    RETURN();
1304
}
1305

    
1306
/* andc */
1307
PPC_OP(andc)
1308
{
1309
    T0 &= ~T1;
1310
    RETURN();
1311
}
1312

    
1313
/* andi. */
1314
void OPPROTO op_andi_T0 (void)
1315
{
1316
    T0 &= PARAM(1);
1317
    RETURN();
1318
}
1319

    
1320
void OPPROTO op_andi_T1 (void)
1321
{
1322
    T1 &= PARAM1;
1323
    RETURN();
1324
}
1325

    
1326
/* count leading zero */
1327
void OPPROTO op_cntlzw (void)
1328
{
1329
    T0 = _do_cntlzw(T0);
1330
    RETURN();
1331
}
1332

    
1333
#if defined(TARGET_PPC64)
1334
void OPPROTO op_cntlzd (void)
1335
{
1336
    T0 = _do_cntlzd(T0);
1337
    RETURN();
1338
}
1339
#endif
1340

    
1341
/* eqv */
1342
PPC_OP(eqv)
1343
{
1344
    T0 = ~(T0 ^ T1);
1345
    RETURN();
1346
}
1347

    
1348
/* extend sign byte */
1349
void OPPROTO op_extsb (void)
1350
{
1351
#if defined (TARGET_PPC64)
1352
    T0 = (int64_t)((int8_t)T0);
1353
#else
1354
    T0 = (int32_t)((int8_t)T0);
1355
#endif
1356
    RETURN();
1357
}
1358

    
1359
/* extend sign half word */
1360
void OPPROTO op_extsh (void)
1361
{
1362
#if defined (TARGET_PPC64)
1363
    T0 = (int64_t)((int16_t)T0);
1364
#else
1365
    T0 = (int32_t)((int16_t)T0);
1366
#endif
1367
    RETURN();
1368
}
1369

    
1370
#if defined (TARGET_PPC64)
1371
void OPPROTO op_extsw (void)
1372
{
1373
    T0 = (int64_t)((int32_t)T0);
1374
    RETURN();
1375
}
1376
#endif
1377

    
1378
/* nand */
1379
PPC_OP(nand)
1380
{
1381
    T0 = ~(T0 & T1);
1382
    RETURN();
1383
}
1384

    
1385
/* nor */
1386
PPC_OP(nor)
1387
{
1388
    T0 = ~(T0 | T1);
1389
    RETURN();
1390
}
1391

    
1392
/* or */
1393
PPC_OP(or)
1394
{
1395
    T0 |= T1;
1396
    RETURN();
1397
}
1398

    
1399
/* orc */
1400
PPC_OP(orc)
1401
{
1402
    T0 |= ~T1;
1403
    RETURN();
1404
}
1405

    
1406
/* ori */
1407
PPC_OP(ori)
1408
{
1409
    T0 |= PARAM(1);
1410
    RETURN();
1411
}
1412

    
1413
/* xor */
1414
PPC_OP(xor)
1415
{
1416
    T0 ^= T1;
1417
    RETURN();
1418
}
1419

    
1420
/* xori */
1421
PPC_OP(xori)
1422
{
1423
    T0 ^= PARAM(1);
1424
    RETURN();
1425
}
1426

    
1427
/***                             Integer rotate                            ***/
1428
void OPPROTO op_rotl32_T0_T1 (void)
1429
{
1430
    T0 = rotl32(T0, T1 & 0x1F);
1431
    RETURN();
1432
}
1433

    
1434
void OPPROTO op_rotli32_T0 (void)
1435
{
1436
    T0 = rotl32(T0, PARAM1);
1437
    RETURN();
1438
}
1439

    
1440
/***                             Integer shift                             ***/
1441
/* shift left word */
1442
void OPPROTO op_slw (void)
1443
{
1444
    if (T1 & 0x20) {
1445
        T0 = 0;
1446
    } else {
1447
        T0 = (uint32_t)(T0 << T1);
1448
    }
1449
    RETURN();
1450
}
1451

    
1452
#if defined(TARGET_PPC64)
1453
void OPPROTO op_sld (void)
1454
{
1455
    if (T1 & 0x40) {
1456
        T0 = 0;
1457
    } else {
1458
        T0 = T0 << T1;
1459
    }
1460
    RETURN();
1461
}
1462
#endif
1463

    
1464
/* shift right algebraic word */
1465
void OPPROTO op_sraw (void)
1466
{
1467
    do_sraw();
1468
    RETURN();
1469
}
1470

    
1471
#if defined(TARGET_PPC64)
1472
void OPPROTO op_srad (void)
1473
{
1474
    do_srad();
1475
    RETURN();
1476
}
1477
#endif
1478

    
1479
/* shift right algebraic word immediate */
1480
void OPPROTO op_srawi (void)
1481
{
1482
    uint32_t mask = (uint32_t)PARAM2;
1483

    
1484
    T0 = (int32_t)T0 >> PARAM1;
1485
    if ((int32_t)T1 < 0 && (T1 & mask) != 0) {
1486
        xer_ca = 1;
1487
    } else {
1488
        xer_ca = 0;
1489
    }
1490
    RETURN();
1491
}
1492

    
1493
#if defined(TARGET_PPC64)
1494
void OPPROTO op_sradi (void)
1495
{
1496
    uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3;
1497

    
1498
    T0 = (int64_t)T0 >> PARAM1;
1499
    if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) {
1500
        xer_ca = 1;
1501
    } else {
1502
        xer_ca = 0;
1503
    }
1504
    RETURN();
1505
}
1506
#endif
1507

    
1508
/* shift right word */
1509
void OPPROTO op_srw (void)
1510
{
1511
    if (T1 & 0x20) {
1512
        T0 = 0;
1513
    } else {
1514
        T0 = (uint32_t)T0 >> T1;
1515
    }
1516
    RETURN();
1517
}
1518

    
1519
#if defined(TARGET_PPC64)
1520
void OPPROTO op_srd (void)
1521
{
1522
    if (T1 & 0x40) {
1523
        T0 = 0;
1524
    } else {
1525
        T0 = (uint64_t)T0 >> T1;
1526
    }
1527
    RETURN();
1528
}
1529
#endif
1530

    
1531
void OPPROTO op_sl_T0_T1 (void)
1532
{
1533
    T0 = T0 << T1;
1534
    RETURN();
1535
}
1536

    
1537
void OPPROTO op_sli_T0 (void)
1538
{
1539
    T0 = T0 << PARAM1;
1540
    RETURN();
1541
}
1542

    
1543
void OPPROTO op_srl_T0_T1 (void)
1544
{
1545
    T0 = (uint32_t)T0 >> T1;
1546
    RETURN();
1547
}
1548

    
1549
#if defined(TARGET_PPC64)
1550
void OPPROTO op_srl_T0_T1_64 (void)
1551
{
1552
    T0 = (uint32_t)T0 >> T1;
1553
    RETURN();
1554
}
1555
#endif
1556

    
1557
void OPPROTO op_srli_T0 (void)
1558
{
1559
    T0 = (uint32_t)T0 >> PARAM1;
1560
    RETURN();
1561
}
1562

    
1563
#if defined(TARGET_PPC64)
1564
void OPPROTO op_srli_T0_64 (void)
1565
{
1566
    T0 = (uint64_t)T0 >> PARAM1;
1567
    RETURN();
1568
}
1569
#endif
1570

    
1571
void OPPROTO op_srli_T1 (void)
1572
{
1573
    T1 = (uint32_t)T1 >> PARAM1;
1574
    RETURN();
1575
}
1576

    
1577
#if defined(TARGET_PPC64)
1578
void OPPROTO op_srli_T1_64 (void)
1579
{
1580
    T1 = (uint64_t)T1 >> PARAM1;
1581
    RETURN();
1582
}
1583
#endif
1584

    
1585
/***                       Floating-Point arithmetic                       ***/
1586
/* fadd - fadd. */
1587
PPC_OP(fadd)
1588
{
1589
    FT0 = float64_add(FT0, FT1, &env->fp_status);
1590
    RETURN();
1591
}
1592

    
1593
/* fsub - fsub. */
1594
PPC_OP(fsub)
1595
{
1596
    FT0 = float64_sub(FT0, FT1, &env->fp_status);
1597
    RETURN();
1598
}
1599

    
1600
/* fmul - fmul. */
1601
PPC_OP(fmul)
1602
{
1603
    FT0 = float64_mul(FT0, FT1, &env->fp_status);
1604
    RETURN();
1605
}
1606

    
1607
/* fdiv - fdiv. */
1608
PPC_OP(fdiv)
1609
{
1610
    FT0 = float64_div(FT0, FT1, &env->fp_status);
1611
    RETURN();
1612
}
1613

    
1614
/* fsqrt - fsqrt. */
1615
PPC_OP(fsqrt)
1616
{
1617
    do_fsqrt();
1618
    RETURN();
1619
}
1620

    
1621
/* fres - fres. */
1622
PPC_OP(fres)
1623
{
1624
    do_fres();
1625
    RETURN();
1626
}
1627

    
1628
/* frsqrte  - frsqrte. */
1629
PPC_OP(frsqrte)
1630
{
1631
    do_frsqrte();
1632
    RETURN();
1633
}
1634

    
1635
/* fsel - fsel. */
1636
PPC_OP(fsel)
1637
{
1638
    do_fsel();
1639
    RETURN();
1640
}
1641

    
1642
/***                     Floating-Point multiply-and-add                   ***/
1643
/* fmadd - fmadd. */
1644
PPC_OP(fmadd)
1645
{
1646
    FT0 = float64_mul(FT0, FT1, &env->fp_status);
1647
    FT0 = float64_add(FT0, FT2, &env->fp_status);
1648
    RETURN();
1649
}
1650

    
1651
/* fmsub - fmsub. */
1652
PPC_OP(fmsub)
1653
{
1654
    FT0 = float64_mul(FT0, FT1, &env->fp_status);
1655
    FT0 = float64_sub(FT0, FT2, &env->fp_status);
1656
    RETURN();
1657
}
1658

    
1659
/* fnmadd - fnmadd. - fnmadds - fnmadds. */
1660
PPC_OP(fnmadd)
1661
{
1662
    do_fnmadd();
1663
    RETURN();
1664
}
1665

    
1666
/* fnmsub - fnmsub. */
1667
PPC_OP(fnmsub)
1668
{
1669
    do_fnmsub();
1670
    RETURN();
1671
}
1672

    
1673
/***                     Floating-Point round & convert                    ***/
1674
/* frsp - frsp. */
1675
PPC_OP(frsp)
1676
{
1677
    FT0 = float64_to_float32(FT0, &env->fp_status);
1678
    RETURN();
1679
}
1680

    
1681
/* fctiw - fctiw. */
1682
PPC_OP(fctiw)
1683
{
1684
    do_fctiw();
1685
    RETURN();
1686
}
1687

    
1688
/* fctiwz - fctiwz. */
1689
PPC_OP(fctiwz)
1690
{
1691
    do_fctiwz();
1692
    RETURN();
1693
}
1694

    
1695
/***                         Floating-Point compare                        ***/
1696
/* fcmpu */
1697
PPC_OP(fcmpu)
1698
{
1699
    do_fcmpu();
1700
    RETURN();
1701
}
1702

    
1703
/* fcmpo */
1704
PPC_OP(fcmpo)
1705
{
1706
    do_fcmpo();
1707
    RETURN();
1708
}
1709

    
1710
/***                         Floating-point move                           ***/
1711
/* fabs */
1712
PPC_OP(fabs)
1713
{
1714
    FT0 = float64_abs(FT0);
1715
    RETURN();
1716
}
1717

    
1718
/* fnabs */
1719
PPC_OP(fnabs)
1720
{
1721
    FT0 = float64_abs(FT0);
1722
    FT0 = float64_chs(FT0);
1723
    RETURN();
1724
}
1725

    
1726
/* fneg */
1727
PPC_OP(fneg)
1728
{
1729
    FT0 = float64_chs(FT0);
1730
    RETURN();
1731
}
1732

    
1733
/* Load and store */
1734
#define MEMSUFFIX _raw
1735
#include "op_helper.h"
1736
#include "op_mem.h"
1737
#if !defined(CONFIG_USER_ONLY)
1738
#define MEMSUFFIX _user
1739
#include "op_helper.h"
1740
#include "op_mem.h"
1741
#define MEMSUFFIX _kernel
1742
#include "op_helper.h"
1743
#include "op_mem.h"
1744
#endif
1745

    
1746
/* Special op to check and maybe clear reservation */
1747
void OPPROTO op_check_reservation (void)
1748
{
1749
    if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))
1750
        env->reserve = -1;
1751
    RETURN();
1752
}
1753

    
1754
#if defined(TARGET_PPC64)
1755
void OPPROTO op_check_reservation_64 (void)
1756
{
1757
    if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003))
1758
        env->reserve = -1;
1759
    RETURN();
1760
}
1761
#endif
1762

    
1763
/* Return from interrupt */
1764
#if !defined(CONFIG_USER_ONLY)
1765
void OPPROTO op_rfi (void)
1766
{
1767
    do_rfi();
1768
    RETURN();
1769
}
1770

    
1771
#if defined(TARGET_PPC64)
1772
void OPPROTO op_rfi_32 (void)
1773
{
1774
    do_rfi_32();
1775
    RETURN();
1776
}
1777
#endif
1778
#endif
1779

    
1780
/* Trap word */
1781
void OPPROTO op_tw (void)
1782
{
1783
    do_tw(PARAM1);
1784
    RETURN();
1785
}
1786

    
1787
#if defined(TARGET_PPC64)
1788
void OPPROTO op_td (void)
1789
{
1790
    do_td(PARAM1);
1791
    RETURN();
1792
}
1793
#endif
1794

    
1795
#if !defined(CONFIG_USER_ONLY)
1796
/* tlbia */
1797
PPC_OP(tlbia)
1798
{
1799
    do_tlbia();
1800
    RETURN();
1801
}
1802

    
1803
/* tlbie */
1804
void OPPROTO op_tlbie (void)
1805
{
1806
    do_tlbie();
1807
    RETURN();
1808
}
1809

    
1810
#if defined(TARGET_PPC64)
1811
void OPPROTO op_tlbie_64 (void)
1812
{
1813
    do_tlbie_64();
1814
    RETURN();
1815
}
1816
#endif
1817

    
1818
#if defined(TARGET_PPC64)
1819
void OPPROTO op_slbia (void)
1820
{
1821
    do_slbia();
1822
    RETURN();
1823
}
1824

    
1825
void OPPROTO op_slbie (void)
1826
{
1827
    do_slbie();
1828
    RETURN();
1829
}
1830
#endif
1831
#endif
1832

    
1833
/* PowerPC 602/603/755 software TLB load instructions */
1834
#if !defined(CONFIG_USER_ONLY)
1835
void OPPROTO op_6xx_tlbld (void)
1836
{
1837
    do_load_6xx_tlb(0);
1838
    RETURN();
1839
}
1840

    
1841
void OPPROTO op_6xx_tlbli (void)
1842
{
1843
    do_load_6xx_tlb(1);
1844
    RETURN();
1845
}
1846
#endif
1847

    
1848
/* 601 specific */
1849
void OPPROTO op_load_601_rtcl (void)
1850
{
1851
    T0 = cpu_ppc601_load_rtcl(env);
1852
    RETURN();
1853
}
1854

    
1855
void OPPROTO op_load_601_rtcu (void)
1856
{
1857
    T0 = cpu_ppc601_load_rtcu(env);
1858
    RETURN();
1859
}
1860

    
1861
#if !defined(CONFIG_USER_ONLY)
1862
void OPPROTO op_store_601_rtcl (void)
1863
{
1864
    cpu_ppc601_store_rtcl(env, T0);
1865
    RETURN();
1866
}
1867

    
1868
void OPPROTO op_store_601_rtcu (void)
1869
{
1870
    cpu_ppc601_store_rtcu(env, T0);
1871
    RETURN();
1872
}
1873

    
1874
void OPPROTO op_load_601_bat (void)
1875
{
1876
    T0 = env->IBAT[PARAM1][PARAM2];
1877
    RETURN();
1878
}
1879
#endif /* !defined(CONFIG_USER_ONLY) */
1880

    
1881
/* 601 unified BATs store.
1882
 * To avoid using specific MMU code for 601, we store BATs in
1883
 * IBAT and DBAT simultaneously, then emulate unified BATs.
1884
 */
1885
#if !defined(CONFIG_USER_ONLY)
1886
void OPPROTO op_store_601_batl (void)
1887
{
1888
    int nr = PARAM1;
1889

    
1890
    env->IBAT[1][nr] = T0;
1891
    env->DBAT[1][nr] = T0;
1892
    RETURN();
1893
}
1894

    
1895
void OPPROTO op_store_601_batu (void)
1896
{
1897
    do_store_601_batu(PARAM1);
1898
    RETURN();
1899
}
1900
#endif /* !defined(CONFIG_USER_ONLY) */
1901

    
1902
/* PowerPC 601 specific instructions (POWER bridge) */
1903
/* XXX: those micro-ops need tests ! */
1904
void OPPROTO op_POWER_abs (void)
1905
{
1906
    if (T0 == INT32_MIN)
1907
        T0 = INT32_MAX;
1908
    else if (T0 < 0)
1909
        T0 = -T0;
1910
    RETURN();
1911
}
1912

    
1913
void OPPROTO op_POWER_abso (void)
1914
{
1915
    do_POWER_abso();
1916
    RETURN();
1917
}
1918

    
1919
void OPPROTO op_POWER_clcs (void)
1920
{
1921
    do_POWER_clcs();
1922
    RETURN();
1923
}
1924

    
1925
void OPPROTO op_POWER_div (void)
1926
{
1927
    do_POWER_div();
1928
    RETURN();
1929
}
1930

    
1931
void OPPROTO op_POWER_divo (void)
1932
{
1933
    do_POWER_divo();
1934
    RETURN();
1935
}
1936

    
1937
void OPPROTO op_POWER_divs (void)
1938
{
1939
    do_POWER_divs();
1940
    RETURN();
1941
}
1942

    
1943
void OPPROTO op_POWER_divso (void)
1944
{
1945
    do_POWER_divso();
1946
    RETURN();
1947
}
1948

    
1949
void OPPROTO op_POWER_doz (void)
1950
{
1951
    if ((int32_t)T1 > (int32_t)T0)
1952
        T0 = T1 - T0;
1953
    else
1954
        T0 = 0;
1955
    RETURN();
1956
}
1957

    
1958
void OPPROTO op_POWER_dozo (void)
1959
{
1960
    do_POWER_dozo();
1961
    RETURN();
1962
}
1963

    
1964
void OPPROTO op_load_xer_cmp (void)
1965
{
1966
    T2 = xer_cmp;
1967
    RETURN();
1968
}
1969

    
1970
void OPPROTO op_POWER_maskg (void)
1971
{
1972
    do_POWER_maskg();
1973
    RETURN();
1974
}
1975

    
1976
void OPPROTO op_POWER_maskir (void)
1977
{
1978
    T0 = (T0 & ~T2) | (T1 & T2);
1979
    RETURN();
1980
}
1981

    
1982
void OPPROTO op_POWER_mul (void)
1983
{
1984
    uint64_t tmp;
1985

    
1986
    tmp = (uint64_t)T0 * (uint64_t)T1;
1987
    env->spr[SPR_MQ] = tmp >> 32;
1988
    T0 = tmp;
1989
    RETURN();
1990
}
1991

    
1992
void OPPROTO op_POWER_mulo (void)
1993
{
1994
    do_POWER_mulo();
1995
    RETURN();
1996
}
1997

    
1998
void OPPROTO op_POWER_nabs (void)
1999
{
2000
    if (T0 > 0)
2001
        T0 = -T0;
2002
    RETURN();
2003
}
2004

    
2005
void OPPROTO op_POWER_nabso (void)
2006
{
2007
    /* nabs never overflows */
2008
    if (T0 > 0)
2009
        T0 = -T0;
2010
    xer_ov = 0;
2011
    RETURN();
2012
}
2013

    
2014
/* XXX: factorise POWER rotates... */
2015
void OPPROTO op_POWER_rlmi (void)
2016
{
2017
    T0 = rotl32(T0, T2) & PARAM1;
2018
    T0 |= T1 & PARAM2;
2019
    RETURN();
2020
}
2021

    
2022
void OPPROTO op_POWER_rrib (void)
2023
{
2024
    T2 &= 0x1FUL;
2025
    T0 = rotl32(T0 & INT32_MIN, T2);
2026
    T0 |= T1 & ~rotl32(INT32_MIN, T2);
2027
    RETURN();
2028
}
2029

    
2030
void OPPROTO op_POWER_sle (void)
2031
{
2032
    T1 &= 0x1FUL;
2033
    env->spr[SPR_MQ] = rotl32(T0, T1);
2034
    T0 = T0 << T1;
2035
    RETURN();
2036
}
2037

    
2038
void OPPROTO op_POWER_sleq (void)
2039
{
2040
    uint32_t tmp = env->spr[SPR_MQ];
2041

    
2042
    T1 &= 0x1FUL;
2043
    env->spr[SPR_MQ] = rotl32(T0, T1);
2044
    T0 = T0 << T1;
2045
    T0 |= tmp >> (32 - T1);
2046
    RETURN();
2047
}
2048

    
2049
void OPPROTO op_POWER_sllq (void)
2050
{
2051
    uint32_t msk = -1;
2052

    
2053
    msk = msk << (T1 & 0x1FUL);
2054
    if (T1 & 0x20UL)
2055
        msk = ~msk;
2056
    T1 &= 0x1FUL;
2057
    T0 = (T0 << T1) & msk;
2058
    T0 |= env->spr[SPR_MQ] & ~msk;
2059
    RETURN();
2060
}
2061

    
2062
void OPPROTO op_POWER_slq (void)
2063
{
2064
    uint32_t msk = -1, tmp;
2065

    
2066
    msk = msk << (T1 & 0x1FUL);
2067
    if (T1 & 0x20UL)
2068
        msk = ~msk;
2069
    T1 &= 0x1FUL;
2070
    tmp = rotl32(T0, T1);
2071
    T0 = tmp & msk;
2072
    env->spr[SPR_MQ] = tmp;
2073
    RETURN();
2074
}
2075

    
2076
void OPPROTO op_POWER_sraq (void)
2077
{
2078
    env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL));
2079
    if (T1 & 0x20UL)
2080
        T0 = -1L;
2081
    else
2082
        T0 = (int32_t)T0 >> T1;
2083
    RETURN();
2084
}
2085

    
2086
void OPPROTO op_POWER_sre (void)
2087
{
2088
    T1 &= 0x1FUL;
2089
    env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2090
    T0 = (int32_t)T0 >> T1;
2091
    RETURN();
2092
}
2093

    
2094
void OPPROTO op_POWER_srea (void)
2095
{
2096
    T1 &= 0x1FUL;
2097
    env->spr[SPR_MQ] = T0 >> T1;
2098
    T0 = (int32_t)T0 >> T1;
2099
    RETURN();
2100
}
2101

    
2102
void OPPROTO op_POWER_sreq (void)
2103
{
2104
    uint32_t tmp;
2105
    int32_t msk;
2106

    
2107
    T1 &= 0x1FUL;
2108
    msk = INT32_MIN >> T1;
2109
    tmp = env->spr[SPR_MQ];
2110
    env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2111
    T0 = T0 >> T1;
2112
    T0 |= tmp & msk;
2113
    RETURN();
2114
}
2115

    
2116
void OPPROTO op_POWER_srlq (void)
2117
{
2118
    uint32_t tmp;
2119
    int32_t msk;
2120

    
2121
    msk = INT32_MIN >> (T1 & 0x1FUL);
2122
    if (T1 & 0x20UL)
2123
        msk = ~msk;
2124
    T1 &= 0x1FUL;
2125
    tmp = env->spr[SPR_MQ];
2126
    env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2127
    T0 = T0 >> T1;
2128
    T0 &= msk;
2129
    T0 |= tmp & ~msk;
2130
    RETURN();
2131
}
2132

    
2133
void OPPROTO op_POWER_srq (void)
2134
{
2135
    T1 &= 0x1FUL;
2136
    env->spr[SPR_MQ] = rotl32(T0, 32 - T1);
2137
    T0 = T0 >> T1;
2138
    RETURN();
2139
}
2140

    
2141
/* POWER instructions not implemented in PowerPC 601 */
2142
#if !defined(CONFIG_USER_ONLY)
2143
void OPPROTO op_POWER_mfsri (void)
2144
{
2145
    T1 = T0 >> 28;
2146
    T0 = env->sr[T1];
2147
    RETURN();
2148
}
2149

    
2150
void OPPROTO op_POWER_rac (void)
2151
{
2152
    do_POWER_rac();
2153
    RETURN();
2154
}
2155

    
2156
void OPPROTO op_POWER_rfsvc (void)
2157
{
2158
    do_POWER_rfsvc();
2159
    RETURN();
2160
}
2161
#endif
2162

    
2163
/* PowerPC 602 specific instruction */
2164
#if !defined(CONFIG_USER_ONLY)
2165
void OPPROTO op_602_mfrom (void)
2166
{
2167
    do_op_602_mfrom();
2168
    RETURN();
2169
}
2170
#endif
2171

    
2172
/* PowerPC 4xx specific micro-ops */
2173
void OPPROTO op_405_add_T0_T2 (void)
2174
{
2175
    T0 = (int32_t)T0 + (int32_t)T2;
2176
    RETURN();
2177
}
2178

    
2179
void OPPROTO op_405_mulchw (void)
2180
{
2181
    T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16));
2182
    RETURN();
2183
}
2184

    
2185
void OPPROTO op_405_mulchwu (void)
2186
{
2187
    T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16));
2188
    RETURN();
2189
}
2190

    
2191
void OPPROTO op_405_mulhhw (void)
2192
{
2193
    T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16));
2194
    RETURN();
2195
}
2196

    
2197
void OPPROTO op_405_mulhhwu (void)
2198
{
2199
    T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16));
2200
    RETURN();
2201
}
2202

    
2203
void OPPROTO op_405_mullhw (void)
2204
{
2205
    T0 = ((int16_t)T0) * ((int16_t)T1);
2206
    RETURN();
2207
}
2208

    
2209
void OPPROTO op_405_mullhwu (void)
2210
{
2211
    T0 = ((uint16_t)T0) * ((uint16_t)T1);
2212
    RETURN();
2213
}
2214

    
2215
void OPPROTO op_405_check_ov (void)
2216
{
2217
    do_405_check_ov();
2218
    RETURN();
2219
}
2220

    
2221
void OPPROTO op_405_check_sat (void)
2222
{
2223
    do_405_check_sat();
2224
    RETURN();
2225
}
2226

    
2227
void OPPROTO op_405_check_ovu (void)
2228
{
2229
    if (likely(T0 >= T2)) {
2230
        xer_ov = 0;
2231
    } else {
2232
        xer_ov = 1;
2233
        xer_so = 1;
2234
    }
2235
    RETURN();
2236
}
2237

    
2238
void OPPROTO op_405_check_satu (void)
2239
{
2240
    if (unlikely(T0 < T2)) {
2241
        /* Saturate result */
2242
        T0 = -1;
2243
    }
2244
    RETURN();
2245
}
2246

    
2247
#if !defined(CONFIG_USER_ONLY)
2248
void OPPROTO op_4xx_load_dcr (void)
2249
{
2250
    do_4xx_load_dcr(PARAM1);
2251
    RETURN();
2252
}
2253

    
2254
void OPPROTO op_4xx_store_dcr (void)
2255
{
2256
    do_4xx_store_dcr(PARAM1);
2257
    RETURN();
2258
}
2259

    
2260
/* Return from critical interrupt :
2261
 * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1
2262
 */
2263
void OPPROTO op_4xx_rfci (void)
2264
{
2265
    do_4xx_rfci();
2266
    RETURN();
2267
}
2268

    
2269
void OPPROTO op_4xx_wrte (void)
2270
{
2271
    msr_ee = T0 >> 16;
2272
    RETURN();
2273
}
2274

    
2275
void OPPROTO op_4xx_tlbre_lo (void)
2276
{
2277
    do_4xx_tlbre_lo();
2278
    RETURN();
2279
}
2280

    
2281
void OPPROTO op_4xx_tlbre_hi (void)
2282
{
2283
    do_4xx_tlbre_hi();
2284
    RETURN();
2285
}
2286

    
2287
void OPPROTO op_4xx_tlbsx (void)
2288
{
2289
    do_4xx_tlbsx();
2290
    RETURN();
2291
}
2292

    
2293
void OPPROTO op_4xx_tlbsx_ (void)
2294
{
2295
    do_4xx_tlbsx_();
2296
    RETURN();
2297
}
2298

    
2299
void OPPROTO op_4xx_tlbwe_lo (void)
2300
{
2301
    do_4xx_tlbwe_lo();
2302
    RETURN();
2303
}
2304

    
2305
void OPPROTO op_4xx_tlbwe_hi (void)
2306
{
2307
    do_4xx_tlbwe_hi();
2308
    RETURN();
2309
}
2310
#endif
2311

    
2312
/* SPR micro-ops */
2313
/* 440 specific */
2314
void OPPROTO op_440_dlmzb (void)
2315
{
2316
    do_440_dlmzb();
2317
    RETURN();
2318
}
2319

    
2320
void OPPROTO op_440_dlmzb_update_Rc (void)
2321
{
2322
    if (T0 == 8)
2323
        T0 = 0x2;
2324
    else if (T0 < 4)
2325
        T0 = 0x4;
2326
    else
2327
        T0 = 0x8;
2328
    RETURN();
2329
}
2330

    
2331
#if !defined(CONFIG_USER_ONLY)
2332
void OPPROTO op_store_pir (void)
2333
{
2334
    env->spr[SPR_PIR] = T0 & 0x0000000FUL;
2335
    RETURN();
2336
}
2337

    
2338
void OPPROTO op_load_403_pb (void)
2339
{
2340
    do_load_403_pb(PARAM1);
2341
    RETURN();
2342
}
2343

    
2344
void OPPROTO op_store_403_pb (void)
2345
{
2346
    do_store_403_pb(PARAM1);
2347
    RETURN();
2348
}
2349

    
2350
void OPPROTO op_load_40x_pit (void)
2351
{
2352
    T0 = load_40x_pit(env);
2353
    RETURN();
2354
}
2355

    
2356
void OPPROTO op_store_40x_pit (void)
2357
{
2358
    store_40x_pit(env, T0);
2359
    RETURN();
2360
}
2361

    
2362
void OPPROTO op_store_booke_tcr (void)
2363
{
2364
    store_booke_tcr(env, T0);
2365
    RETURN();
2366
}
2367

    
2368
void OPPROTO op_store_booke_tsr (void)
2369
{
2370
    store_booke_tsr(env, T0);
2371
    RETURN();
2372
}
2373

    
2374
#endif /* !defined(CONFIG_USER_ONLY) */
2375

    
2376
#if defined(TARGET_PPCSPE)
2377
/* SPE extension */
2378
void OPPROTO op_splatw_T1_64 (void)
2379
{
2380
    T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL);
2381
}
2382

    
2383
void OPPROTO op_splatwi_T0_64 (void)
2384
{
2385
    uint64_t tmp = PARAM1;
2386

    
2387
    T0_64 = (tmp << 32) | tmp;
2388
}
2389

    
2390
void OPPROTO op_splatwi_T1_64 (void)
2391
{
2392
    uint64_t tmp = PARAM1;
2393

    
2394
    T1_64 = (tmp << 32) | tmp;
2395
}
2396

    
2397
void OPPROTO op_extsh_T1_64 (void)
2398
{
2399
    T1_64 = (int32_t)((int16_t)T1_64);
2400
    RETURN();
2401
}
2402

    
2403
void OPPROTO op_sli16_T1_64 (void)
2404
{
2405
    T1_64 = T1_64 << 16;
2406
    RETURN();
2407
}
2408

    
2409
void OPPROTO op_sli32_T1_64 (void)
2410
{
2411
    T1_64 = T1_64 << 32;
2412
    RETURN();
2413
}
2414

    
2415
void OPPROTO op_srli32_T1_64 (void)
2416
{
2417
    T1_64 = T1_64 >> 32;
2418
    RETURN();
2419
}
2420

    
2421
void OPPROTO op_evsel (void)
2422
{
2423
    do_evsel();
2424
    RETURN();
2425
}
2426

    
2427
void OPPROTO op_evaddw (void)
2428
{
2429
    do_evaddw();
2430
    RETURN();
2431
}
2432

    
2433
void OPPROTO op_evsubfw (void)
2434
{
2435
    do_evsubfw();
2436
    RETURN();
2437
}
2438

    
2439
void OPPROTO op_evneg (void)
2440
{
2441
    do_evneg();
2442
    RETURN();
2443
}
2444

    
2445
void OPPROTO op_evabs (void)
2446
{
2447
    do_evabs();
2448
    RETURN();
2449
}
2450

    
2451
void OPPROTO op_evextsh (void)
2452
{
2453
    T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) |
2454
        (uint64_t)((int32_t)(int16_t)T0_64);
2455
    RETURN();
2456
}
2457

    
2458
void OPPROTO op_evextsb (void)
2459
{
2460
    T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) |
2461
        (uint64_t)((int32_t)(int8_t)T0_64);
2462
    RETURN();
2463
}
2464

    
2465
void OPPROTO op_evcntlzw (void)
2466
{
2467
    do_evcntlzw();
2468
    RETURN();
2469
}
2470

    
2471
void OPPROTO op_evrndw (void)
2472
{
2473
    do_evrndw();
2474
    RETURN();
2475
}
2476

    
2477
void OPPROTO op_brinc (void)
2478
{
2479
    do_brinc();
2480
    RETURN();
2481
}
2482

    
2483
void OPPROTO op_evcntlsw (void)
2484
{
2485
    do_evcntlsw();
2486
    RETURN();
2487
}
2488

    
2489
void OPPROTO op_evand (void)
2490
{
2491
    T0_64 &= T1_64;
2492
    RETURN();
2493
}
2494

    
2495
void OPPROTO op_evandc (void)
2496
{
2497
    T0_64 &= ~T1_64;
2498
    RETURN();
2499
}
2500

    
2501
void OPPROTO op_evor (void)
2502
{
2503
    T0_64 |= T1_64;
2504
    RETURN();
2505
}
2506

    
2507
void OPPROTO op_evxor (void)
2508
{
2509
    T0_64 ^= T1_64;
2510
    RETURN();
2511
}
2512

    
2513
void OPPROTO op_eveqv (void)
2514
{
2515
    T0_64 = ~(T0_64 ^ T1_64);
2516
    RETURN();
2517
}
2518

    
2519
void OPPROTO op_evnor (void)
2520
{
2521
    T0_64 = ~(T0_64 | T1_64);
2522
    RETURN();
2523
}
2524

    
2525
void OPPROTO op_evorc (void)
2526
{
2527
    T0_64 |= ~T1_64;
2528
    RETURN();
2529
}
2530

    
2531
void OPPROTO op_evnand (void)
2532
{
2533
    T0_64 = ~(T0_64 & T1_64);
2534
    RETURN();
2535
}
2536

    
2537
void OPPROTO op_evsrws (void)
2538
{
2539
    do_evsrws();
2540
    RETURN();
2541
}
2542

    
2543
void OPPROTO op_evsrwu (void)
2544
{
2545
    do_evsrwu();
2546
    RETURN();
2547
}
2548

    
2549
void OPPROTO op_evslw (void)
2550
{
2551
    do_evslw();
2552
    RETURN();
2553
}
2554

    
2555
void OPPROTO op_evrlw (void)
2556
{
2557
    do_evrlw();
2558
    RETURN();
2559
}
2560

    
2561
void OPPROTO op_evmergelo (void)
2562
{
2563
    T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL);
2564
    RETURN();
2565
}
2566

    
2567
void OPPROTO op_evmergehi (void)
2568
{
2569
    T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32);
2570
    RETURN();
2571
}
2572

    
2573
void OPPROTO op_evmergelohi (void)
2574
{
2575
    T0_64 = (T0_64 << 32) | (T1_64 >> 32);
2576
    RETURN();
2577
}
2578

    
2579
void OPPROTO op_evmergehilo (void)
2580
{
2581
    T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL);
2582
    RETURN();
2583
}
2584

    
2585
void OPPROTO op_evcmpgts (void)
2586
{
2587
    do_evcmpgts();
2588
    RETURN();
2589
}
2590

    
2591
void OPPROTO op_evcmpgtu (void)
2592
{
2593
    do_evcmpgtu();
2594
    RETURN();
2595
}
2596

    
2597
void OPPROTO op_evcmplts (void)
2598
{
2599
    do_evcmplts();
2600
    RETURN();
2601
}
2602

    
2603
void OPPROTO op_evcmpltu (void)
2604
{
2605
    do_evcmpltu();
2606
    RETURN();
2607
}
2608

    
2609
void OPPROTO op_evcmpeq (void)
2610
{
2611
    do_evcmpeq();
2612
    RETURN();
2613
}
2614

    
2615
void OPPROTO op_evfssub (void)
2616
{
2617
    do_evfssub();
2618
    RETURN();
2619
}
2620

    
2621
void OPPROTO op_evfsadd (void)
2622
{
2623
    do_evfsadd();
2624
    RETURN();
2625
}
2626

    
2627
void OPPROTO op_evfsnabs (void)
2628
{
2629
    do_evfsnabs();
2630
    RETURN();
2631
}
2632

    
2633
void OPPROTO op_evfsabs (void)
2634
{
2635
    do_evfsabs();
2636
    RETURN();
2637
}
2638

    
2639
void OPPROTO op_evfsneg (void)
2640
{
2641
    do_evfsneg();
2642
    RETURN();
2643
}
2644

    
2645
void OPPROTO op_evfsdiv (void)
2646
{
2647
    do_evfsdiv();
2648
    RETURN();
2649
}
2650

    
2651
void OPPROTO op_evfsmul (void)
2652
{
2653
    do_evfsmul();
2654
    RETURN();
2655
}
2656

    
2657
void OPPROTO op_evfscmplt (void)
2658
{
2659
    do_evfscmplt();
2660
    RETURN();
2661
}
2662

    
2663
void OPPROTO op_evfscmpgt (void)
2664
{
2665
    do_evfscmpgt();
2666
    RETURN();
2667
}
2668

    
2669
void OPPROTO op_evfscmpeq (void)
2670
{
2671
    do_evfscmpeq();
2672
    RETURN();
2673
}
2674

    
2675
void OPPROTO op_evfscfsi (void)
2676
{
2677
    do_evfscfsi();
2678
    RETURN();
2679
}
2680

    
2681
void OPPROTO op_evfscfui (void)
2682
{
2683
    do_evfscfui();
2684
    RETURN();
2685
}
2686

    
2687
void OPPROTO op_evfscfsf (void)
2688
{
2689
    do_evfscfsf();
2690
    RETURN();
2691
}
2692

    
2693
void OPPROTO op_evfscfuf (void)
2694
{
2695
    do_evfscfuf();
2696
    RETURN();
2697
}
2698

    
2699
void OPPROTO op_evfsctsi (void)
2700
{
2701
    do_evfsctsi();
2702
    RETURN();
2703
}
2704

    
2705
void OPPROTO op_evfsctui (void)
2706
{
2707
    do_evfsctui();
2708
    RETURN();
2709
}
2710

    
2711
void OPPROTO op_evfsctsf (void)
2712
{
2713
    do_evfsctsf();
2714
    RETURN();
2715
}
2716

    
2717
void OPPROTO op_evfsctuf (void)
2718
{
2719
    do_evfsctuf();
2720
    RETURN();
2721
}
2722

    
2723
void OPPROTO op_evfsctuiz (void)
2724
{
2725
    do_evfsctuiz();
2726
    RETURN();
2727
}
2728

    
2729
void OPPROTO op_evfsctsiz (void)
2730
{
2731
    do_evfsctsiz();
2732
    RETURN();
2733
}
2734

    
2735
void OPPROTO op_evfststlt (void)
2736
{
2737
    do_evfststlt();
2738
    RETURN();
2739
}
2740

    
2741
void OPPROTO op_evfststgt (void)
2742
{
2743
    do_evfststgt();
2744
    RETURN();
2745
}
2746

    
2747
void OPPROTO op_evfststeq (void)
2748
{
2749
    do_evfststeq();
2750
    RETURN();
2751
}
2752

    
2753
void OPPROTO op_efssub (void)
2754
{
2755
    T0_64 = _do_efssub(T0_64, T1_64);
2756
    RETURN();
2757
}
2758

    
2759
void OPPROTO op_efsadd (void)
2760
{
2761
    T0_64 = _do_efsadd(T0_64, T1_64);
2762
    RETURN();
2763
}
2764

    
2765
void OPPROTO op_efsnabs (void)
2766
{
2767
    T0_64 = _do_efsnabs(T0_64);
2768
    RETURN();
2769
}
2770

    
2771
void OPPROTO op_efsabs (void)
2772
{
2773
    T0_64 = _do_efsabs(T0_64);
2774
    RETURN();
2775
}
2776

    
2777
void OPPROTO op_efsneg (void)
2778
{
2779
    T0_64 = _do_efsneg(T0_64);
2780
    RETURN();
2781
}
2782

    
2783
void OPPROTO op_efsdiv (void)
2784
{
2785
    T0_64 = _do_efsdiv(T0_64, T1_64);
2786
    RETURN();
2787
}
2788

    
2789
void OPPROTO op_efsmul (void)
2790
{
2791
    T0_64 = _do_efsmul(T0_64, T1_64);
2792
    RETURN();
2793
}
2794

    
2795
void OPPROTO op_efscmplt (void)
2796
{
2797
    do_efscmplt();
2798
    RETURN();
2799
}
2800

    
2801
void OPPROTO op_efscmpgt (void)
2802
{
2803
    do_efscmpgt();
2804
    RETURN();
2805
}
2806

    
2807
void OPPROTO op_efscfd (void)
2808
{
2809
    do_efscfd();
2810
    RETURN();
2811
}
2812

    
2813
void OPPROTO op_efscmpeq (void)
2814
{
2815
    do_efscmpeq();
2816
    RETURN();
2817
}
2818

    
2819
void OPPROTO op_efscfsi (void)
2820
{
2821
    do_efscfsi();
2822
    RETURN();
2823
}
2824

    
2825
void OPPROTO op_efscfui (void)
2826
{
2827
    do_efscfui();
2828
    RETURN();
2829
}
2830

    
2831
void OPPROTO op_efscfsf (void)
2832
{
2833
    do_efscfsf();
2834
    RETURN();
2835
}
2836

    
2837
void OPPROTO op_efscfuf (void)
2838
{
2839
    do_efscfuf();
2840
    RETURN();
2841
}
2842

    
2843
void OPPROTO op_efsctsi (void)
2844
{
2845
    do_efsctsi();
2846
    RETURN();
2847
}
2848

    
2849
void OPPROTO op_efsctui (void)
2850
{
2851
    do_efsctui();
2852
    RETURN();
2853
}
2854

    
2855
void OPPROTO op_efsctsf (void)
2856
{
2857
    do_efsctsf();
2858
    RETURN();
2859
}
2860

    
2861
void OPPROTO op_efsctuf (void)
2862
{
2863
    do_efsctuf();
2864
    RETURN();
2865
}
2866

    
2867
void OPPROTO op_efsctsiz (void)
2868
{
2869
    do_efsctsiz();
2870
    RETURN();
2871
}
2872

    
2873
void OPPROTO op_efsctuiz (void)
2874
{
2875
    do_efsctuiz();
2876
    RETURN();
2877
}
2878

    
2879
void OPPROTO op_efststlt (void)
2880
{
2881
    T0 = _do_efststlt(T0_64, T1_64);
2882
    RETURN();
2883
}
2884

    
2885
void OPPROTO op_efststgt (void)
2886
{
2887
    T0 = _do_efststgt(T0_64, T1_64);
2888
    RETURN();
2889
}
2890

    
2891
void OPPROTO op_efststeq (void)
2892
{
2893
    T0 = _do_efststeq(T0_64, T1_64);
2894
    RETURN();
2895
}
2896

    
2897
void OPPROTO op_efdsub (void)
2898
{
2899
    union {
2900
        uint64_t u;
2901
        float64 f;
2902
    } u1, u2;
2903
    u1.u = T0_64;
2904
    u2.u = T1_64;
2905
    u1.f = float64_sub(u1.f, u2.f, &env->spe_status);
2906
    T0_64 = u1.u;
2907
    RETURN();
2908
}
2909

    
2910
void OPPROTO op_efdadd (void)
2911
{
2912
    union {
2913
        uint64_t u;
2914
        float64 f;
2915
    } u1, u2;
2916
    u1.u = T0_64;
2917
    u2.u = T1_64;
2918
    u1.f = float64_add(u1.f, u2.f, &env->spe_status);
2919
    T0_64 = u1.u;
2920
    RETURN();
2921
}
2922

    
2923
void OPPROTO op_efdcfsid (void)
2924
{
2925
    do_efdcfsi();
2926
    RETURN();
2927
}
2928

    
2929
void OPPROTO op_efdcfuid (void)
2930
{
2931
    do_efdcfui();
2932
    RETURN();
2933
}
2934

    
2935
void OPPROTO op_efdnabs (void)
2936
{
2937
    T0_64 |= 0x8000000000000000ULL;
2938
    RETURN();
2939
}
2940

    
2941
void OPPROTO op_efdabs (void)
2942
{
2943
    T0_64 &= ~0x8000000000000000ULL;
2944
    RETURN();
2945
}
2946

    
2947
void OPPROTO op_efdneg (void)
2948
{
2949
    T0_64 ^= 0x8000000000000000ULL;
2950
    RETURN();
2951
}
2952

    
2953
void OPPROTO op_efddiv (void)
2954
{
2955
    union {
2956
        uint64_t u;
2957
        float64 f;
2958
    } u1, u2;
2959
    u1.u = T0_64;
2960
    u2.u = T1_64;
2961
    u1.f = float64_div(u1.f, u2.f, &env->spe_status);
2962
    T0_64 = u1.u;
2963
    RETURN();
2964
}
2965

    
2966
void OPPROTO op_efdmul (void)
2967
{
2968
    union {
2969
        uint64_t u;
2970
        float64 f;
2971
    } u1, u2;
2972
    u1.u = T0_64;
2973
    u2.u = T1_64;
2974
    u1.f = float64_mul(u1.f, u2.f, &env->spe_status);
2975
    T0_64 = u1.u;
2976
    RETURN();
2977
}
2978

    
2979
void OPPROTO op_efdctsidz (void)
2980
{
2981
    do_efdctsiz();
2982
    RETURN();
2983
}
2984

    
2985
void OPPROTO op_efdctuidz (void)
2986
{
2987
    do_efdctuiz();
2988
    RETURN();
2989
}
2990

    
2991
void OPPROTO op_efdcmplt (void)
2992
{
2993
    do_efdcmplt();
2994
    RETURN();
2995
}
2996

    
2997
void OPPROTO op_efdcmpgt (void)
2998
{
2999
    do_efdcmpgt();
3000
    RETURN();
3001
}
3002

    
3003
void OPPROTO op_efdcfs (void)
3004
{
3005
    do_efdcfs();
3006
    RETURN();
3007
}
3008

    
3009
void OPPROTO op_efdcmpeq (void)
3010
{
3011
    do_efdcmpeq();
3012
    RETURN();
3013
}
3014

    
3015
void OPPROTO op_efdcfsi (void)
3016
{
3017
    do_efdcfsi();
3018
    RETURN();
3019
}
3020

    
3021
void OPPROTO op_efdcfui (void)
3022
{
3023
    do_efdcfui();
3024
    RETURN();
3025
}
3026

    
3027
void OPPROTO op_efdcfsf (void)
3028
{
3029
    do_efdcfsf();
3030
    RETURN();
3031
}
3032

    
3033
void OPPROTO op_efdcfuf (void)
3034
{
3035
    do_efdcfuf();
3036
    RETURN();
3037
}
3038

    
3039
void OPPROTO op_efdctsi (void)
3040
{
3041
    do_efdctsi();
3042
    RETURN();
3043
}
3044

    
3045
void OPPROTO op_efdctui (void)
3046
{
3047
    do_efdctui();
3048
    RETURN();
3049
}
3050

    
3051
void OPPROTO op_efdctsf (void)
3052
{
3053
    do_efdctsf();
3054
    RETURN();
3055
}
3056

    
3057
void OPPROTO op_efdctuf (void)
3058
{
3059
    do_efdctuf();
3060
    RETURN();
3061
}
3062

    
3063
void OPPROTO op_efdctuiz (void)
3064
{
3065
    do_efdctuiz();
3066
    RETURN();
3067
}
3068

    
3069
void OPPROTO op_efdctsiz (void)
3070
{
3071
    do_efdctsiz();
3072
    RETURN();
3073
}
3074

    
3075
void OPPROTO op_efdtstlt (void)
3076
{
3077
    T0 = _do_efdtstlt(T0_64, T1_64);
3078
    RETURN();
3079
}
3080

    
3081
void OPPROTO op_efdtstgt (void)
3082
{
3083
    T0 = _do_efdtstgt(T0_64, T1_64);
3084
    RETURN();
3085
}
3086

    
3087
void OPPROTO op_efdtsteq (void)
3088
{
3089
    T0 = _do_efdtsteq(T0_64, T1_64);
3090
    RETURN();
3091
}
3092
#endif /* defined(TARGET_PPCSPE) */