Revision 0573fbfc cpu-exec.c
b/cpu-exec.c | ||
---|---|---|
163 | 163 |
#if defined(TARGET_I386) |
164 | 164 |
flags = env->hflags; |
165 | 165 |
flags |= (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK)); |
166 |
flags |= env->intercept; |
|
166 | 167 |
cs_base = env->segs[R_CS].base; |
167 | 168 |
pc = cs_base + env->eip; |
168 | 169 |
#elif defined(TARGET_ARM) |
... | ... | |
372 | 373 |
tmp_T0 = T0; |
373 | 374 |
#endif |
374 | 375 |
interrupt_request = env->interrupt_request; |
375 |
if (__builtin_expect(interrupt_request, 0)) { |
|
376 |
if (__builtin_expect(interrupt_request, 0) |
|
377 |
#if defined(TARGET_I386) |
|
378 |
&& env->hflags & HF_GIF_MASK |
|
379 |
#endif |
|
380 |
) { |
|
376 | 381 |
if (interrupt_request & CPU_INTERRUPT_DEBUG) { |
377 | 382 |
env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
378 | 383 |
env->exception_index = EXCP_DEBUG; |
... | ... | |
390 | 395 |
#if defined(TARGET_I386) |
391 | 396 |
if ((interrupt_request & CPU_INTERRUPT_SMI) && |
392 | 397 |
!(env->hflags & HF_SMM_MASK)) { |
398 |
svm_check_intercept(SVM_EXIT_SMI); |
|
393 | 399 |
env->interrupt_request &= ~CPU_INTERRUPT_SMI; |
394 | 400 |
do_smm_enter(); |
395 | 401 |
#if defined(__sparc__) && !defined(HOST_SOLARIS) |
... | ... | |
398 | 404 |
T0 = 0; |
399 | 405 |
#endif |
400 | 406 |
} else if ((interrupt_request & CPU_INTERRUPT_HARD) && |
401 |
(env->eflags & IF_MASK) && |
|
407 |
(env->eflags & IF_MASK || env->hflags & HF_HIF_MASK) &&
|
|
402 | 408 |
!(env->hflags & HF_INHIBIT_IRQ_MASK)) { |
403 | 409 |
int intno; |
410 |
svm_check_intercept(SVM_EXIT_INTR); |
|
404 | 411 |
env->interrupt_request &= ~CPU_INTERRUPT_HARD; |
405 | 412 |
intno = cpu_get_pic_interrupt(env); |
406 | 413 |
if (loglevel & CPU_LOG_TB_IN_ASM) { |
... | ... | |
414 | 421 |
#else |
415 | 422 |
T0 = 0; |
416 | 423 |
#endif |
424 |
#if !defined(CONFIG_USER_ONLY) |
|
425 |
} else if ((interrupt_request & CPU_INTERRUPT_VIRQ) && |
|
426 |
(env->eflags & IF_MASK) && !(env->hflags & HF_INHIBIT_IRQ_MASK)) { |
|
427 |
int intno; |
|
428 |
/* FIXME: this should respect TPR */ |
|
429 |
env->interrupt_request &= ~CPU_INTERRUPT_VIRQ; |
|
430 |
stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl), |
|
431 |
ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)) & ~V_IRQ_MASK); |
|
432 |
intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector)); |
|
433 |
if (loglevel & CPU_LOG_TB_IN_ASM) |
|
434 |
fprintf(logfile, "Servicing virtual hardware INT=0x%02x\n", intno); |
|
435 |
do_interrupt(intno, 0, 0, -1, 1); |
|
436 |
#if defined(__sparc__) && !defined(HOST_SOLARIS) |
|
437 |
tmp_T0 = 0; |
|
438 |
#else |
|
439 |
T0 = 0; |
|
440 |
#endif |
|
441 |
#endif |
|
417 | 442 |
} |
418 | 443 |
#elif defined(TARGET_PPC) |
419 | 444 |
#if 0 |
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