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1
/*
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 * Copyright (C) 2006 InnoTek Systemberatung GmbH
3
 *
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 * This file is part of VirtualBox Open Source Edition (OSE), as
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 * available from http://www.virtualbox.org. This file is free software;
6
 * you can redistribute it and/or modify it under the terms of the GNU
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 * General Public License as published by the Free Software Foundation,
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 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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 * distribution. VirtualBox OSE is distributed in the hope that it will
10
 * be useful, but WITHOUT ANY WARRANTY of any kind.
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 *
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 * If you received this file as part of a commercial VirtualBox
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 * distribution, then only the terms of your commercial VirtualBox
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 * license agreement apply instead of the previous paragraph.
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 */
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#include "hw.h"
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#include "audiodev.h"
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#include "audio/audio.h"
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#include "pci.h"
21

    
22
enum {
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    AC97_Reset                     = 0x00,
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    AC97_Master_Volume_Mute        = 0x02,
25
    AC97_Headphone_Volume_Mute     = 0x04,
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    AC97_Master_Volume_Mono_Mute   = 0x06,
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    AC97_Master_Tone_RL            = 0x08,
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    AC97_PC_BEEP_Volume_Mute       = 0x0A,
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    AC97_Phone_Volume_Mute         = 0x0C,
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    AC97_Mic_Volume_Mute           = 0x0E,
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    AC97_Line_In_Volume_Mute       = 0x10,
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    AC97_CD_Volume_Mute            = 0x12,
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    AC97_Video_Volume_Mute         = 0x14,
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    AC97_Aux_Volume_Mute           = 0x16,
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    AC97_PCM_Out_Volume_Mute       = 0x18,
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    AC97_Record_Select             = 0x1A,
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    AC97_Record_Gain_Mute          = 0x1C,
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    AC97_Record_Gain_Mic_Mute      = 0x1E,
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    AC97_General_Purpose           = 0x20,
40
    AC97_3D_Control                = 0x22,
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    AC97_AC_97_RESERVED            = 0x24,
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    AC97_Powerdown_Ctrl_Stat       = 0x26,
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    AC97_Extended_Audio_ID         = 0x28,
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    AC97_Extended_Audio_Ctrl_Stat  = 0x2A,
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    AC97_PCM_Front_DAC_Rate        = 0x2C,
46
    AC97_PCM_Surround_DAC_Rate     = 0x2E,
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    AC97_PCM_LFE_DAC_Rate          = 0x30,
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    AC97_PCM_LR_ADC_Rate           = 0x32,
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    AC97_MIC_ADC_Rate              = 0x34,
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    AC97_6Ch_Vol_C_LFE_Mute        = 0x36,
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    AC97_6Ch_Vol_L_R_Surround_Mute = 0x38,
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    AC97_Vendor_Reserved           = 0x58,
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    AC97_Vendor_ID1                = 0x7c,
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    AC97_Vendor_ID2                = 0x7e
55
};
56

    
57
#define SOFT_VOLUME
58
#define SR_FIFOE 16             /* rwc */
59
#define SR_BCIS  8              /* rwc */
60
#define SR_LVBCI 4              /* rwc */
61
#define SR_CELV  2              /* ro */
62
#define SR_DCH   1              /* ro */
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#define SR_VALID_MASK ((1 << 5) - 1)
64
#define SR_WCLEAR_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
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#define SR_RO_MASK (SR_DCH | SR_CELV)
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#define SR_INT_MASK (SR_FIFOE | SR_BCIS | SR_LVBCI)
67

    
68
#define CR_IOCE  16             /* rw */
69
#define CR_FEIE  8              /* rw */
70
#define CR_LVBIE 4              /* rw */
71
#define CR_RR    2              /* rw */
72
#define CR_RPBM  1              /* rw */
73
#define CR_VALID_MASK ((1 << 5) - 1)
74
#define CR_DONT_CLEAR_MASK (CR_IOCE | CR_FEIE | CR_LVBIE)
75

    
76
#define GC_WR    4              /* rw */
77
#define GC_CR    2              /* rw */
78
#define GC_VALID_MASK ((1 << 6) - 1)
79

    
80
#define GS_MD3   (1<<17)        /* rw */
81
#define GS_AD3   (1<<16)        /* rw */
82
#define GS_RCS   (1<<15)        /* rwc */
83
#define GS_B3S12 (1<<14)        /* ro */
84
#define GS_B2S12 (1<<13)        /* ro */
85
#define GS_B1S12 (1<<12)        /* ro */
86
#define GS_S1R1  (1<<11)        /* rwc */
87
#define GS_S0R1  (1<<10)        /* rwc */
88
#define GS_S1CR  (1<<9)         /* ro */
89
#define GS_S0CR  (1<<8)         /* ro */
90
#define GS_MINT  (1<<7)         /* ro */
91
#define GS_POINT (1<<6)         /* ro */
92
#define GS_PIINT (1<<5)         /* ro */
93
#define GS_RSRVD ((1<<4)|(1<<3))
94
#define GS_MOINT (1<<2)         /* ro */
95
#define GS_MIINT (1<<1)         /* ro */
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#define GS_GSCI  1              /* rwc */
97
#define GS_RO_MASK (GS_B3S12|                   \
98
                    GS_B2S12|                   \
99
                    GS_B1S12|                   \
100
                    GS_S1CR|                    \
101
                    GS_S0CR|                    \
102
                    GS_MINT|                    \
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                    GS_POINT|                   \
104
                    GS_PIINT|                   \
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                    GS_RSRVD|                   \
106
                    GS_MOINT|                   \
107
                    GS_MIINT)
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#define GS_VALID_MASK ((1 << 18) - 1)
109
#define GS_WCLEAR_MASK (GS_RCS|GS_S1R1|GS_S0R1|GS_GSCI)
110

    
111
#define BD_IOC (1<<31)
112
#define BD_BUP (1<<30)
113

    
114
#define EACS_VRA 1
115
#define EACS_VRM 8
116

    
117
#define VOL_MASK 0x1f
118
#define MUTE_SHIFT 15
119

    
120
#define REC_MASK 7
121
enum {
122
    REC_MIC = 0,
123
    REC_CD,
124
    REC_VIDEO,
125
    REC_AUX,
126
    REC_LINE_IN,
127
    REC_STEREO_MIX,
128
    REC_MONO_MIX,
129
    REC_PHONE
130
};
131

    
132
typedef struct BD {
133
    uint32_t addr;
134
    uint32_t ctl_len;
135
} BD;
136

    
137
typedef struct AC97BusMasterRegs {
138
    uint32_t bdbar;             /* rw 0 */
139
    uint8_t civ;                /* ro 0 */
140
    uint8_t lvi;                /* rw 0 */
141
    uint16_t sr;                /* rw 1 */
142
    uint16_t picb;              /* ro 0 */
143
    uint8_t piv;                /* ro 0 */
144
    uint8_t cr;                 /* rw 0 */
145
    unsigned int bd_valid;
146
    BD bd;
147
} AC97BusMasterRegs;
148

    
149
typedef struct AC97LinkState {
150
    PCIDevice dev;
151
    QEMUSoundCard card;
152
    uint32_t glob_cnt;
153
    uint32_t glob_sta;
154
    uint32_t cas;
155
    uint32_t last_samp;
156
    AC97BusMasterRegs bm_regs[3];
157
    uint8_t mixer_data[256];
158
    SWVoiceIn *voice_pi;
159
    SWVoiceOut *voice_po;
160
    SWVoiceIn *voice_mc;
161
    int invalid_freq[3];
162
    uint8_t silence[128];
163
    uint32_t base[2];
164
    int bup_flag;
165
} AC97LinkState;
166

    
167
enum {
168
    BUP_SET = 1,
169
    BUP_LAST = 2
170
};
171

    
172
#ifdef DEBUG_AC97
173
#define dolog(...) AUD_log ("ac97", __VA_ARGS__)
174
#else
175
#define dolog(...)
176
#endif
177

    
178
#define MKREGS(prefix, start)                   \
179
enum {                                          \
180
    prefix ## _BDBAR = start,                   \
181
    prefix ## _CIV = start + 4,                 \
182
    prefix ## _LVI = start + 5,                 \
183
    prefix ## _SR = start + 6,                  \
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    prefix ## _PICB = start + 8,                \
185
    prefix ## _PIV = start + 10,                \
186
    prefix ## _CR = start + 11                  \
187
}
188

    
189
enum {
190
    PI_INDEX = 0,
191
    PO_INDEX,
192
    MC_INDEX,
193
    LAST_INDEX
194
};
195

    
196
MKREGS (PI, PI_INDEX * 16);
197
MKREGS (PO, PO_INDEX * 16);
198
MKREGS (MC, MC_INDEX * 16);
199

    
200
enum {
201
    GLOB_CNT = 0x2c,
202
    GLOB_STA = 0x30,
203
    CAS      = 0x34
204
};
205

    
206
#define GET_BM(index) (((index) >> 4) & 3)
207

    
208
static void po_callback (void *opaque, int free);
209
static void pi_callback (void *opaque, int avail);
210
static void mc_callback (void *opaque, int avail);
211

    
212
static void warm_reset (AC97LinkState *s)
213
{
214
    (void) s;
215
}
216

    
217
static void cold_reset (AC97LinkState * s)
218
{
219
    (void) s;
220
}
221

    
222
static void fetch_bd (AC97LinkState *s, AC97BusMasterRegs *r)
223
{
224
    uint8_t b[8];
225

    
226
    cpu_physical_memory_read (r->bdbar + r->civ * 8, b, 8);
227
    r->bd_valid = 1;
228
    r->bd.addr = le32_to_cpu (*(uint32_t *) &b[0]) & ~3;
229
    r->bd.ctl_len = le32_to_cpu (*(uint32_t *) &b[4]);
230
    r->picb = r->bd.ctl_len & 0xffff;
231
    dolog ("bd %2d addr=%#x ctl=%#06x len=%#x(%d bytes)\n",
232
           r->civ, r->bd.addr, r->bd.ctl_len >> 16,
233
           r->bd.ctl_len & 0xffff,
234
           (r->bd.ctl_len & 0xffff) << 1);
235
}
236

    
237
static void update_sr (AC97LinkState *s, AC97BusMasterRegs *r, uint32_t new_sr)
238
{
239
    int event = 0;
240
    int level = 0;
241
    uint32_t new_mask = new_sr & SR_INT_MASK;
242
    uint32_t old_mask = r->sr & SR_INT_MASK;
243
    uint32_t masks[] = {GS_PIINT, GS_POINT, GS_MINT};
244

    
245
    if (new_mask ^ old_mask) {
246
        /** @todo is IRQ deasserted when only one of status bits is cleared? */
247
        if (!new_mask) {
248
            event = 1;
249
            level = 0;
250
        }
251
        else {
252
            if ((new_mask & SR_LVBCI) && (r->cr & CR_LVBIE)) {
253
                event = 1;
254
                level = 1;
255
            }
256
            if ((new_mask & SR_BCIS) && (r->cr & CR_IOCE)) {
257
                event = 1;
258
                level = 1;
259
            }
260
        }
261
    }
262

    
263
    r->sr = new_sr;
264

    
265
    dolog ("IOC%d LVB%d sr=%#x event=%d level=%d\n",
266
           r->sr & SR_BCIS, r->sr & SR_LVBCI,
267
           r->sr,
268
           event, level);
269

    
270
    if (!event)
271
        return;
272

    
273
    if (level) {
274
        s->glob_sta |= masks[r - s->bm_regs];
275
        dolog ("set irq level=1\n");
276
        qemu_set_irq (s->dev.irq[0], 1);
277
    }
278
    else {
279
        s->glob_sta &= ~masks[r - s->bm_regs];
280
        dolog ("set irq level=0\n");
281
        qemu_set_irq (s->dev.irq[0], 0);
282
    }
283
}
284

    
285
static void voice_set_active (AC97LinkState *s, int bm_index, int on)
286
{
287
    switch (bm_index) {
288
    case PI_INDEX:
289
        AUD_set_active_in (s->voice_pi, on);
290
        break;
291

    
292
    case PO_INDEX:
293
        AUD_set_active_out (s->voice_po, on);
294
        break;
295

    
296
    case MC_INDEX:
297
        AUD_set_active_in (s->voice_mc, on);
298
        break;
299

    
300
    default:
301
        AUD_log ("ac97", "invalid bm_index(%d) in voice_set_active", bm_index);
302
        break;
303
    }
304
}
305

    
306
static void reset_bm_regs (AC97LinkState *s, AC97BusMasterRegs *r)
307
{
308
    dolog ("reset_bm_regs\n");
309
    r->bdbar = 0;
310
    r->civ = 0;
311
    r->lvi = 0;
312
    /** todo do we need to do that? */
313
    update_sr (s, r, SR_DCH);
314
    r->picb = 0;
315
    r->piv = 0;
316
    r->cr = r->cr & CR_DONT_CLEAR_MASK;
317
    r->bd_valid = 0;
318

    
319
    voice_set_active (s, r - s->bm_regs, 0);
320
    memset (s->silence, 0, sizeof (s->silence));
321
}
322

    
323
static void mixer_store (AC97LinkState *s, uint32_t i, uint16_t v)
324
{
325
    if (i + 2 > sizeof (s->mixer_data)) {
326
        dolog ("mixer_store: index %d out of bounds %zd\n",
327
               i, sizeof (s->mixer_data));
328
        return;
329
    }
330

    
331
    s->mixer_data[i + 0] = v & 0xff;
332
    s->mixer_data[i + 1] = v >> 8;
333
}
334

    
335
static uint16_t mixer_load (AC97LinkState *s, uint32_t i)
336
{
337
    uint16_t val = 0xffff;
338

    
339
    if (i + 2 > sizeof (s->mixer_data)) {
340
        dolog ("mixer_store: index %d out of bounds %zd\n",
341
               i, sizeof (s->mixer_data));
342
    }
343
    else {
344
        val = s->mixer_data[i + 0] | (s->mixer_data[i + 1] << 8);
345
    }
346

    
347
    return val;
348
}
349

    
350
static void open_voice (AC97LinkState *s, int index, int freq)
351
{
352
    struct audsettings as;
353

    
354
    as.freq = freq;
355
    as.nchannels = 2;
356
    as.fmt = AUD_FMT_S16;
357
    as.endianness = 0;
358

    
359
    if (freq > 0) {
360
        s->invalid_freq[index] = 0;
361
        switch (index) {
362
        case PI_INDEX:
363
            s->voice_pi = AUD_open_in (
364
                &s->card,
365
                s->voice_pi,
366
                "ac97.pi",
367
                s,
368
                pi_callback,
369
                &as
370
                );
371
            break;
372

    
373
        case PO_INDEX:
374
            s->voice_po = AUD_open_out (
375
                &s->card,
376
                s->voice_po,
377
                "ac97.po",
378
                s,
379
                po_callback,
380
                &as
381
                );
382
            break;
383

    
384
        case MC_INDEX:
385
            s->voice_mc = AUD_open_in (
386
                &s->card,
387
                s->voice_mc,
388
                "ac97.mc",
389
                s,
390
                mc_callback,
391
                &as
392
                );
393
            break;
394
        }
395
    }
396
    else {
397
        s->invalid_freq[index] = freq;
398
        switch (index) {
399
        case PI_INDEX:
400
            AUD_close_in (&s->card, s->voice_pi);
401
            s->voice_pi = NULL;
402
            break;
403

    
404
        case PO_INDEX:
405
            AUD_close_out (&s->card, s->voice_po);
406
            s->voice_po = NULL;
407
            break;
408

    
409
        case MC_INDEX:
410
            AUD_close_in (&s->card, s->voice_mc);
411
            s->voice_mc = NULL;
412
            break;
413
        }
414
    }
415
}
416

    
417
static void reset_voices (AC97LinkState *s, uint8_t active[LAST_INDEX])
418
{
419
    uint16_t freq;
420

    
421
    freq = mixer_load (s, AC97_PCM_LR_ADC_Rate);
422
    open_voice (s, PI_INDEX, freq);
423
    AUD_set_active_in (s->voice_pi, active[PI_INDEX]);
424

    
425
    freq = mixer_load (s, AC97_PCM_Front_DAC_Rate);
426
    open_voice (s, PO_INDEX, freq);
427
    AUD_set_active_out (s->voice_po, active[PO_INDEX]);
428

    
429
    freq = mixer_load (s, AC97_MIC_ADC_Rate);
430
    open_voice (s, MC_INDEX, freq);
431
    AUD_set_active_in (s->voice_mc, active[MC_INDEX]);
432
}
433

    
434
#ifdef USE_MIXER
435
static void set_volume (AC97LinkState *s, int index,
436
                        audmixerctl_t mt, uint32_t val)
437
{
438
    int mute = (val >> MUTE_SHIFT) & 1;
439
    uint8_t rvol = VOL_MASK - (val & VOL_MASK);
440
    uint8_t lvol = VOL_MASK - ((val >> 8) & VOL_MASK);
441
    rvol = 255 * rvol / VOL_MASK;
442
    lvol = 255 * lvol / VOL_MASK;
443

    
444
#ifdef SOFT_VOLUME
445
    if (index == AC97_Master_Volume_Mute) {
446
        AUD_set_volume_out (s->voice_po, mute, lvol, rvol);
447
    }
448
    else {
449
        AUD_set_volume (mt, &mute, &lvol, &rvol);
450
    }
451
#else
452
    AUD_set_volume (mt, &mute, &lvol, &rvol);
453
#endif
454

    
455
    rvol = VOL_MASK - ((VOL_MASK * rvol) / 255);
456
    lvol = VOL_MASK - ((VOL_MASK * lvol) / 255);
457
    mixer_store (s, index, val);
458
}
459

    
460
static audrecsource_t ac97_to_aud_record_source (uint8_t i)
461
{
462
    switch (i) {
463
    case REC_MIC:
464
        return AUD_REC_MIC;
465

    
466
    case REC_CD:
467
        return AUD_REC_CD;
468

    
469
    case REC_VIDEO:
470
        return AUD_REC_VIDEO;
471

    
472
    case REC_AUX:
473
        return AUD_REC_AUX;
474

    
475
    case REC_LINE_IN:
476
        return AUD_REC_LINE_IN;
477

    
478
    case REC_PHONE:
479
        return AUD_REC_PHONE;
480

    
481
    default:
482
        dolog ("Unknown record source %d, using MIC\n", i);
483
        return AUD_REC_MIC;
484
    }
485
}
486

    
487
static uint8_t aud_to_ac97_record_source (audrecsource_t rs)
488
{
489
    switch (rs) {
490
    case AUD_REC_MIC:
491
        return REC_MIC;
492

    
493
    case AUD_REC_CD:
494
        return REC_CD;
495

    
496
    case AUD_REC_VIDEO:
497
        return REC_VIDEO;
498

    
499
    case AUD_REC_AUX:
500
        return REC_AUX;
501

    
502
    case AUD_REC_LINE_IN:
503
        return REC_LINE_IN;
504

    
505
    case AUD_REC_PHONE:
506
        return REC_PHONE;
507

    
508
    default:
509
        dolog ("Unknown audio recording source %d using MIC\n", rs);
510
        return REC_MIC;
511
    }
512
}
513

    
514
static void record_select (AC97LinkState *s, uint32_t val)
515
{
516
    uint8_t rs = val & REC_MASK;
517
    uint8_t ls = (val >> 8) & REC_MASK;
518
    audrecsource_t ars = ac97_to_aud_record_source (rs);
519
    audrecsource_t als = ac97_to_aud_record_source (ls);
520
    AUD_set_record_source (&als, &ars);
521
    rs = aud_to_ac97_record_source (ars);
522
    ls = aud_to_ac97_record_source (als);
523
    mixer_store (s, AC97_Record_Select, rs | (ls << 8));
524
}
525
#endif
526

    
527
static void mixer_reset (AC97LinkState *s)
528
{
529
    uint8_t active[LAST_INDEX];
530

    
531
    dolog ("mixer_reset\n");
532
    memset (s->mixer_data, 0, sizeof (s->mixer_data));
533
    memset (active, 0, sizeof (active));
534
    mixer_store (s, AC97_Reset                   , 0x0000); /* 6940 */
535
    mixer_store (s, AC97_Master_Volume_Mono_Mute , 0x8000);
536
    mixer_store (s, AC97_PC_BEEP_Volume_Mute     , 0x0000);
537

    
538
    mixer_store (s, AC97_Phone_Volume_Mute       , 0x8008);
539
    mixer_store (s, AC97_Mic_Volume_Mute         , 0x8008);
540
    mixer_store (s, AC97_CD_Volume_Mute          , 0x8808);
541
    mixer_store (s, AC97_Aux_Volume_Mute         , 0x8808);
542
    mixer_store (s, AC97_Record_Gain_Mic_Mute    , 0x8000);
543
    mixer_store (s, AC97_General_Purpose         , 0x0000);
544
    mixer_store (s, AC97_3D_Control              , 0x0000);
545
    mixer_store (s, AC97_Powerdown_Ctrl_Stat     , 0x000f);
546

    
547
    /*
548
     * Sigmatel 9700 (STAC9700)
549
     */
550
    mixer_store (s, AC97_Vendor_ID1              , 0x8384);
551
    mixer_store (s, AC97_Vendor_ID2              , 0x7600); /* 7608 */
552

    
553
    mixer_store (s, AC97_Extended_Audio_ID       , 0x0809);
554
    mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, 0x0009);
555
    mixer_store (s, AC97_PCM_Front_DAC_Rate      , 0xbb80);
556
    mixer_store (s, AC97_PCM_Surround_DAC_Rate   , 0xbb80);
557
    mixer_store (s, AC97_PCM_LFE_DAC_Rate        , 0xbb80);
558
    mixer_store (s, AC97_PCM_LR_ADC_Rate         , 0xbb80);
559
    mixer_store (s, AC97_MIC_ADC_Rate            , 0xbb80);
560

    
561
#ifdef USE_MIXER
562
    record_select (s, 0);
563
    set_volume (s, AC97_Master_Volume_Mute, AUD_MIXER_VOLUME  , 0x8000);
564
    set_volume (s, AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM    , 0x8808);
565
    set_volume (s, AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN, 0x8808);
566
#endif
567
    reset_voices (s, active);
568
}
569

    
570
/**
571
 * Native audio mixer
572
 * I/O Reads
573
 */
574
static uint32_t nam_readb (void *opaque, uint32_t addr)
575
{
576
    AC97LinkState *s = opaque;
577
    dolog ("U nam readb %#x\n", addr);
578
    s->cas = 0;
579
    return ~0U;
580
}
581

    
582
static uint32_t nam_readw (void *opaque, uint32_t addr)
583
{
584
    AC97LinkState *s = opaque;
585
    uint32_t val = ~0U;
586
    uint32_t index = addr - s->base[0];
587
    s->cas = 0;
588
    val = mixer_load (s, index);
589
    return val;
590
}
591

    
592
static uint32_t nam_readl (void *opaque, uint32_t addr)
593
{
594
    AC97LinkState *s = opaque;
595
    dolog ("U nam readl %#x\n", addr);
596
    s->cas = 0;
597
    return ~0U;
598
}
599

    
600
/**
601
 * Native audio mixer
602
 * I/O Writes
603
 */
604
static void nam_writeb (void *opaque, uint32_t addr, uint32_t val)
605
{
606
    AC97LinkState *s = opaque;
607
    dolog ("U nam writeb %#x <- %#x\n", addr, val);
608
    s->cas = 0;
609
}
610

    
611
static void nam_writew (void *opaque, uint32_t addr, uint32_t val)
612
{
613
    AC97LinkState *s = opaque;
614
    uint32_t index = addr - s->base[0];
615
    s->cas = 0;
616
    switch (index) {
617
    case AC97_Reset:
618
        mixer_reset (s);
619
        break;
620
    case AC97_Powerdown_Ctrl_Stat:
621
        val &= ~0xf;
622
        val |= mixer_load (s, index) & 0xf;
623
        mixer_store (s, index, val);
624
        break;
625
#ifdef USE_MIXER
626
    case AC97_Master_Volume_Mute:
627
        set_volume (s, index, AUD_MIXER_VOLUME, val);
628
        break;
629
    case AC97_PCM_Out_Volume_Mute:
630
        set_volume (s, index, AUD_MIXER_PCM, val);
631
        break;
632
    case AC97_Line_In_Volume_Mute:
633
        set_volume (s, index, AUD_MIXER_LINE_IN, val);
634
        break;
635
    case AC97_Record_Select:
636
        record_select (s, val);
637
        break;
638
#endif
639
    case AC97_Vendor_ID1:
640
    case AC97_Vendor_ID2:
641
        dolog ("Attempt to write vendor ID to %#x\n", val);
642
        break;
643
    case AC97_Extended_Audio_ID:
644
        dolog ("Attempt to write extended audio ID to %#x\n", val);
645
        break;
646
    case AC97_Extended_Audio_Ctrl_Stat:
647
        if (!(val & EACS_VRA)) {
648
            mixer_store (s, AC97_PCM_Front_DAC_Rate, 0xbb80);
649
            mixer_store (s, AC97_PCM_LR_ADC_Rate,    0xbb80);
650
            open_voice (s, PI_INDEX, 48000);
651
            open_voice (s, PO_INDEX, 48000);
652
        }
653
        if (!(val & EACS_VRM)) {
654
            mixer_store (s, AC97_MIC_ADC_Rate, 0xbb80);
655
            open_voice (s, MC_INDEX, 48000);
656
        }
657
        dolog ("Setting extended audio control to %#x\n", val);
658
        mixer_store (s, AC97_Extended_Audio_Ctrl_Stat, val);
659
        break;
660
    case AC97_PCM_Front_DAC_Rate:
661
        if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
662
            mixer_store (s, index, val);
663
            dolog ("Set front DAC rate to %d\n", val);
664
            open_voice (s, PO_INDEX, val);
665
        }
666
        else {
667
            dolog ("Attempt to set front DAC rate to %d, "
668
                   "but VRA is not set\n",
669
                   val);
670
        }
671
        break;
672
    case AC97_MIC_ADC_Rate:
673
        if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRM) {
674
            mixer_store (s, index, val);
675
            dolog ("Set MIC ADC rate to %d\n", val);
676
            open_voice (s, MC_INDEX, val);
677
        }
678
        else {
679
            dolog ("Attempt to set MIC ADC rate to %d, "
680
                   "but VRM is not set\n",
681
                   val);
682
        }
683
        break;
684
    case AC97_PCM_LR_ADC_Rate:
685
        if (mixer_load (s, AC97_Extended_Audio_Ctrl_Stat) & EACS_VRA) {
686
            mixer_store (s, index, val);
687
            dolog ("Set front LR ADC rate to %d\n", val);
688
            open_voice (s, PI_INDEX, val);
689
        }
690
        else {
691
            dolog ("Attempt to set LR ADC rate to %d, but VRA is not set\n",
692
                    val);
693
        }
694
        break;
695
    default:
696
        dolog ("U nam writew %#x <- %#x\n", addr, val);
697
        mixer_store (s, index, val);
698
        break;
699
    }
700
}
701

    
702
static void nam_writel (void *opaque, uint32_t addr, uint32_t val)
703
{
704
    AC97LinkState *s = opaque;
705
    dolog ("U nam writel %#x <- %#x\n", addr, val);
706
    s->cas = 0;
707
}
708

    
709
/**
710
 * Native audio bus master
711
 * I/O Reads
712
 */
713
static uint32_t nabm_readb (void *opaque, uint32_t addr)
714
{
715
    AC97LinkState *s = opaque;
716
    AC97BusMasterRegs *r = NULL;
717
    uint32_t index = addr - s->base[1];
718
    uint32_t val = ~0U;
719

    
720
    switch (index) {
721
    case CAS:
722
        dolog ("CAS %d\n", s->cas);
723
        val = s->cas;
724
        s->cas = 1;
725
        break;
726
    case PI_CIV:
727
    case PO_CIV:
728
    case MC_CIV:
729
        r = &s->bm_regs[GET_BM (index)];
730
        val = r->civ;
731
        dolog ("CIV[%d] -> %#x\n", GET_BM (index), val);
732
        break;
733
    case PI_LVI:
734
    case PO_LVI:
735
    case MC_LVI:
736
        r = &s->bm_regs[GET_BM (index)];
737
        val = r->lvi;
738
        dolog ("LVI[%d] -> %#x\n", GET_BM (index), val);
739
        break;
740
    case PI_PIV:
741
    case PO_PIV:
742
    case MC_PIV:
743
        r = &s->bm_regs[GET_BM (index)];
744
        val = r->piv;
745
        dolog ("PIV[%d] -> %#x\n", GET_BM (index), val);
746
        break;
747
    case PI_CR:
748
    case PO_CR:
749
    case MC_CR:
750
        r = &s->bm_regs[GET_BM (index)];
751
        val = r->cr;
752
        dolog ("CR[%d] -> %#x\n", GET_BM (index), val);
753
        break;
754
    case PI_SR:
755
    case PO_SR:
756
    case MC_SR:
757
        r = &s->bm_regs[GET_BM (index)];
758
        val = r->sr & 0xff;
759
        dolog ("SRb[%d] -> %#x\n", GET_BM (index), val);
760
        break;
761
    default:
762
        dolog ("U nabm readb %#x -> %#x\n", addr, val);
763
        break;
764
    }
765
    return val;
766
}
767

    
768
static uint32_t nabm_readw (void *opaque, uint32_t addr)
769
{
770
    AC97LinkState *s = opaque;
771
    AC97BusMasterRegs *r = NULL;
772
    uint32_t index = addr - s->base[1];
773
    uint32_t val = ~0U;
774

    
775
    switch (index) {
776
    case PI_SR:
777
    case PO_SR:
778
    case MC_SR:
779
        r = &s->bm_regs[GET_BM (index)];
780
        val = r->sr;
781
        dolog ("SR[%d] -> %#x\n", GET_BM (index), val);
782
        break;
783
    case PI_PICB:
784
    case PO_PICB:
785
    case MC_PICB:
786
        r = &s->bm_regs[GET_BM (index)];
787
        val = r->picb;
788
        dolog ("PICB[%d] -> %#x\n", GET_BM (index), val);
789
        break;
790
    default:
791
        dolog ("U nabm readw %#x -> %#x\n", addr, val);
792
        break;
793
    }
794
    return val;
795
}
796

    
797
static uint32_t nabm_readl (void *opaque, uint32_t addr)
798
{
799
    AC97LinkState *s = opaque;
800
    AC97BusMasterRegs *r = NULL;
801
    uint32_t index = addr - s->base[1];
802
    uint32_t val = ~0U;
803

    
804
    switch (index) {
805
    case PI_BDBAR:
806
    case PO_BDBAR:
807
    case MC_BDBAR:
808
        r = &s->bm_regs[GET_BM (index)];
809
        val = r->bdbar;
810
        dolog ("BMADDR[%d] -> %#x\n", GET_BM (index), val);
811
        break;
812
    case PI_CIV:
813
    case PO_CIV:
814
    case MC_CIV:
815
        r = &s->bm_regs[GET_BM (index)];
816
        val = r->civ | (r->lvi << 8) | (r->sr << 16);
817
        dolog ("CIV LVI SR[%d] -> %#x, %#x, %#x\n", GET_BM (index),
818
               r->civ, r->lvi, r->sr);
819
        break;
820
    case PI_PICB:
821
    case PO_PICB:
822
    case MC_PICB:
823
        r = &s->bm_regs[GET_BM (index)];
824
        val = r->picb | (r->piv << 16) | (r->cr << 24);
825
        dolog ("PICB PIV CR[%d] -> %#x %#x %#x %#x\n", GET_BM (index),
826
               val, r->picb, r->piv, r->cr);
827
        break;
828
    case GLOB_CNT:
829
        val = s->glob_cnt;
830
        dolog ("glob_cnt -> %#x\n", val);
831
        break;
832
    case GLOB_STA:
833
        val = s->glob_sta | GS_S0CR;
834
        dolog ("glob_sta -> %#x\n", val);
835
        break;
836
    default:
837
        dolog ("U nabm readl %#x -> %#x\n", addr, val);
838
        break;
839
    }
840
    return val;
841
}
842

    
843
/**
844
 * Native audio bus master
845
 * I/O Writes
846
 */
847
static void nabm_writeb (void *opaque, uint32_t addr, uint32_t val)
848
{
849
    AC97LinkState *s = opaque;
850
    AC97BusMasterRegs *r = NULL;
851
    uint32_t index = addr - s->base[1];
852
    switch (index) {
853
    case PI_LVI:
854
    case PO_LVI:
855
    case MC_LVI:
856
        r = &s->bm_regs[GET_BM (index)];
857
        if ((r->cr & CR_RPBM) && (r->sr & SR_DCH)) {
858
            r->sr &= ~(SR_DCH | SR_CELV);
859
            r->civ = r->piv;
860
            r->piv = (r->piv + 1) % 32;
861
            fetch_bd (s, r);
862
        }
863
        r->lvi = val % 32;
864
        dolog ("LVI[%d] <- %#x\n", GET_BM (index), val);
865
        break;
866
    case PI_CR:
867
    case PO_CR:
868
    case MC_CR:
869
        r = &s->bm_regs[GET_BM (index)];
870
        if (val & CR_RR) {
871
            reset_bm_regs (s, r);
872
        }
873
        else {
874
            r->cr = val & CR_VALID_MASK;
875
            if (!(r->cr & CR_RPBM)) {
876
                voice_set_active (s, r - s->bm_regs, 0);
877
                r->sr |= SR_DCH;
878
            }
879
            else {
880
                r->civ = r->piv;
881
                r->piv = (r->piv + 1) % 32;
882
                fetch_bd (s, r);
883
                r->sr &= ~SR_DCH;
884
                voice_set_active (s, r - s->bm_regs, 1);
885
            }
886
        }
887
        dolog ("CR[%d] <- %#x (cr %#x)\n", GET_BM (index), val, r->cr);
888
        break;
889
    case PI_SR:
890
    case PO_SR:
891
    case MC_SR:
892
        r = &s->bm_regs[GET_BM (index)];
893
        r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
894
        update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
895
        dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
896
        break;
897
    default:
898
        dolog ("U nabm writeb %#x <- %#x\n", addr, val);
899
        break;
900
    }
901
}
902

    
903
static void nabm_writew (void *opaque, uint32_t addr, uint32_t val)
904
{
905
    AC97LinkState *s = opaque;
906
    AC97BusMasterRegs *r = NULL;
907
    uint32_t index = addr - s->base[1];
908
    switch (index) {
909
    case PI_SR:
910
    case PO_SR:
911
    case MC_SR:
912
        r = &s->bm_regs[GET_BM (index)];
913
        r->sr |= val & ~(SR_RO_MASK | SR_WCLEAR_MASK);
914
        update_sr (s, r, r->sr & ~(val & SR_WCLEAR_MASK));
915
        dolog ("SR[%d] <- %#x (sr %#x)\n", GET_BM (index), val, r->sr);
916
        break;
917
    default:
918
        dolog ("U nabm writew %#x <- %#x\n", addr, val);
919
        break;
920
    }
921
}
922

    
923
static void nabm_writel (void *opaque, uint32_t addr, uint32_t val)
924
{
925
    AC97LinkState *s = opaque;
926
    AC97BusMasterRegs *r = NULL;
927
    uint32_t index = addr - s->base[1];
928
    switch (index) {
929
    case PI_BDBAR:
930
    case PO_BDBAR:
931
    case MC_BDBAR:
932
        r = &s->bm_regs[GET_BM (index)];
933
        r->bdbar = val & ~3;
934
        dolog ("BDBAR[%d] <- %#x (bdbar %#x)\n",
935
               GET_BM (index), val, r->bdbar);
936
        break;
937
    case GLOB_CNT:
938
        if (val & GC_WR)
939
            warm_reset (s);
940
        if (val & GC_CR)
941
            cold_reset (s);
942
        if (!(val & (GC_WR | GC_CR)))
943
            s->glob_cnt = val & GC_VALID_MASK;
944
        dolog ("glob_cnt <- %#x (glob_cnt %#x)\n", val, s->glob_cnt);
945
        break;
946
    case GLOB_STA:
947
        s->glob_sta &= ~(val & GS_WCLEAR_MASK);
948
        s->glob_sta |= (val & ~(GS_WCLEAR_MASK | GS_RO_MASK)) & GS_VALID_MASK;
949
        dolog ("glob_sta <- %#x (glob_sta %#x)\n", val, s->glob_sta);
950
        break;
951
    default:
952
        dolog ("U nabm writel %#x <- %#x\n", addr, val);
953
        break;
954
    }
955
}
956

    
957
static int write_audio (AC97LinkState *s, AC97BusMasterRegs *r,
958
                        int max, int *stop)
959
{
960
    uint8_t tmpbuf[4096];
961
    uint32_t addr = r->bd.addr;
962
    uint32_t temp = r->picb << 1;
963
    uint32_t written = 0;
964
    int to_copy = 0;
965
    temp = audio_MIN (temp, max);
966

    
967
    if (!temp) {
968
        *stop = 1;
969
        return 0;
970
    }
971

    
972
    while (temp) {
973
        int copied;
974
        to_copy = audio_MIN (temp, sizeof (tmpbuf));
975
        cpu_physical_memory_read (addr, tmpbuf, to_copy);
976
        copied = AUD_write (s->voice_po, tmpbuf, to_copy);
977
        dolog ("write_audio max=%x to_copy=%x copied=%x\n",
978
               max, to_copy, copied);
979
        if (!copied) {
980
            *stop = 1;
981
            break;
982
        }
983
        temp -= copied;
984
        addr += copied;
985
        written += copied;
986
    }
987

    
988
    if (!temp) {
989
        if (to_copy < 4) {
990
            dolog ("whoops\n");
991
            s->last_samp = 0;
992
        }
993
        else {
994
            s->last_samp = *(uint32_t *) &tmpbuf[to_copy - 4];
995
        }
996
    }
997

    
998
    r->bd.addr = addr;
999
    return written;
1000
}
1001

    
1002
static void write_bup (AC97LinkState *s, int elapsed)
1003
{
1004
    int written = 0;
1005

    
1006
    dolog ("write_bup\n");
1007
    if (!(s->bup_flag & BUP_SET)) {
1008
        if (s->bup_flag & BUP_LAST) {
1009
            int i;
1010
            uint8_t *p = s->silence;
1011
            for (i = 0; i < sizeof (s->silence) / 4; i++, p += 4) {
1012
                *(uint32_t *) p = s->last_samp;
1013
            }
1014
        }
1015
        else {
1016
            memset (s->silence, 0, sizeof (s->silence));
1017
        }
1018
        s->bup_flag |= BUP_SET;
1019
    }
1020

    
1021
    while (elapsed) {
1022
        int temp = audio_MIN (elapsed, sizeof (s->silence));
1023
        while (temp) {
1024
            int copied = AUD_write (s->voice_po, s->silence, temp);
1025
            if (!copied)
1026
                return;
1027
            temp -= copied;
1028
            elapsed -= copied;
1029
            written += copied;
1030
        }
1031
    }
1032
}
1033

    
1034
static int read_audio (AC97LinkState *s, AC97BusMasterRegs *r,
1035
                       int max, int *stop)
1036
{
1037
    uint8_t tmpbuf[4096];
1038
    uint32_t addr = r->bd.addr;
1039
    uint32_t temp = r->picb << 1;
1040
    uint32_t nread = 0;
1041
    int to_copy = 0;
1042
    SWVoiceIn *voice = (r - s->bm_regs) == MC_INDEX ? s->voice_mc : s->voice_pi;
1043

    
1044
    temp = audio_MIN (temp, max);
1045

    
1046
    if (!temp) {
1047
        *stop = 1;
1048
        return 0;
1049
    }
1050

    
1051
    while (temp) {
1052
        int acquired;
1053
        to_copy = audio_MIN (temp, sizeof (tmpbuf));
1054
        acquired = AUD_read (voice, tmpbuf, to_copy);
1055
        if (!acquired) {
1056
            *stop = 1;
1057
            break;
1058
        }
1059
        cpu_physical_memory_write (addr, tmpbuf, acquired);
1060
        temp -= acquired;
1061
        addr += acquired;
1062
        nread += acquired;
1063
    }
1064

    
1065
    r->bd.addr = addr;
1066
    return nread;
1067
}
1068

    
1069
static void transfer_audio (AC97LinkState *s, int index, int elapsed)
1070
{
1071
    AC97BusMasterRegs *r = &s->bm_regs[index];
1072
    int written = 0, stop = 0;
1073

    
1074
    if (s->invalid_freq[index]) {
1075
        AUD_log ("ac97", "attempt to use voice %d with invalid frequency %d\n",
1076
                 index, s->invalid_freq[index]);
1077
        return;
1078
    }
1079

    
1080
    if (r->sr & SR_DCH) {
1081
        if (r->cr & CR_RPBM) {
1082
            switch (index) {
1083
            case PO_INDEX:
1084
                write_bup (s, elapsed);
1085
                break;
1086
            }
1087
        }
1088
        return;
1089
    }
1090

    
1091
    while ((elapsed >> 1) && !stop) {
1092
        int temp;
1093

    
1094
        if (!r->bd_valid) {
1095
            dolog ("invalid bd\n");
1096
            fetch_bd (s, r);
1097
        }
1098

    
1099
        if (!r->picb) {
1100
            dolog ("fresh bd %d is empty %#x %#x\n",
1101
                   r->civ, r->bd.addr, r->bd.ctl_len);
1102
            if (r->civ == r->lvi) {
1103
                r->sr |= SR_DCH; /* CELV? */
1104
                s->bup_flag = 0;
1105
                break;
1106
            }
1107
            r->sr &= ~SR_CELV;
1108
            r->civ = r->piv;
1109
            r->piv = (r->piv + 1) % 32;
1110
            fetch_bd (s, r);
1111
            return;
1112
        }
1113

    
1114
        switch (index) {
1115
        case PO_INDEX:
1116
            temp = write_audio (s, r, elapsed, &stop);
1117
            written += temp;
1118
            elapsed -= temp;
1119
            r->picb -= (temp >> 1);
1120
            break;
1121

    
1122
        case PI_INDEX:
1123
        case MC_INDEX:
1124
            temp = read_audio (s, r, elapsed, &stop);
1125
            elapsed -= temp;
1126
            r->picb -= (temp >> 1);
1127
            break;
1128
        }
1129

    
1130
        if (!r->picb) {
1131
            uint32_t new_sr = r->sr & ~SR_CELV;
1132

    
1133
            if (r->bd.ctl_len & BD_IOC) {
1134
                new_sr |= SR_BCIS;
1135
            }
1136

    
1137
            if (r->civ == r->lvi) {
1138
                dolog ("Underrun civ (%d) == lvi (%d)\n", r->civ, r->lvi);
1139

    
1140
                new_sr |= SR_LVBCI | SR_DCH | SR_CELV;
1141
                stop = 1;
1142
                s->bup_flag = (r->bd.ctl_len & BD_BUP) ? BUP_LAST : 0;
1143
            }
1144
            else {
1145
                r->civ = r->piv;
1146
                r->piv = (r->piv + 1) % 32;
1147
                fetch_bd (s, r);
1148
            }
1149

    
1150
            update_sr (s, r, new_sr);
1151
        }
1152
    }
1153
}
1154

    
1155
static void pi_callback (void *opaque, int avail)
1156
{
1157
    transfer_audio (opaque, PI_INDEX, avail);
1158
}
1159

    
1160
static void mc_callback (void *opaque, int avail)
1161
{
1162
    transfer_audio (opaque, MC_INDEX, avail);
1163
}
1164

    
1165
static void po_callback (void *opaque, int free)
1166
{
1167
    transfer_audio (opaque, PO_INDEX, free);
1168
}
1169

    
1170
static const VMStateDescription vmstate_ac97_bm_regs = {
1171
    .name = "ac97_bm_regs",
1172
    .version_id = 1,
1173
    .minimum_version_id = 1,
1174
    .minimum_version_id_old = 1,
1175
    .fields      = (VMStateField []) {
1176
        VMSTATE_UINT32(bdbar, AC97BusMasterRegs),
1177
        VMSTATE_UINT8(civ, AC97BusMasterRegs),
1178
        VMSTATE_UINT8(lvi, AC97BusMasterRegs),
1179
        VMSTATE_UINT16(sr, AC97BusMasterRegs),
1180
        VMSTATE_UINT16(picb, AC97BusMasterRegs),
1181
        VMSTATE_UINT8(piv, AC97BusMasterRegs),
1182
        VMSTATE_UINT8(cr, AC97BusMasterRegs),
1183
        VMSTATE_UINT32(bd_valid, AC97BusMasterRegs),
1184
        VMSTATE_UINT32(bd.addr, AC97BusMasterRegs),
1185
        VMSTATE_UINT32(bd.ctl_len, AC97BusMasterRegs),
1186
        VMSTATE_END_OF_LIST()
1187
    }
1188
};
1189

    
1190
static int ac97_post_load (void *opaque, int version_id)
1191
{
1192
    uint8_t active[LAST_INDEX];
1193
    AC97LinkState *s = opaque;
1194

    
1195
#ifdef USE_MIXER
1196
    record_select (s, mixer_load (s, AC97_Record_Select));
1197
#define V_(a, b) set_volume (s, a, b, mixer_load (s, a))
1198
    V_ (AC97_Master_Volume_Mute, AUD_MIXER_VOLUME);
1199
    V_ (AC97_PCM_Out_Volume_Mute, AUD_MIXER_PCM);
1200
    V_ (AC97_Line_In_Volume_Mute, AUD_MIXER_LINE_IN);
1201
#undef V_
1202
#endif
1203
    active[PI_INDEX] = !!(s->bm_regs[PI_INDEX].cr & CR_RPBM);
1204
    active[PO_INDEX] = !!(s->bm_regs[PO_INDEX].cr & CR_RPBM);
1205
    active[MC_INDEX] = !!(s->bm_regs[MC_INDEX].cr & CR_RPBM);
1206
    reset_voices (s, active);
1207

    
1208
    s->bup_flag = 0;
1209
    s->last_samp = 0;
1210
    return 0;
1211
}
1212

    
1213
static bool is_version_2 (void *opaque, int version_id)
1214
{
1215
    return version_id == 2;
1216
}
1217

    
1218
static const VMStateDescription vmstate_ac97 = {
1219
    .name = "ac97",
1220
    .version_id = 3,
1221
    .minimum_version_id = 2,
1222
    .minimum_version_id_old = 2,
1223
    .post_load = ac97_post_load,
1224
    .fields      = (VMStateField []) {
1225
        VMSTATE_PCI_DEVICE(dev, AC97LinkState),
1226
        VMSTATE_UINT32(glob_cnt, AC97LinkState),
1227
        VMSTATE_UINT32(glob_sta, AC97LinkState),
1228
        VMSTATE_UINT32(cas, AC97LinkState),
1229
        VMSTATE_STRUCT_ARRAY(bm_regs, AC97LinkState, 3, 1,
1230
                             vmstate_ac97_bm_regs, AC97BusMasterRegs),
1231
        VMSTATE_BUFFER(mixer_data, AC97LinkState),
1232
        VMSTATE_UNUSED_TEST(is_version_2, 3),
1233
        VMSTATE_END_OF_LIST()
1234
    }
1235
};
1236

    
1237
static void ac97_map (PCIDevice *pci_dev, int region_num,
1238
                      pcibus_t addr, pcibus_t size, int type)
1239
{
1240
    AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, pci_dev);
1241
    PCIDevice *d = &s->dev;
1242

    
1243
    if (!region_num) {
1244
        s->base[0] = addr;
1245
        register_ioport_read (addr, 256 * 1, 1, nam_readb, d);
1246
        register_ioport_read (addr, 256 * 2, 2, nam_readw, d);
1247
        register_ioport_read (addr, 256 * 4, 4, nam_readl, d);
1248
        register_ioport_write (addr, 256 * 1, 1, nam_writeb, d);
1249
        register_ioport_write (addr, 256 * 2, 2, nam_writew, d);
1250
        register_ioport_write (addr, 256 * 4, 4, nam_writel, d);
1251
    }
1252
    else {
1253
        s->base[1] = addr;
1254
        register_ioport_read (addr, 64 * 1, 1, nabm_readb, d);
1255
        register_ioport_read (addr, 64 * 2, 2, nabm_readw, d);
1256
        register_ioport_read (addr, 64 * 4, 4, nabm_readl, d);
1257
        register_ioport_write (addr, 64 * 1, 1, nabm_writeb, d);
1258
        register_ioport_write (addr, 64 * 2, 2, nabm_writew, d);
1259
        register_ioport_write (addr, 64 * 4, 4, nabm_writel, d);
1260
    }
1261
}
1262

    
1263
static void ac97_on_reset (void *opaque)
1264
{
1265
    AC97LinkState *s = opaque;
1266

    
1267
    reset_bm_regs (s, &s->bm_regs[0]);
1268
    reset_bm_regs (s, &s->bm_regs[1]);
1269
    reset_bm_regs (s, &s->bm_regs[2]);
1270

    
1271
    /*
1272
     * Reset the mixer too. The Windows XP driver seems to rely on
1273
     * this. At least it wants to read the vendor id before it resets
1274
     * the codec manually.
1275
     */
1276
    mixer_reset (s);
1277
}
1278

    
1279
static int ac97_initfn (PCIDevice *dev)
1280
{
1281
    AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
1282
    uint8_t *c = s->dev.config;
1283

    
1284
    /* TODO: no need to override */
1285
    c[PCI_COMMAND] = 0x00;      /* pcicmd pci command rw, ro */
1286
    c[PCI_COMMAND + 1] = 0x00;
1287

    
1288
    /* TODO: */
1289
    c[PCI_STATUS] = PCI_STATUS_FAST_BACK;      /* pcists pci status rwc, ro */
1290
    c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
1291

    
1292
    c[PCI_CLASS_PROG] = 0x00;      /* pi programming interface ro */
1293

    
1294
    /* TODO set when bar is registered. no need to override. */
1295
    /* nabmar native audio mixer base address rw */
1296
    c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
1297
    c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
1298
    c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
1299
    c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
1300

    
1301
    /* TODO set when bar is registered. no need to override. */
1302
      /* nabmbar native audio bus mastering base address rw */
1303
    c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
1304
    c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
1305
    c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
1306
    c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
1307

    
1308
    c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86;      /* svid subsystem vendor id rwo */
1309
    c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
1310

    
1311
    c[PCI_SUBSYSTEM_ID] = 0x00;      /* sid subsystem id rwo */
1312
    c[PCI_SUBSYSTEM_ID + 1] = 0x00;
1313

    
1314
    c[PCI_INTERRUPT_LINE] = 0x00;      /* intr_ln interrupt line rw */
1315
    /* TODO: RST# value should be 0. */
1316
    c[PCI_INTERRUPT_PIN] = 0x01;      /* intr_pn interrupt pin ro */
1317

    
1318
    pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO,
1319
                      ac97_map);
1320
    pci_register_bar (&s->dev, 1, 64 * 4, PCI_BASE_ADDRESS_SPACE_IO, ac97_map);
1321
    qemu_register_reset (ac97_on_reset, s);
1322
    AUD_register_card ("ac97", &s->card);
1323
    ac97_on_reset (s);
1324
    return 0;
1325
}
1326

    
1327
int ac97_init (PCIBus *bus)
1328
{
1329
    pci_create_simple (bus, -1, "AC97");
1330
    return 0;
1331
}
1332

    
1333
static PCIDeviceInfo ac97_info = {
1334
    .qdev.name    = "AC97",
1335
    .qdev.desc    = "Intel 82801AA AC97 Audio",
1336
    .qdev.size    = sizeof (AC97LinkState),
1337
    .qdev.vmsd    = &vmstate_ac97,
1338
    .init         = ac97_initfn,
1339
    .vendor_id    = PCI_VENDOR_ID_INTEL,
1340
    .device_id    = PCI_DEVICE_ID_INTEL_82801AA_5,
1341
    .revision     = 0x01,
1342
    .class_id     = PCI_CLASS_MULTIMEDIA_AUDIO,
1343
};
1344

    
1345
static void ac97_register (void)
1346
{
1347
    pci_qdev_register (&ac97_info);
1348
}
1349
device_init (ac97_register);
1350