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# Date Author Comment
293579e5 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add rotation ops

Signed-off-by: Aurelien Jarno <>

9517094f 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add ext16u op

Add an ext16u op, either using the uxth instruction on ARMv6+ or two
shifts on previous ARM versions. In both cases the result use the same
number or less instructions than the pure TCG version.

Also move all sign extension code to separate functions, so that they...

244b1e81 04/19/2010 08:03 am Aurelien Jarno

tcg/arm: add bswap ops

Add an bswap16 and bswap32 ops, either using the rev and rev16
instructions on ARMv6+ or shifts and logical operations on previous
ARM versions. In both cases the result use less instructions than
the pure TCG version.

These ops are also needed by the qemu_ld/st functions....

e4a7d5e8 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: explicitely list clobbered/reserved regs

Instead of writing very compact code, declare all registers that are
clobbered or reserved one by one. This makes the code easier to read.

Also declare all the 16 registers to TCG, and mark pc as reserved....

2488b41b 04/19/2010 08:02 am Aurelien Jarno

tcg/arm: align 64-bit arguments in function calls

As specified by the "Procedure Call Standard for the ARM Architecture".

Signed-off-by: Aurelien Jarno <>

32d98fbd 03/26/2010 10:52 pm Richard Henderson

tcg: Allow target-specific implementation of NOR.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9940a96b 03/26/2010 10:44 pm Richard Henderson

tcg: Allow target-specific implementation of NAND.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8d625cf1 03/26/2010 10:42 pm Richard Henderson

tcg: Allow target-specific implementation of EQV.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a63b5829 03/26/2010 09:48 pm Paolo Bonzini

remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

2b71cd72 03/14/2010 11:04 pm Aurelien Jarno

tcg/arm: use helpers for divu/remu

Signed-off-by: Aurelien Jarno <>

31d66551 03/14/2010 11:04 pm Aurelien Jarno

tcg: add div/rem 32-bit helpers

Some targets like ARM would benefit to use 32-bit helpers for
div/rem/divu/remu.

Create a #define for div2 so that targets can select between
div, div2 and helper implementation. Use the helper version if none
of the #define are present....

932234f6 03/13/2010 12:46 pm Aurelien Jarno

tcg/arm: implement andc op

Signed-off-by: Aurelien Jarno <>

d3f137e3 03/03/2010 12:12 am Aurelien Jarno

tcg/arm: merge the two sets of #define for optional ops

Signed-off-by: Aurelien Jarno <>

36828256 02/20/2010 10:35 am Richard Henderson

tcg: Add comments for all optional instructions not implemented.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

f878d2d2 08/22/2009 02:55 pm Laurent Desnogues

ARM back-end: Add TCG not

this patch:

- implements TCG not.

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

cb4e581f 07/18/2009 03:20 pm Laurent Desnogues

this patch improves the ARM back-end in the following way:

- use movw/movt to load immediate values for ARMv7-A
- implement add/sub/and/or/xor with immediate (only 8-bit)

Laurent

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Andrzej Zaborowski <>

379f6698 07/17/2009 03:12 pm Paul Brook

Userspace guest address offsetting

Re-implement GUEST_BASE support.
Offset guest ddress space by default if the guest binary contains
regions below the host mmap_min_addr.
Implement support for i386, x86-64 and arm hosts.

Signed-off-by: Riku Voipio <>...

2d69f359 07/17/2009 01:21 pm Paul Brook

ARM host fixes

Minor TCG cleanups and warning fixes for ARM hosts.

Signed-off-by: Paul Brook <>

66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162

e63d7abd 03/08/2009 04:45 pm blueswir1

Prune unused TCG_AREGs

Remove definitions for TCG_AREGs corresponding to AREG definitions
removed in r6778.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162

3233f0d4 12/01/2008 04:02 am balrog

Use libgcc __clear_cache to clean icache, when available.

Calling the clear cache syscall directly generates an illegal instruction
on some (armv4) kernels.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5843 c046a42c-6fe2-441c-8c8c-71466251a162

bedba0cd 05/23/2008 03:47 pm balrog

Define TCG_TARGET_CALL_STACK_OFFSET on arm.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4541 c046a42c-6fe2-441c-8c8c-71466251a162

650bbb36 05/20/2008 02:26 pm balrog

Implement neg_i32, clean-up.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162

811d4cf4 05/20/2008 02:59 am balrog

ARM host support for TCG targets.

Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162