Statistics
| Branch: | Revision:

root / tcg / i386 @ 06ea77bc

# Date Author Comment
dc397ca3 06/10/2010 09:52 pm Aurelien Jarno

tcg-i386: fix andi r, r, 0xff

Signed-off-by: Aurelien Jarno <>

447d681e 06/10/2010 09:41 pm Aurelien Jarno

tcg-i386: remove use of _Bool that slipped code review

Signed-off-by: Aurelien Jarno <>

5d8a4f8f 06/10/2010 01:16 am Richard Henderson

tcg-i386: Merge 64-bit generation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

e4d58b41 06/09/2010 12:18 pm Richard Henderson

tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

3b6dac34 06/09/2010 12:18 pm Richard Henderson

tcg: Add TYPE parameter to tcg_out_mov.

Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.

Introduce a TCG_TYPE_REG enumerator to represent the "native width"
of the host register, and to distinguish the usage from "pointer data"...

4309a79b 06/03/2010 01:02 am Aurelien Jarno

tcg-i386: fix a typo

Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8.

Signed-off-by: Aurelien Jarno <>

c28b14c6 06/02/2010 11:51 pm Aurelien Jarno

tcg-i386: declare tcg_out_tlb_load() inline

Declare tcg_out_tlb_load() inline so that we don't loose optimisations
with commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16.

Signed-off-by: Aurelien Jarno <>

82bb07db 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Remove some ifdefs in qemu_ld/st.

Tidy some code by replacing ifdefs by C ifs.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

96b4cf38 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Tidy data16 prefixes.

Include it in the opcode as an extension, as with P_EXT
or the REX bits in the x86-64 port.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

be5a4eb7 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out TLB Hit path from qemu_ld/st.

Splitting out these functions will allow further cleanups.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

1a6dc1e4 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Swap order of TLB hit and miss paths.

Make fallthru be TLB hit and branch be TLB miss. Doing this
both improves branch prediction and will allow further cleanup.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8516a044 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out tlb load function.

Share some code between qemu_ld and qemu_st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

5d1e4e85 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Use lea for three-operand add.

The result is shorter than the mov+add that TCG would
otherwise generate for us.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

78686523 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Nuke trailing whitespace.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

55e082a7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8u and ext16u operations.

Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6817c355 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8s and ext16s operations.

Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a369a702 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy immediate arithmetic operations.

Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8u
directly in setcond. Use tgen_arithi in qemu_ld/st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

81570a70 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy non-immediate arithmetic operations.

Add more OPC values, and tgen_arithr. Use the later throughout.

Note that normal reg/reg arithmetic now uses the Gv,Ev opcode form
instead of the Ev,Gv opcode form used previously. Both forms
disassemble properly, and so there's no visible change when diffing...

ef10b106 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy movi.

Define and use OPC_MOVL_Iv.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6858614e 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy push/pop.

Move tcg_out_push/pop up in the file so that they can be used
by qemu_ld/st. Define a tcg_out_pushi to be used as well.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

aadb21a4 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy calls.

Define OPC_CALL_Jz, generated by tcg_out_calli; use the later
throughout. Unify the calls within qemu_st; adjust the stack
with a single pop if applicable.

Define and use EXT_CALLN_Ev for indirect calls.

Signed-off-by: Richard Henderson <>...

3c3accc6 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ret.

Define and use OPC_RET.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

32a8ffb9 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy setcc.

Define and use OPC_SETCC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9363dedb 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy unary arithmetic.

Define OPC_GRP3 and EXT3_FOO to match. Use them instead of
bare constants.

Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to
make it clear which extension should be used with which opcode.

Signed-off-by: Richard Henderson <>...

0566d387 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy multiply.

Define and use OPC_IMUL_GvEv{,Ib,Iz}.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

b3e66df7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy xchg.

Define and use OPC_XCHG_ax_r32.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

34a6d0b7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy lea.

Implement full modrm+sib addressing mode processing.
Use that in qemu_ld/st to output the LEA.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

da441cff 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Tidy jumps.

Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a042ef94 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Eliminate extra move from qemu_ld64.

If the address register overlaps one of the output registers
simply issue the clobbering load last, rather than emitting
an extra move of the address register.

Signed-off-by: Richard Henderson <>...

af266089 05/20/2010 10:13 pm Richard Henderson

tcg-i386: Tidy move operations.

Define OPC_MOVB* and OPC_MOVL*; use them throughout.
Use tcg_out_ld/st instead of bare tcg_out_modrm_offset
when it makes sense.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

f53dba01 05/20/2010 10:09 pm Richard Henderson

tcg-i386: Tidy shift operations.

Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

fcb5dac1 05/20/2010 10:04 pm Richard Henderson

tcg-i386: Tidy bswap operations.

Define OPC_BSWAP. Factor opcode emission to separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

6648e296 05/19/2010 09:46 am Richard Henderson

tcg-i386: Allocate call-saved registers first.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

4ab50ccf 05/19/2010 09:46 am Richard Henderson

tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.

Setting the registers one by one is easier to read, and gets
optimized by the compiler just the same.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...

32d98fbd 03/26/2010 10:52 pm Richard Henderson

tcg: Allow target-specific implementation of NOR.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

9940a96b 03/26/2010 10:44 pm Richard Henderson

tcg: Allow target-specific implementation of NAND.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8d625cf1 03/26/2010 10:42 pm Richard Henderson

tcg: Allow target-specific implementation of EQV.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

a63b5829 03/26/2010 09:48 pm Paolo Bonzini

remove remaining occurrences AREG[1-9] and TCG_AREG[1-9]

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

31d66551 03/14/2010 11:04 pm Aurelien Jarno

tcg: add div/rem 32-bit helpers

Some targets like ARM would benefit to use 32-bit helpers for
div/rem/divu/remu.

Create a #define for div2 so that targets can select between
div, div2 and helper implementation. Use the helper version if none
of the #define are present....

20cb400d 03/12/2010 08:34 pm Paul Brook

Remove TLB from userspace

Remove TLB from userspace CPU structure.

Signed-off-by: Paul Brook <>

36828256 02/20/2010 10:35 am Richard Henderson

tcg: Add comments for all optional instructions not implemented.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>

1d2699ae 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement setcond.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

f75b56c1 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement small forward branches.

There are places, like brcond2, where we know that the destination
of a forward branch will be within 127 bytes.

Add the R_386_PC8 relocation type to support this. Add a flag to
tcg_out_jxx and tcg_out_brcond* to enable it. Set the flag in the...

b785e476 11/14/2009 02:17 am Magnus Damm

tcg/i386: remove duplicate sar opcode

Signed-off-by: Magnus Damm <>
Signed-off-by: Aurelien Jarno <>

5f0ce17f 10/04/2009 02:24 pm Aurelien Jarno

tcg/i386: add support for ext{8,16}u_i32 TCG ops

Signed-off-by: Aurelien Jarno <>

17cf428f 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: generates dec/inc instead of sub/add when possible

We must take care that dec/inc do not compute CF, which is needed by
add2/sub2.

Signed-off-by: Aurelien Jarno <>

b70650cb 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: optimize and $0xff(ff), reg

Signed-off-by: Aurelien Jarno <>

adea8197 07/17/2009 09:50 pm Juan Quintela

Userspace guest address offsetting

Fix type in i386 tcg.

Signed-off-by: Juan Quintela <>

379f6698 07/17/2009 03:12 pm Paul Brook

Userspace guest address offsetting

Re-implement GUEST_BASE support.
Offset guest ddress space by default if the guest binary contains
regions below the host mmap_min_addr.
Implement support for i386, x86-64 and arm hosts.

Signed-off-by: Riku Voipio <>...

5d40cd63 03/13/2009 11:35 am aurel32

tcg/x86: add bswap16_i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162

66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162

9619376c 03/10/2009 09:37 pm aurel32

tcg/x86: add not/neg/extu/bswap/rot i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162

e63d7abd 03/08/2009 04:45 pm blueswir1

Prune unused TCG_AREGs

Remove definitions for TCG_AREGs corresponding to AREG definitions
removed in r6778.

Signed-off-by: Stuart Brady <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6779 c046a42c-6fe2-441c-8c8c-71466251a162

3e9a474e 12/14/2008 07:29 pm aurel32

tcg: kill two warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162

9db3ba4d 12/13/2008 08:57 pm aurel32

TCG x86/x86-64: use move with zero-extend for loads/stores

Starting with version 4.3, gcc returns the result of a function in
rax/eax/ax/al instead of rax/eax, depending of the return type. As
a consequence we should use a zero extend moe in TCG loads/stores....

d4a9eb1f 10/05/2008 12:59 pm blueswir1

Add some missing static and const qualifiers, reg_names only used if NDEBUG set

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162

79383c9c 08/30/2008 12:51 pm blueswir1

Fix some warnings that would be generated by gcc -Wredundant-decls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162

d643ccca 07/07/2008 11:15 pm bellard

64 bit signed comparison fix (Juergen Lock)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162

affa3264 05/25/2008 09:41 pm bellard

jump optimizations

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162

39cf05d3 05/22/2008 05:59 pm bellard

more generic call codegen

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4528 c046a42c-6fe2-441c-8c8c-71466251a162

b03cce8e 05/10/2008 01:52 pm bellard

fixed global variable handling with qemu load/stores - initial global prologue/epilogue implementation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4406 c046a42c-6fe2-441c-8c8c-71466251a162

f54b3f92 04/12/2008 11:14 pm aurel32

HPPA (PA-RISC) host support

(Stuart Brady)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162

e4d5434c 03/13/2008 07:34 pm blueswir1

Fix i32 memory backed variables on 64-bit host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4044 c046a42c-6fe2-441c-8c8c-71466251a162

0954d0d9 03/11/2008 11:01 pm blueswir1

Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4039 c046a42c-6fe2-441c-8c8c-71466251a162

623e265c 02/10/2008 04:09 pm pbrook

Simplify TCG relocation bugfix.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3974 c046a42c-6fe2-441c-8c8c-71466251a162

bb210e78 02/03/2008 11:06 pm bellard

compare fix

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3962 c046a42c-6fe2-441c-8c8c-71466251a162

c896fe29 02/01/2008 12:05 pm bellard

TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162