root / target-i386 / op.c @ 07d2c595
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/*
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* i386 micro operations
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#define ASM_SOFTMMU
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#include "exec.h" |
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#ifdef TARGET_X86_64
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#define REG (env->regs[8]) |
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#define REGNAME _R8
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[9]) |
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#define REGNAME _R9
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[10]) |
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#define REGNAME _R10
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[11]) |
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#define REGNAME _R11
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[12]) |
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#define REGNAME _R12
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[13]) |
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#define REGNAME _R13
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[14]) |
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#define REGNAME _R14
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#define REG (env->regs[15]) |
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#define REGNAME _R15
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#include "opreg_template.h" |
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#undef REG
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#undef REGNAME
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#endif
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/* multiply/divide */
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/* XXX: add eflags optimizations */
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/* XXX: add non P4 style flags */
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void OPPROTO op_mulb_AL_T0(void) |
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{
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unsigned int res; |
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res = (uint8_t)EAX * (uint8_t)T0; |
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EAX = (EAX & ~0xffff) | res;
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CC_DST = res; |
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CC_SRC = (res & 0xff00);
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} |
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void OPPROTO op_imulb_AL_T0(void) |
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{
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int res;
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res = (int8_t)EAX * (int8_t)T0; |
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EAX = (EAX & ~0xffff) | (res & 0xffff); |
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CC_DST = res; |
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CC_SRC = (res != (int8_t)res); |
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} |
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void OPPROTO op_mulw_AX_T0(void) |
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{
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unsigned int res; |
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res = (uint16_t)EAX * (uint16_t)T0; |
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EAX = (EAX & ~0xffff) | (res & 0xffff); |
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EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff); |
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CC_DST = res; |
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CC_SRC = res >> 16;
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} |
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void OPPROTO op_imulw_AX_T0(void) |
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{
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int res;
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res = (int16_t)EAX * (int16_t)T0; |
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EAX = (EAX & ~0xffff) | (res & 0xffff); |
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EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff); |
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CC_DST = res; |
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CC_SRC = (res != (int16_t)res); |
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} |
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void OPPROTO op_mull_EAX_T0(void) |
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{
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uint64_t res; |
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res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0); |
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EAX = (uint32_t)res; |
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EDX = (uint32_t)(res >> 32);
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CC_DST = (uint32_t)res; |
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CC_SRC = (uint32_t)(res >> 32);
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} |
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void OPPROTO op_imull_EAX_T0(void) |
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{
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int64_t res; |
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res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0); |
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EAX = (uint32_t)(res); |
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EDX = (uint32_t)(res >> 32);
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CC_DST = res; |
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CC_SRC = (res != (int32_t)res); |
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} |
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void OPPROTO op_imulw_T0_T1(void) |
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{
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int res;
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res = (int16_t)T0 * (int16_t)T1; |
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T0 = res; |
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CC_DST = res; |
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CC_SRC = (res != (int16_t)res); |
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} |
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void OPPROTO op_imull_T0_T1(void) |
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{
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int64_t res; |
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res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1); |
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T0 = res; |
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CC_DST = res; |
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CC_SRC = (res != (int32_t)res); |
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} |
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#ifdef TARGET_X86_64
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void OPPROTO op_mulq_EAX_T0(void) |
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{
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helper_mulq_EAX_T0(T0); |
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} |
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void OPPROTO op_imulq_EAX_T0(void) |
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{
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helper_imulq_EAX_T0(T0); |
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} |
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void OPPROTO op_imulq_T0_T1(void) |
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{
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T0 = helper_imulq_T0_T1(T0, T1); |
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} |
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#endif
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/* constant load & misc op */
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/* XXX: consistent names */
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void OPPROTO op_addl_T1_im(void) |
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{
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T1 += PARAM1; |
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} |
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void OPPROTO op_movl_T1_A0(void) |
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{
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T1 = A0; |
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} |
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void OPPROTO op_addl_A0_AL(void) |
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{
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A0 = (uint32_t)(A0 + (EAX & 0xff));
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} |
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#ifdef TARGET_X86_64
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void OPPROTO op_addq_A0_AL(void) |
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{
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A0 = (A0 + (EAX & 0xff));
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} |
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#endif
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void OPPROTO op_into(void) |
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all(); |
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if (eflags & CC_O) {
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raise_interrupt(EXCP04_INTO, 1, 0, PARAM1); |
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} |
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FORCE_RET(); |
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} |
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void OPPROTO op_cmpxchg8b(void) |
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{
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helper_cmpxchg8b(A0); |
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} |
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/* multiple size ops */
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#define ldul ldl
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#define SHIFT 0 |
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#include "ops_template.h" |
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#undef SHIFT
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#define SHIFT 1 |
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#include "ops_template.h" |
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#undef SHIFT
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#define SHIFT 2 |
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#include "ops_template.h" |
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#undef SHIFT
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#ifdef TARGET_X86_64
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#define SHIFT 3 |
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#include "ops_template.h" |
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#undef SHIFT
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#endif
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/* sign extend */
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void OPPROTO op_movsbl_T0_T0(void) |
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{
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T0 = (int8_t)T0; |
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} |
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void OPPROTO op_movzbl_T0_T0(void) |
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{
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T0 = (uint8_t)T0; |
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} |
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void OPPROTO op_movswl_T0_T0(void) |
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{
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T0 = (int16_t)T0; |
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} |
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void OPPROTO op_movzwl_T0_T0(void) |
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{
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T0 = (uint16_t)T0; |
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} |
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void OPPROTO op_movswl_EAX_AX(void) |
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{
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EAX = (uint32_t)((int16_t)EAX); |
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} |
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#ifdef TARGET_X86_64
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void OPPROTO op_movslq_T0_T0(void) |
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{
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T0 = (int32_t)T0; |
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} |
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void OPPROTO op_movslq_RAX_EAX(void) |
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{
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EAX = (int32_t)EAX; |
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} |
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#endif
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void OPPROTO op_movsbw_AX_AL(void) |
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{
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EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff); |
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} |
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void OPPROTO op_movslq_EDX_EAX(void) |
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{
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EDX = (uint32_t)((int32_t)EAX >> 31);
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} |
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void OPPROTO op_movswl_DX_AX(void) |
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{
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EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff); |
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} |
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#ifdef TARGET_X86_64
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void OPPROTO op_movsqo_RDX_RAX(void) |
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{
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EDX = (int64_t)EAX >> 63;
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} |
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#endif
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/* string ops helpers */
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void OPPROTO op_addl_ESI_T0(void) |
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{
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ESI = (uint32_t)(ESI + T0); |
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} |
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void OPPROTO op_addw_ESI_T0(void) |
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{
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ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff); |
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} |
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void OPPROTO op_addl_EDI_T0(void) |
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{
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EDI = (uint32_t)(EDI + T0); |
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} |
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void OPPROTO op_addw_EDI_T0(void) |
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{
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EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff); |
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} |
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void OPPROTO op_decl_ECX(void) |
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{
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ECX = (uint32_t)(ECX - 1);
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} |
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void OPPROTO op_decw_ECX(void) |
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{
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ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff); |
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} |
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#ifdef TARGET_X86_64
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void OPPROTO op_addq_ESI_T0(void) |
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{
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ESI = (ESI + T0); |
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} |
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void OPPROTO op_addq_EDI_T0(void) |
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{
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EDI = (EDI + T0); |
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} |
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void OPPROTO op_decq_ECX(void) |
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{
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ECX--; |
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} |
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#endif
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/* bcd */
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void OPPROTO op_aam(void) |
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{
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helper_aam(PARAM1); |
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} |
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void OPPROTO op_aad(void) |
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{
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helper_aad(PARAM1); |
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} |
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void OPPROTO op_aaa(void) |
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{
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helper_aaa(); |
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} |
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void OPPROTO op_aas(void) |
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{
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helper_aas(); |
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} |
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void OPPROTO op_daa(void) |
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{
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helper_daa(); |
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} |
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void OPPROTO op_das(void) |
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{
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helper_das(); |
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} |
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/* segment handling */
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/* faster VM86 version */
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void OPPROTO op_movl_seg_T0_vm(void) |
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{
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int selector;
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SegmentCache *sc; |
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selector = T0 & 0xffff;
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/* env->segs[] access */
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sc = (SegmentCache *)((char *)env + PARAM1);
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sc->selector = selector; |
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sc->base = (selector << 4);
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} |
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void OPPROTO op_movl_T0_seg(void) |
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{
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T0 = env->segs[PARAM1].selector; |
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} |
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void OPPROTO op_lsl(void) |
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{
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uint32_t val; |
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val = helper_lsl(T0); |
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if (CC_SRC & CC_Z)
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T1 = val; |
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FORCE_RET(); |
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} |
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|
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void OPPROTO op_lar(void) |
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{
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uint32_t val; |
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val = helper_lar(T0); |
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if (CC_SRC & CC_Z)
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T1 = val; |
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FORCE_RET(); |
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} |
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|
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void OPPROTO op_verr(void) |
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{
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helper_verr(T0); |
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} |
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void OPPROTO op_verw(void) |
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{
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helper_verw(T0); |
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} |
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void OPPROTO op_arpl(void) |
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{
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if ((T0 & 3) < (T1 & 3)) { |
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/* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
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T0 = (T0 & ~3) | (T1 & 3); |
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T1 = CC_Z; |
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} else {
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T1 = 0;
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} |
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FORCE_RET(); |
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} |
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|
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void OPPROTO op_arpl_update(void) |
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all(); |
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CC_SRC = (eflags & ~CC_Z) | T1; |
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} |
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void OPPROTO op_movl_T0_env(void) |
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{
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T0 = *(uint32_t *)((char *)env + PARAM1);
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} |
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void OPPROTO op_movl_env_T0(void) |
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{
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*(uint32_t *)((char *)env + PARAM1) = T0;
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} |
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void OPPROTO op_movl_env_T1(void) |
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{
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*(uint32_t *)((char *)env + PARAM1) = T1;
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} |
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|
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void OPPROTO op_movtl_T0_env(void) |
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{
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T0 = *(target_ulong *)((char *)env + PARAM1);
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} |
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|
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void OPPROTO op_movtl_env_T0(void) |
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{
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*(target_ulong *)((char *)env + PARAM1) = T0;
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} |
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void OPPROTO op_movtl_T1_env(void) |
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{
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T1 = *(target_ulong *)((char *)env + PARAM1);
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} |
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void OPPROTO op_movtl_env_T1(void) |
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{
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*(target_ulong *)((char *)env + PARAM1) = T1;
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} |
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/* flags handling */
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|
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void OPPROTO op_jmp_label(void) |
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{
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GOTO_LABEL_PARAM(1);
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} |
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|
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void OPPROTO op_jnz_T0_label(void) |
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{
|
| 543 |
if (T0)
|
| 544 |
GOTO_LABEL_PARAM(1);
|
| 545 |
FORCE_RET(); |
| 546 |
} |
| 547 |
|
| 548 |
void OPPROTO op_jz_T0_label(void) |
| 549 |
{
|
| 550 |
if (!T0)
|
| 551 |
GOTO_LABEL_PARAM(1);
|
| 552 |
FORCE_RET(); |
| 553 |
} |
| 554 |
|
| 555 |
/* slow set cases (compute x86 flags) */
|
| 556 |
void OPPROTO op_seto_T0_cc(void) |
| 557 |
{
|
| 558 |
int eflags;
|
| 559 |
eflags = cc_table[CC_OP].compute_all(); |
| 560 |
T0 = (eflags >> 11) & 1; |
| 561 |
} |
| 562 |
|
| 563 |
void OPPROTO op_setb_T0_cc(void) |
| 564 |
{
|
| 565 |
T0 = cc_table[CC_OP].compute_c(); |
| 566 |
} |
| 567 |
|
| 568 |
void OPPROTO op_setz_T0_cc(void) |
| 569 |
{
|
| 570 |
int eflags;
|
| 571 |
eflags = cc_table[CC_OP].compute_all(); |
| 572 |
T0 = (eflags >> 6) & 1; |
| 573 |
} |
| 574 |
|
| 575 |
void OPPROTO op_setbe_T0_cc(void) |
| 576 |
{
|
| 577 |
int eflags;
|
| 578 |
eflags = cc_table[CC_OP].compute_all(); |
| 579 |
T0 = (eflags & (CC_Z | CC_C)) != 0;
|
| 580 |
} |
| 581 |
|
| 582 |
void OPPROTO op_sets_T0_cc(void) |
| 583 |
{
|
| 584 |
int eflags;
|
| 585 |
eflags = cc_table[CC_OP].compute_all(); |
| 586 |
T0 = (eflags >> 7) & 1; |
| 587 |
} |
| 588 |
|
| 589 |
void OPPROTO op_setp_T0_cc(void) |
| 590 |
{
|
| 591 |
int eflags;
|
| 592 |
eflags = cc_table[CC_OP].compute_all(); |
| 593 |
T0 = (eflags >> 2) & 1; |
| 594 |
} |
| 595 |
|
| 596 |
void OPPROTO op_setl_T0_cc(void) |
| 597 |
{
|
| 598 |
int eflags;
|
| 599 |
eflags = cc_table[CC_OP].compute_all(); |
| 600 |
T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1; |
| 601 |
} |
| 602 |
|
| 603 |
void OPPROTO op_setle_T0_cc(void) |
| 604 |
{
|
| 605 |
int eflags;
|
| 606 |
eflags = cc_table[CC_OP].compute_all(); |
| 607 |
T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0; |
| 608 |
} |
| 609 |
|
| 610 |
void OPPROTO op_xor_T0_1(void) |
| 611 |
{
|
| 612 |
T0 ^= 1;
|
| 613 |
} |
| 614 |
|
| 615 |
void OPPROTO op_mov_T0_cc(void) |
| 616 |
{
|
| 617 |
T0 = cc_table[CC_OP].compute_all(); |
| 618 |
} |
| 619 |
|
| 620 |
/* XXX: clear VIF/VIP in all ops ? */
|
| 621 |
|
| 622 |
void OPPROTO op_movl_eflags_T0(void) |
| 623 |
{
|
| 624 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK)); |
| 625 |
} |
| 626 |
|
| 627 |
void OPPROTO op_movw_eflags_T0(void) |
| 628 |
{
|
| 629 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
|
| 630 |
} |
| 631 |
|
| 632 |
void OPPROTO op_movl_eflags_T0_io(void) |
| 633 |
{
|
| 634 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK)); |
| 635 |
} |
| 636 |
|
| 637 |
void OPPROTO op_movw_eflags_T0_io(void) |
| 638 |
{
|
| 639 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
|
| 640 |
} |
| 641 |
|
| 642 |
void OPPROTO op_movl_eflags_T0_cpl0(void) |
| 643 |
{
|
| 644 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK)); |
| 645 |
} |
| 646 |
|
| 647 |
void OPPROTO op_movw_eflags_T0_cpl0(void) |
| 648 |
{
|
| 649 |
load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
|
| 650 |
} |
| 651 |
|
| 652 |
#if 0
|
| 653 |
/* vm86plus version */
|
| 654 |
void OPPROTO op_movw_eflags_T0_vm(void)
|
| 655 |
{
|
| 656 |
int eflags;
|
| 657 |
eflags = T0;
|
| 658 |
CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
|
| 659 |
DF = 1 - (2 * ((eflags >> 10) & 1));
|
| 660 |
/* we also update some system flags as in user mode */
|
| 661 |
env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
|
| 662 |
(eflags & FL_UPDATE_MASK16);
|
| 663 |
if (eflags & IF_MASK) {
|
| 664 |
env->eflags |= VIF_MASK;
|
| 665 |
if (env->eflags & VIP_MASK) {
|
| 666 |
EIP = PARAM1;
|
| 667 |
raise_exception(EXCP0D_GPF);
|
| 668 |
}
|
| 669 |
}
|
| 670 |
FORCE_RET();
|
| 671 |
}
|
| 672 |
|
| 673 |
void OPPROTO op_movl_eflags_T0_vm(void)
|
| 674 |
{
|
| 675 |
int eflags;
|
| 676 |
eflags = T0;
|
| 677 |
CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
|
| 678 |
DF = 1 - (2 * ((eflags >> 10) & 1));
|
| 679 |
/* we also update some system flags as in user mode */
|
| 680 |
env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
|
| 681 |
(eflags & FL_UPDATE_MASK32);
|
| 682 |
if (eflags & IF_MASK) {
|
| 683 |
env->eflags |= VIF_MASK;
|
| 684 |
if (env->eflags & VIP_MASK) {
|
| 685 |
EIP = PARAM1;
|
| 686 |
raise_exception(EXCP0D_GPF);
|
| 687 |
}
|
| 688 |
}
|
| 689 |
FORCE_RET();
|
| 690 |
}
|
| 691 |
#endif
|
| 692 |
|
| 693 |
/* XXX: compute only O flag */
|
| 694 |
void OPPROTO op_movb_eflags_T0(void) |
| 695 |
{
|
| 696 |
int of;
|
| 697 |
of = cc_table[CC_OP].compute_all() & CC_O; |
| 698 |
CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of; |
| 699 |
} |
| 700 |
|
| 701 |
void OPPROTO op_movl_T0_eflags(void) |
| 702 |
{
|
| 703 |
int eflags;
|
| 704 |
eflags = cc_table[CC_OP].compute_all(); |
| 705 |
eflags |= (DF & DF_MASK); |
| 706 |
eflags |= env->eflags & ~(VM_MASK | RF_MASK); |
| 707 |
T0 = eflags; |
| 708 |
} |
| 709 |
|
| 710 |
/* vm86plus version */
|
| 711 |
#if 0
|
| 712 |
void OPPROTO op_movl_T0_eflags_vm(void)
|
| 713 |
{
|
| 714 |
int eflags;
|
| 715 |
eflags = cc_table[CC_OP].compute_all();
|
| 716 |
eflags |= (DF & DF_MASK);
|
| 717 |
eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
|
| 718 |
if (env->eflags & VIF_MASK)
|
| 719 |
eflags |= IF_MASK;
|
| 720 |
T0 = eflags;
|
| 721 |
}
|
| 722 |
#endif
|
| 723 |
|
| 724 |
void OPPROTO op_clc(void) |
| 725 |
{
|
| 726 |
int eflags;
|
| 727 |
eflags = cc_table[CC_OP].compute_all(); |
| 728 |
eflags &= ~CC_C; |
| 729 |
CC_SRC = eflags; |
| 730 |
} |
| 731 |
|
| 732 |
void OPPROTO op_stc(void) |
| 733 |
{
|
| 734 |
int eflags;
|
| 735 |
eflags = cc_table[CC_OP].compute_all(); |
| 736 |
eflags |= CC_C; |
| 737 |
CC_SRC = eflags; |
| 738 |
} |
| 739 |
|
| 740 |
void OPPROTO op_cmc(void) |
| 741 |
{
|
| 742 |
int eflags;
|
| 743 |
eflags = cc_table[CC_OP].compute_all(); |
| 744 |
eflags ^= CC_C; |
| 745 |
CC_SRC = eflags; |
| 746 |
} |
| 747 |
|
| 748 |
void OPPROTO op_salc(void) |
| 749 |
{
|
| 750 |
int cf;
|
| 751 |
cf = cc_table[CC_OP].compute_c(); |
| 752 |
EAX = (EAX & ~0xff) | ((-cf) & 0xff); |
| 753 |
} |
| 754 |
|
| 755 |
void OPPROTO op_fcomi_dummy(void) |
| 756 |
{
|
| 757 |
T0 = 0;
|
| 758 |
} |
| 759 |
|
| 760 |
/* SSE support */
|
| 761 |
void OPPROTO op_com_dummy(void) |
| 762 |
{
|
| 763 |
T0 = 0;
|
| 764 |
} |