Archipelago » qemu

#define SPR_RCPU_MI_RBA2      (0x302)

#define SPR_MPC_MI_AP         (0x302)

#define SPR_PERF3             (0x303)

#define SPR_RCPU_MI_RBA3      (0x303)

#define SPR_MPC_MI_EPN        (0x303)

#define SPR_PERF4             (0x304)

#define SPR_PERF5             (0x305)

#define SPR_MPC_MI_TWC        (0x305)

#define SPR_PERF6             (0x306)

#define SPR_RCPU_L2U_RBA2     (0x30A)

#define SPR_MPC_MD_AP         (0x30A)

#define SPR_PERFB             (0x30B)

#define SPR_RCPU_L2U_RBA3     (0x30B)

#define SPR_MPC_MD_EPN        (0x30B)

#define SPR_PERFC             (0x30C)

#define SPR_UPERF1            (0x311)

#define SPR_UPERF2            (0x312)

#define SPR_UPERF3            (0x313)

#define SPR_UPERF4            (0x314)

#define SPR_UPERF5            (0x315)

#define SPR_UPERF6            (0x316)

#define SPR_UPERF7            (0x317)

#define SPR_UPERF9            (0x319)

#define SPR_UPERFA            (0x31A)

#define SPR_UPERFB            (0x31B)

#define SPR_UPERFC            (0x31C)

#define SPR_UPERFD            (0x31D)

#define SPR_UPERFE            (0x31E)

#define SPR_LDSTCR            (0x3F8)

#define SPR_L2PMCR            (0x3F8)

#define SPR_750_HID2          (0x3F8)

#define SPR_Exxx_L1FINV0      (0x3F8)

#define SPR_L2CR              (0x3F9)

#define SPR_L3CR              (0x3FA)

#define SPR_IABR2             (0x3FA)

#define SPR_40x_DCCR          (0x3FA)

#define SPR_ICTC              (0x3FB)

#define SPR_40x_ICCR          (0x3FB)

#define SPR_THRM1             (0x3FC)