Archipelago » qemu

#define EN0_CRDAHI	0x09	/* high byte, current remote dma address RD */

#define EN0_RSARHI	0x09	/* Remote start address reg 1 */

#define EN0_RCNTLO	0x0a	/* Remote byte count reg WR */

#define EN0_RCNTHI	0x0b	/* Remote byte count reg WR */

#define EN0_RSR		0x0c	/* rx status reg RD */

#define EN0_RXCR	0x0c	/* RX configuration reg WR */

#define EN0_TXCR	0x0d	/* TX configuration reg WR */

#define EN2_STARTPG	0x21	/* Starting page of ring bfr RD */

#define EN2_STOPPG	0x22	/* Ending page +1 of ring bfr RD */

/*  Register accessed at EN_CMD, the 8390 base addr.  */

#define E8390_STOP	0x01	/* Stop and reset the chip */

#define E8390_START	0x02	/* Start the chip, clear reset */

        case EN2_STOPPG:

            ret = s->stop >> 8;

            break;

        default:

            ret = 0x00;

            break;