root / target-i386 / ops_template_mem.h @ 08cea4ee
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1 | 2c0262af | bellard | /*
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2 | 2c0262af | bellard | * i386 micro operations (included several times to generate
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3 | 2c0262af | bellard | * different operand sizes)
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4 | 2c0262af | bellard | *
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5 | 2c0262af | bellard | * Copyright (c) 2003 Fabrice Bellard
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6 | 2c0262af | bellard | *
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7 | 2c0262af | bellard | * This library is free software; you can redistribute it and/or
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8 | 2c0262af | bellard | * modify it under the terms of the GNU Lesser General Public
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9 | 2c0262af | bellard | * License as published by the Free Software Foundation; either
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10 | 2c0262af | bellard | * version 2 of the License, or (at your option) any later version.
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11 | 2c0262af | bellard | *
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12 | 2c0262af | bellard | * This library is distributed in the hope that it will be useful,
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13 | 2c0262af | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 2c0262af | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 2c0262af | bellard | * Lesser General Public License for more details.
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16 | 2c0262af | bellard | *
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17 | 2c0262af | bellard | * You should have received a copy of the GNU Lesser General Public
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18 | 2c0262af | bellard | * License along with this library; if not, write to the Free Software
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19 | 2c0262af | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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20 | 2c0262af | bellard | */
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21 | 2c0262af | bellard | #ifdef MEM_WRITE
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22 | 2c0262af | bellard | |
23 | 943144d9 | bellard | #if MEM_WRITE == 0 |
24 | 943144d9 | bellard | |
25 | 943144d9 | bellard | #if DATA_BITS == 8 |
26 | 943144d9 | bellard | #define MEM_SUFFIX b_raw
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27 | 943144d9 | bellard | #elif DATA_BITS == 16 |
28 | 943144d9 | bellard | #define MEM_SUFFIX w_raw
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29 | 943144d9 | bellard | #elif DATA_BITS == 32 |
30 | 943144d9 | bellard | #define MEM_SUFFIX l_raw
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31 | 943144d9 | bellard | #endif
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32 | 943144d9 | bellard | |
33 | 943144d9 | bellard | #elif MEM_WRITE == 1 |
34 | 943144d9 | bellard | |
35 | 943144d9 | bellard | #if DATA_BITS == 8 |
36 | 943144d9 | bellard | #define MEM_SUFFIX b_kernel
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37 | 943144d9 | bellard | #elif DATA_BITS == 16 |
38 | 943144d9 | bellard | #define MEM_SUFFIX w_kernel
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39 | 943144d9 | bellard | #elif DATA_BITS == 32 |
40 | 943144d9 | bellard | #define MEM_SUFFIX l_kernel
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41 | 943144d9 | bellard | #endif
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42 | 943144d9 | bellard | |
43 | 943144d9 | bellard | #elif MEM_WRITE == 2 |
44 | 943144d9 | bellard | |
45 | 2c0262af | bellard | #if DATA_BITS == 8 |
46 | 943144d9 | bellard | #define MEM_SUFFIX b_user
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47 | 2c0262af | bellard | #elif DATA_BITS == 16 |
48 | 943144d9 | bellard | #define MEM_SUFFIX w_user
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49 | 2c0262af | bellard | #elif DATA_BITS == 32 |
50 | 943144d9 | bellard | #define MEM_SUFFIX l_user
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51 | 943144d9 | bellard | #endif
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52 | 943144d9 | bellard | |
53 | 943144d9 | bellard | #else
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54 | 943144d9 | bellard | |
55 | 943144d9 | bellard | #error invalid MEM_WRITE
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56 | 943144d9 | bellard | |
57 | 2c0262af | bellard | #endif
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58 | 2c0262af | bellard | |
59 | 2c0262af | bellard | #else
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60 | 2c0262af | bellard | |
61 | 2c0262af | bellard | #define MEM_SUFFIX SUFFIX
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62 | 2c0262af | bellard | |
63 | 2c0262af | bellard | #endif
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64 | 2c0262af | bellard | |
65 | 2c0262af | bellard | void OPPROTO glue(glue(op_rol, MEM_SUFFIX), _T0_T1_cc)(void) |
66 | 2c0262af | bellard | { |
67 | 2c0262af | bellard | int count, src;
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68 | 2c0262af | bellard | count = T1 & SHIFT_MASK; |
69 | 2c0262af | bellard | if (count) {
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70 | 2c0262af | bellard | src = T0; |
71 | 2c0262af | bellard | T0 &= DATA_MASK; |
72 | 2c0262af | bellard | T0 = (T0 << count) | (T0 >> (DATA_BITS - count)); |
73 | 2c0262af | bellard | #ifdef MEM_WRITE
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74 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
75 | 2c0262af | bellard | #else
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76 | 2c0262af | bellard | /* gcc 3.2 workaround. This is really a bug in gcc. */
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77 | 2c0262af | bellard | asm volatile("" : : "r" (T0)); |
78 | 2c0262af | bellard | #endif
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79 | 2c0262af | bellard | CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) | |
80 | 2c0262af | bellard | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | |
81 | 2c0262af | bellard | (T0 & CC_C); |
82 | 2c0262af | bellard | CC_OP = CC_OP_EFLAGS; |
83 | 2c0262af | bellard | } |
84 | 2c0262af | bellard | FORCE_RET(); |
85 | 2c0262af | bellard | } |
86 | 2c0262af | bellard | |
87 | 2c0262af | bellard | void OPPROTO glue(glue(op_ror, MEM_SUFFIX), _T0_T1_cc)(void) |
88 | 2c0262af | bellard | { |
89 | 2c0262af | bellard | int count, src;
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90 | 2c0262af | bellard | count = T1 & SHIFT_MASK; |
91 | 2c0262af | bellard | if (count) {
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92 | 2c0262af | bellard | src = T0; |
93 | 2c0262af | bellard | T0 &= DATA_MASK; |
94 | 2c0262af | bellard | T0 = (T0 >> count) | (T0 << (DATA_BITS - count)); |
95 | 2c0262af | bellard | #ifdef MEM_WRITE
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96 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
97 | 2c0262af | bellard | #else
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98 | 2c0262af | bellard | /* gcc 3.2 workaround. This is really a bug in gcc. */
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99 | 2c0262af | bellard | asm volatile("" : : "r" (T0)); |
100 | 2c0262af | bellard | #endif
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101 | 2c0262af | bellard | CC_SRC = (cc_table[CC_OP].compute_all() & ~(CC_O | CC_C)) | |
102 | 2c0262af | bellard | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | |
103 | 2c0262af | bellard | ((T0 >> (DATA_BITS - 1)) & CC_C);
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104 | 2c0262af | bellard | CC_OP = CC_OP_EFLAGS; |
105 | 2c0262af | bellard | } |
106 | 2c0262af | bellard | FORCE_RET(); |
107 | 2c0262af | bellard | } |
108 | 2c0262af | bellard | |
109 | 2c0262af | bellard | void OPPROTO glue(glue(op_rol, MEM_SUFFIX), _T0_T1)(void) |
110 | 2c0262af | bellard | { |
111 | 2c0262af | bellard | int count;
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112 | 2c0262af | bellard | count = T1 & SHIFT_MASK; |
113 | 2c0262af | bellard | if (count) {
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114 | 2c0262af | bellard | T0 &= DATA_MASK; |
115 | 2c0262af | bellard | T0 = (T0 << count) | (T0 >> (DATA_BITS - count)); |
116 | 2c0262af | bellard | #ifdef MEM_WRITE
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117 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
118 | 2c0262af | bellard | #endif
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119 | 2c0262af | bellard | } |
120 | 2c0262af | bellard | FORCE_RET(); |
121 | 2c0262af | bellard | } |
122 | 2c0262af | bellard | |
123 | 2c0262af | bellard | void OPPROTO glue(glue(op_ror, MEM_SUFFIX), _T0_T1)(void) |
124 | 2c0262af | bellard | { |
125 | 2c0262af | bellard | int count;
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126 | 2c0262af | bellard | count = T1 & SHIFT_MASK; |
127 | 2c0262af | bellard | if (count) {
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128 | 2c0262af | bellard | T0 &= DATA_MASK; |
129 | 2c0262af | bellard | T0 = (T0 >> count) | (T0 << (DATA_BITS - count)); |
130 | 2c0262af | bellard | #ifdef MEM_WRITE
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131 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
132 | 2c0262af | bellard | #endif
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133 | 2c0262af | bellard | } |
134 | 2c0262af | bellard | FORCE_RET(); |
135 | 2c0262af | bellard | } |
136 | 2c0262af | bellard | |
137 | 2c0262af | bellard | void OPPROTO glue(glue(op_rcl, MEM_SUFFIX), _T0_T1_cc)(void) |
138 | 2c0262af | bellard | { |
139 | 2c0262af | bellard | int count, res, eflags;
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140 | 2c0262af | bellard | unsigned int src; |
141 | 2c0262af | bellard | |
142 | 2c0262af | bellard | count = T1 & 0x1f;
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143 | 2c0262af | bellard | #if DATA_BITS == 16 |
144 | 2c0262af | bellard | count = rclw_table[count]; |
145 | 2c0262af | bellard | #elif DATA_BITS == 8 |
146 | 2c0262af | bellard | count = rclb_table[count]; |
147 | 2c0262af | bellard | #endif
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148 | 2c0262af | bellard | if (count) {
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149 | 2c0262af | bellard | eflags = cc_table[CC_OP].compute_all(); |
150 | 2c0262af | bellard | T0 &= DATA_MASK; |
151 | 2c0262af | bellard | src = T0; |
152 | 2c0262af | bellard | res = (T0 << count) | ((eflags & CC_C) << (count - 1));
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153 | 2c0262af | bellard | if (count > 1) |
154 | 2c0262af | bellard | res |= T0 >> (DATA_BITS + 1 - count);
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155 | 2c0262af | bellard | T0 = res; |
156 | 2c0262af | bellard | #ifdef MEM_WRITE
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157 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
158 | 2c0262af | bellard | #endif
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159 | 2c0262af | bellard | CC_SRC = (eflags & ~(CC_C | CC_O)) | |
160 | 2c0262af | bellard | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | |
161 | 2c0262af | bellard | ((src >> (DATA_BITS - count)) & CC_C); |
162 | 2c0262af | bellard | CC_OP = CC_OP_EFLAGS; |
163 | 2c0262af | bellard | } |
164 | 2c0262af | bellard | FORCE_RET(); |
165 | 2c0262af | bellard | } |
166 | 2c0262af | bellard | |
167 | 2c0262af | bellard | void OPPROTO glue(glue(op_rcr, MEM_SUFFIX), _T0_T1_cc)(void) |
168 | 2c0262af | bellard | { |
169 | 2c0262af | bellard | int count, res, eflags;
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170 | 2c0262af | bellard | unsigned int src; |
171 | 2c0262af | bellard | |
172 | 2c0262af | bellard | count = T1 & 0x1f;
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173 | 2c0262af | bellard | #if DATA_BITS == 16 |
174 | 2c0262af | bellard | count = rclw_table[count]; |
175 | 2c0262af | bellard | #elif DATA_BITS == 8 |
176 | 2c0262af | bellard | count = rclb_table[count]; |
177 | 2c0262af | bellard | #endif
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178 | 2c0262af | bellard | if (count) {
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179 | 2c0262af | bellard | eflags = cc_table[CC_OP].compute_all(); |
180 | 2c0262af | bellard | T0 &= DATA_MASK; |
181 | 2c0262af | bellard | src = T0; |
182 | 2c0262af | bellard | res = (T0 >> count) | ((eflags & CC_C) << (DATA_BITS - count)); |
183 | 2c0262af | bellard | if (count > 1) |
184 | 2c0262af | bellard | res |= T0 << (DATA_BITS + 1 - count);
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185 | 2c0262af | bellard | T0 = res; |
186 | 2c0262af | bellard | #ifdef MEM_WRITE
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187 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
188 | 2c0262af | bellard | #endif
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189 | 2c0262af | bellard | CC_SRC = (eflags & ~(CC_C | CC_O)) | |
190 | 2c0262af | bellard | (lshift(src ^ T0, 11 - (DATA_BITS - 1)) & CC_O) | |
191 | 2c0262af | bellard | ((src >> (count - 1)) & CC_C);
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192 | 2c0262af | bellard | CC_OP = CC_OP_EFLAGS; |
193 | 2c0262af | bellard | } |
194 | 2c0262af | bellard | FORCE_RET(); |
195 | 2c0262af | bellard | } |
196 | 2c0262af | bellard | |
197 | 2c0262af | bellard | void OPPROTO glue(glue(op_shl, MEM_SUFFIX), _T0_T1_cc)(void) |
198 | 2c0262af | bellard | { |
199 | 2c0262af | bellard | int count, src;
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200 | 2c0262af | bellard | count = T1 & 0x1f;
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201 | 2c0262af | bellard | if (count) {
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202 | 2c0262af | bellard | src = (DATA_TYPE)T0 << (count - 1);
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203 | 2c0262af | bellard | T0 = T0 << count; |
204 | 2c0262af | bellard | #ifdef MEM_WRITE
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205 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
206 | 2c0262af | bellard | #endif
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207 | 2c0262af | bellard | CC_SRC = src; |
208 | 2c0262af | bellard | CC_DST = T0; |
209 | 2c0262af | bellard | CC_OP = CC_OP_SHLB + SHIFT; |
210 | 2c0262af | bellard | } |
211 | 2c0262af | bellard | FORCE_RET(); |
212 | 2c0262af | bellard | } |
213 | 2c0262af | bellard | |
214 | 2c0262af | bellard | void OPPROTO glue(glue(op_shr, MEM_SUFFIX), _T0_T1_cc)(void) |
215 | 2c0262af | bellard | { |
216 | 2c0262af | bellard | int count, src;
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217 | 2c0262af | bellard | count = T1 & 0x1f;
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218 | 2c0262af | bellard | if (count) {
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219 | 2c0262af | bellard | T0 &= DATA_MASK; |
220 | 2c0262af | bellard | src = T0 >> (count - 1);
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221 | 2c0262af | bellard | T0 = T0 >> count; |
222 | 2c0262af | bellard | #ifdef MEM_WRITE
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223 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
224 | 2c0262af | bellard | #endif
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225 | 2c0262af | bellard | CC_SRC = src; |
226 | 2c0262af | bellard | CC_DST = T0; |
227 | 2c0262af | bellard | CC_OP = CC_OP_SARB + SHIFT; |
228 | 2c0262af | bellard | } |
229 | 2c0262af | bellard | FORCE_RET(); |
230 | 2c0262af | bellard | } |
231 | 2c0262af | bellard | |
232 | 2c0262af | bellard | void OPPROTO glue(glue(op_sar, MEM_SUFFIX), _T0_T1_cc)(void) |
233 | 2c0262af | bellard | { |
234 | 2c0262af | bellard | int count, src;
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235 | 2c0262af | bellard | count = T1 & 0x1f;
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236 | 2c0262af | bellard | if (count) {
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237 | 2c0262af | bellard | src = (DATA_STYPE)T0; |
238 | 2c0262af | bellard | T0 = src >> count; |
239 | 2c0262af | bellard | src = src >> (count - 1);
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240 | 2c0262af | bellard | #ifdef MEM_WRITE
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241 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
242 | 2c0262af | bellard | #endif
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243 | 2c0262af | bellard | CC_SRC = src; |
244 | 2c0262af | bellard | CC_DST = T0; |
245 | 2c0262af | bellard | CC_OP = CC_OP_SARB + SHIFT; |
246 | 2c0262af | bellard | } |
247 | 2c0262af | bellard | FORCE_RET(); |
248 | 2c0262af | bellard | } |
249 | 2c0262af | bellard | |
250 | 2c0262af | bellard | #if DATA_BITS == 16 |
251 | 2c0262af | bellard | /* XXX: overflow flag might be incorrect in some cases in shldw */
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252 | 2c0262af | bellard | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_im_cc)(void) |
253 | 2c0262af | bellard | { |
254 | 2c0262af | bellard | int count;
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255 | 2c0262af | bellard | unsigned int res, tmp; |
256 | 2c0262af | bellard | count = PARAM1; |
257 | 2c0262af | bellard | T1 &= 0xffff;
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258 | 2c0262af | bellard | res = T1 | (T0 << 16);
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259 | 2c0262af | bellard | tmp = res >> (32 - count);
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260 | 2c0262af | bellard | res <<= count; |
261 | 2c0262af | bellard | if (count > 16) |
262 | 2c0262af | bellard | res |= T1 << (count - 16);
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263 | 2c0262af | bellard | T0 = res >> 16;
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264 | 2c0262af | bellard | #ifdef MEM_WRITE
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265 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
266 | 2c0262af | bellard | #endif
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267 | 2c0262af | bellard | CC_SRC = tmp; |
268 | 2c0262af | bellard | CC_DST = T0; |
269 | 2c0262af | bellard | } |
270 | 2c0262af | bellard | |
271 | 2c0262af | bellard | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_ECX_cc)(void) |
272 | 2c0262af | bellard | { |
273 | 2c0262af | bellard | int count;
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274 | 2c0262af | bellard | unsigned int res, tmp; |
275 | 2c0262af | bellard | count = ECX & 0x1f;
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276 | 2c0262af | bellard | if (count) {
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277 | 2c0262af | bellard | T1 &= 0xffff;
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278 | 2c0262af | bellard | res = T1 | (T0 << 16);
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279 | 2c0262af | bellard | tmp = res >> (32 - count);
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280 | 2c0262af | bellard | res <<= count; |
281 | 2c0262af | bellard | if (count > 16) |
282 | 2c0262af | bellard | res |= T1 << (count - 16);
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283 | 2c0262af | bellard | T0 = res >> 16;
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284 | 2c0262af | bellard | #ifdef MEM_WRITE
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285 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
286 | 2c0262af | bellard | #endif
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287 | 2c0262af | bellard | CC_SRC = tmp; |
288 | 2c0262af | bellard | CC_DST = T0; |
289 | 2c0262af | bellard | CC_OP = CC_OP_SARB + SHIFT; |
290 | 2c0262af | bellard | } |
291 | 2c0262af | bellard | FORCE_RET(); |
292 | 2c0262af | bellard | } |
293 | 2c0262af | bellard | |
294 | 2c0262af | bellard | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_im_cc)(void) |
295 | 2c0262af | bellard | { |
296 | 2c0262af | bellard | int count;
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297 | 2c0262af | bellard | unsigned int res, tmp; |
298 | 2c0262af | bellard | |
299 | 2c0262af | bellard | count = PARAM1; |
300 | 2c0262af | bellard | res = (T0 & 0xffff) | (T1 << 16); |
301 | 2c0262af | bellard | tmp = res >> (count - 1);
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302 | 2c0262af | bellard | res >>= count; |
303 | 2c0262af | bellard | if (count > 16) |
304 | 2c0262af | bellard | res |= T1 << (32 - count);
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305 | 2c0262af | bellard | T0 = res; |
306 | 2c0262af | bellard | #ifdef MEM_WRITE
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307 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
308 | 2c0262af | bellard | #endif
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309 | 2c0262af | bellard | CC_SRC = tmp; |
310 | 2c0262af | bellard | CC_DST = T0; |
311 | 2c0262af | bellard | } |
312 | 2c0262af | bellard | |
313 | 2c0262af | bellard | |
314 | 2c0262af | bellard | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_ECX_cc)(void) |
315 | 2c0262af | bellard | { |
316 | 2c0262af | bellard | int count;
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317 | 2c0262af | bellard | unsigned int res, tmp; |
318 | 2c0262af | bellard | |
319 | 2c0262af | bellard | count = ECX & 0x1f;
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320 | 2c0262af | bellard | if (count) {
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321 | 2c0262af | bellard | res = (T0 & 0xffff) | (T1 << 16); |
322 | 2c0262af | bellard | tmp = res >> (count - 1);
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323 | 2c0262af | bellard | res >>= count; |
324 | 2c0262af | bellard | if (count > 16) |
325 | 2c0262af | bellard | res |= T1 << (32 - count);
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326 | 2c0262af | bellard | T0 = res; |
327 | 2c0262af | bellard | #ifdef MEM_WRITE
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328 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
329 | 2c0262af | bellard | #endif
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330 | 2c0262af | bellard | CC_SRC = tmp; |
331 | 2c0262af | bellard | CC_DST = T0; |
332 | 2c0262af | bellard | CC_OP = CC_OP_SARB + SHIFT; |
333 | 2c0262af | bellard | } |
334 | 2c0262af | bellard | FORCE_RET(); |
335 | 2c0262af | bellard | } |
336 | 2c0262af | bellard | #endif
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337 | 2c0262af | bellard | |
338 | 2c0262af | bellard | #if DATA_BITS == 32 |
339 | 2c0262af | bellard | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_im_cc)(void) |
340 | 2c0262af | bellard | { |
341 | 2c0262af | bellard | int count, tmp;
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342 | 2c0262af | bellard | count = PARAM1; |
343 | 2c0262af | bellard | T0 &= DATA_MASK; |
344 | 2c0262af | bellard | T1 &= DATA_MASK; |
345 | 2c0262af | bellard | tmp = T0 << (count - 1);
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346 | 2c0262af | bellard | T0 = (T0 << count) | (T1 >> (DATA_BITS - count)); |
347 | 2c0262af | bellard | #ifdef MEM_WRITE
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348 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
349 | 2c0262af | bellard | #endif
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350 | 2c0262af | bellard | CC_SRC = tmp; |
351 | 2c0262af | bellard | CC_DST = T0; |
352 | 2c0262af | bellard | } |
353 | 2c0262af | bellard | |
354 | 2c0262af | bellard | void OPPROTO glue(glue(op_shld, MEM_SUFFIX), _T0_T1_ECX_cc)(void) |
355 | 2c0262af | bellard | { |
356 | 2c0262af | bellard | int count, tmp;
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357 | 2c0262af | bellard | count = ECX & 0x1f;
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358 | 2c0262af | bellard | if (count) {
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359 | 2c0262af | bellard | T0 &= DATA_MASK; |
360 | 2c0262af | bellard | T1 &= DATA_MASK; |
361 | 2c0262af | bellard | tmp = T0 << (count - 1);
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362 | 2c0262af | bellard | T0 = (T0 << count) | (T1 >> (DATA_BITS - count)); |
363 | 2c0262af | bellard | #ifdef MEM_WRITE
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364 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
365 | 2c0262af | bellard | #endif
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366 | 2c0262af | bellard | CC_SRC = tmp; |
367 | 2c0262af | bellard | CC_DST = T0; |
368 | 2c0262af | bellard | CC_OP = CC_OP_SHLB + SHIFT; |
369 | 2c0262af | bellard | } |
370 | 2c0262af | bellard | FORCE_RET(); |
371 | 2c0262af | bellard | } |
372 | 2c0262af | bellard | |
373 | 2c0262af | bellard | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_im_cc)(void) |
374 | 2c0262af | bellard | { |
375 | 2c0262af | bellard | int count, tmp;
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376 | 2c0262af | bellard | count = PARAM1; |
377 | 2c0262af | bellard | T0 &= DATA_MASK; |
378 | 2c0262af | bellard | T1 &= DATA_MASK; |
379 | 2c0262af | bellard | tmp = T0 >> (count - 1);
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380 | 2c0262af | bellard | T0 = (T0 >> count) | (T1 << (DATA_BITS - count)); |
381 | 2c0262af | bellard | #ifdef MEM_WRITE
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382 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
383 | 2c0262af | bellard | #endif
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384 | 2c0262af | bellard | CC_SRC = tmp; |
385 | 2c0262af | bellard | CC_DST = T0; |
386 | 2c0262af | bellard | } |
387 | 2c0262af | bellard | |
388 | 2c0262af | bellard | |
389 | 2c0262af | bellard | void OPPROTO glue(glue(op_shrd, MEM_SUFFIX), _T0_T1_ECX_cc)(void) |
390 | 2c0262af | bellard | { |
391 | 2c0262af | bellard | int count, tmp;
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392 | 2c0262af | bellard | count = ECX & 0x1f;
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393 | 2c0262af | bellard | if (count) {
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394 | 2c0262af | bellard | T0 &= DATA_MASK; |
395 | 2c0262af | bellard | T1 &= DATA_MASK; |
396 | 2c0262af | bellard | tmp = T0 >> (count - 1);
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397 | 2c0262af | bellard | T0 = (T0 >> count) | (T1 << (DATA_BITS - count)); |
398 | 2c0262af | bellard | #ifdef MEM_WRITE
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399 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
400 | 2c0262af | bellard | #endif
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401 | 2c0262af | bellard | CC_SRC = tmp; |
402 | 2c0262af | bellard | CC_DST = T0; |
403 | 2c0262af | bellard | CC_OP = CC_OP_SARB + SHIFT; |
404 | 2c0262af | bellard | } |
405 | 2c0262af | bellard | FORCE_RET(); |
406 | 2c0262af | bellard | } |
407 | 2c0262af | bellard | #endif
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408 | 2c0262af | bellard | |
409 | 2c0262af | bellard | /* carry add/sub (we only need to set CC_OP differently) */
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410 | 2c0262af | bellard | |
411 | 2c0262af | bellard | void OPPROTO glue(glue(op_adc, MEM_SUFFIX), _T0_T1_cc)(void) |
412 | 2c0262af | bellard | { |
413 | 2c0262af | bellard | int cf;
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414 | 2c0262af | bellard | cf = cc_table[CC_OP].compute_c(); |
415 | 2c0262af | bellard | T0 = T0 + T1 + cf; |
416 | 2c0262af | bellard | #ifdef MEM_WRITE
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417 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
418 | 2c0262af | bellard | #endif
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419 | 2c0262af | bellard | CC_SRC = T1; |
420 | 2c0262af | bellard | CC_DST = T0; |
421 | 2c0262af | bellard | CC_OP = CC_OP_ADDB + SHIFT + cf * 3;
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422 | 2c0262af | bellard | } |
423 | 2c0262af | bellard | |
424 | 2c0262af | bellard | void OPPROTO glue(glue(op_sbb, MEM_SUFFIX), _T0_T1_cc)(void) |
425 | 2c0262af | bellard | { |
426 | 2c0262af | bellard | int cf;
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427 | 2c0262af | bellard | cf = cc_table[CC_OP].compute_c(); |
428 | 2c0262af | bellard | T0 = T0 - T1 - cf; |
429 | 2c0262af | bellard | #ifdef MEM_WRITE
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430 | 943144d9 | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
431 | 2c0262af | bellard | #endif
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432 | 2c0262af | bellard | CC_SRC = T1; |
433 | 2c0262af | bellard | CC_DST = T0; |
434 | 2c0262af | bellard | CC_OP = CC_OP_SUBB + SHIFT + cf * 3;
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435 | 2c0262af | bellard | } |
436 | 2c0262af | bellard | |
437 | 2c0262af | bellard | void OPPROTO glue(glue(op_cmpxchg, MEM_SUFFIX), _T0_T1_EAX_cc)(void) |
438 | 2c0262af | bellard | { |
439 | 2c0262af | bellard | unsigned int src, dst; |
440 | 2c0262af | bellard | |
441 | 2c0262af | bellard | src = T0; |
442 | 2c0262af | bellard | dst = EAX - T0; |
443 | 2c0262af | bellard | if ((DATA_TYPE)dst == 0) { |
444 | 2c0262af | bellard | T0 = T1; |
445 | 1e4fe7ce | bellard | #ifdef MEM_WRITE
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446 | 1e4fe7ce | bellard | glue(st, MEM_SUFFIX)((uint8_t *)A0, T0); |
447 | 1e4fe7ce | bellard | #endif
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448 | 2c0262af | bellard | } else {
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449 | 2c0262af | bellard | EAX = (EAX & ~DATA_MASK) | (T0 & DATA_MASK); |
450 | 2c0262af | bellard | } |
451 | 2c0262af | bellard | CC_SRC = src; |
452 | 2c0262af | bellard | CC_DST = dst; |
453 | 2c0262af | bellard | FORCE_RET(); |
454 | 2c0262af | bellard | } |
455 | 2c0262af | bellard | |
456 | 2c0262af | bellard | #undef MEM_SUFFIX
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457 | 2c0262af | bellard | #undef MEM_WRITE |