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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 80cabfad | bellard | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 80cabfad | bellard | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 80cabfad | bellard | #include "vl.h" |
25 | 80cabfad | bellard | |
26 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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27 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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28 | b41a2cd1 | bellard | |
29 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
30 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
31 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
32 | 80cabfad | bellard | #define LINUX_BOOT_FILENAME "linux_boot.bin" |
33 | 80cabfad | bellard | |
34 | 80cabfad | bellard | #define KERNEL_LOAD_ADDR 0x00100000 |
35 | 07de1eaa | bellard | #define INITRD_LOAD_ADDR 0x00600000 |
36 | 80cabfad | bellard | #define KERNEL_PARAMS_ADDR 0x00090000 |
37 | 80cabfad | bellard | #define KERNEL_CMDLINE_ADDR 0x00099000 |
38 | 80cabfad | bellard | |
39 | baca51fa | bellard | static fdctrl_t *floppy_controller;
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40 | b0a21b53 | bellard | static RTCState *rtc_state;
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41 | ec844b96 | bellard | static PITState *pit;
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42 | d592d303 | bellard | static IOAPICState *ioapic;
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43 | 80cabfad | bellard | |
44 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
45 | 80cabfad | bellard | { |
46 | 80cabfad | bellard | } |
47 | 80cabfad | bellard | |
48 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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49 | f929aad6 | bellard | /* XXX: add IGNNE support */
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50 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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51 | f929aad6 | bellard | { |
52 | f929aad6 | bellard | pic_set_irq(13, 1); |
53 | f929aad6 | bellard | } |
54 | f929aad6 | bellard | |
55 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
56 | f929aad6 | bellard | { |
57 | f929aad6 | bellard | pic_set_irq(13, 0); |
58 | f929aad6 | bellard | } |
59 | f929aad6 | bellard | |
60 | 28ab0e2e | bellard | /* TSC handling */
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61 | 28ab0e2e | bellard | |
62 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
63 | 28ab0e2e | bellard | { |
64 | 28ab0e2e | bellard | return qemu_get_clock(vm_clock);
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65 | 28ab0e2e | bellard | } |
66 | 28ab0e2e | bellard | |
67 | 3de388f6 | bellard | /* IRQ handling */
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68 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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69 | 3de388f6 | bellard | { |
70 | 3de388f6 | bellard | int intno;
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71 | 3de388f6 | bellard | |
72 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
73 | 3de388f6 | bellard | if (intno >= 0) { |
74 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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75 | 3de388f6 | bellard | /* XXX: improve that */
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76 | 3de388f6 | bellard | pic_update_irq(isa_pic); |
77 | 3de388f6 | bellard | return intno;
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78 | 3de388f6 | bellard | } |
79 | 3de388f6 | bellard | /* read the irq from the PIC */
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80 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
81 | 3de388f6 | bellard | return intno;
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82 | 3de388f6 | bellard | } |
83 | 3de388f6 | bellard | |
84 | 3de388f6 | bellard | static void pic_irq_request(void *opaque, int level) |
85 | 3de388f6 | bellard | { |
86 | 59b8ad81 | bellard | CPUState *env = opaque; |
87 | 3de388f6 | bellard | if (level)
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88 | 59b8ad81 | bellard | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
89 | 3de388f6 | bellard | else
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90 | 59b8ad81 | bellard | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
91 | 3de388f6 | bellard | } |
92 | 3de388f6 | bellard | |
93 | b0a21b53 | bellard | /* PC cmos mappings */
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94 | b0a21b53 | bellard | |
95 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
96 | b0a21b53 | bellard | #define REG_IBM_CENTURY_BYTE 0x32 |
97 | b0a21b53 | bellard | #define REG_IBM_PS2_CENTURY_BYTE 0x37 |
98 | b0a21b53 | bellard | |
99 | b0a21b53 | bellard | |
100 | b0a21b53 | bellard | static inline int to_bcd(RTCState *s, int a) |
101 | b0a21b53 | bellard | { |
102 | b0a21b53 | bellard | return ((a / 10) << 4) | (a % 10); |
103 | b0a21b53 | bellard | } |
104 | 80cabfad | bellard | |
105 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
106 | 777428f2 | bellard | { |
107 | 777428f2 | bellard | int val;
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108 | 777428f2 | bellard | |
109 | 777428f2 | bellard | switch (fd0) {
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110 | 777428f2 | bellard | case 0: |
111 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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112 | 777428f2 | bellard | val = 4;
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113 | 777428f2 | bellard | break;
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114 | 777428f2 | bellard | case 1: |
115 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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116 | 777428f2 | bellard | val = 5;
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117 | 777428f2 | bellard | break;
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118 | 777428f2 | bellard | case 2: |
119 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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120 | 777428f2 | bellard | val = 2;
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121 | 777428f2 | bellard | break;
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122 | 777428f2 | bellard | default:
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123 | 777428f2 | bellard | val = 0;
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124 | 777428f2 | bellard | break;
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125 | 777428f2 | bellard | } |
126 | 777428f2 | bellard | return val;
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127 | 777428f2 | bellard | } |
128 | 777428f2 | bellard | |
129 | ba6c2377 | bellard | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
130 | ba6c2377 | bellard | { |
131 | ba6c2377 | bellard | RTCState *s = rtc_state; |
132 | ba6c2377 | bellard | int cylinders, heads, sectors;
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133 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
134 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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135 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
136 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
137 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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138 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
139 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
140 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
141 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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142 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
143 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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144 | ba6c2377 | bellard | } |
145 | ba6c2377 | bellard | |
146 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
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147 | ba6c2377 | bellard | static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
148 | 80cabfad | bellard | { |
149 | b0a21b53 | bellard | RTCState *s = rtc_state; |
150 | 80cabfad | bellard | int val;
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151 | b41a2cd1 | bellard | int fd0, fd1, nb;
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152 | b0a21b53 | bellard | time_t ti; |
153 | b0a21b53 | bellard | struct tm *tm;
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154 | ba6c2377 | bellard | int i;
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155 | b0a21b53 | bellard | |
156 | b0a21b53 | bellard | /* set the CMOS date */
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157 | b0a21b53 | bellard | time(&ti); |
158 | ee22c2f7 | bellard | if (rtc_utc)
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159 | ee22c2f7 | bellard | tm = gmtime(&ti); |
160 | ee22c2f7 | bellard | else
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161 | ee22c2f7 | bellard | tm = localtime(&ti); |
162 | b0a21b53 | bellard | rtc_set_date(s, tm); |
163 | b0a21b53 | bellard | |
164 | b0a21b53 | bellard | val = to_bcd(s, (tm->tm_year / 100) + 19); |
165 | b0a21b53 | bellard | rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); |
166 | b0a21b53 | bellard | rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); |
167 | 80cabfad | bellard | |
168 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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169 | 80cabfad | bellard | |
170 | 80cabfad | bellard | /* memory size */
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171 | 333190eb | bellard | val = 640; /* base memory in K */ |
172 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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173 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
174 | 333190eb | bellard | |
175 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
176 | 80cabfad | bellard | if (val > 65535) |
177 | 80cabfad | bellard | val = 65535;
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178 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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179 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
180 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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181 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
182 | 80cabfad | bellard | |
183 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
184 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
185 | 9da98861 | bellard | else
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186 | 9da98861 | bellard | val = 0;
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187 | 80cabfad | bellard | if (val > 65535) |
188 | 80cabfad | bellard | val = 65535;
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189 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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190 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
191 | 80cabfad | bellard | |
192 | 80cabfad | bellard | switch(boot_device) {
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193 | 80cabfad | bellard | case 'a': |
194 | 80cabfad | bellard | case 'b': |
195 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
196 | 80cabfad | bellard | break;
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197 | 80cabfad | bellard | default:
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198 | 80cabfad | bellard | case 'c': |
199 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
200 | 80cabfad | bellard | break;
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201 | 80cabfad | bellard | case 'd': |
202 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
203 | 80cabfad | bellard | break;
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204 | 80cabfad | bellard | } |
205 | 80cabfad | bellard | |
206 | b41a2cd1 | bellard | /* floppy type */
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207 | b41a2cd1 | bellard | |
208 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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209 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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210 | 80cabfad | bellard | |
211 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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212 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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213 | b0a21b53 | bellard | |
214 | b0a21b53 | bellard | val = 0;
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215 | b41a2cd1 | bellard | nb = 0;
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216 | 80cabfad | bellard | if (fd0 < 3) |
217 | 80cabfad | bellard | nb++; |
218 | 80cabfad | bellard | if (fd1 < 3) |
219 | 80cabfad | bellard | nb++; |
220 | 80cabfad | bellard | switch (nb) {
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221 | 80cabfad | bellard | case 0: |
222 | 80cabfad | bellard | break;
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223 | 80cabfad | bellard | case 1: |
224 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
225 | 80cabfad | bellard | break;
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226 | 80cabfad | bellard | case 2: |
227 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
228 | 80cabfad | bellard | break;
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229 | 80cabfad | bellard | } |
230 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
231 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
232 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
233 | b0a21b53 | bellard | |
234 | ba6c2377 | bellard | /* hard drives */
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235 | ba6c2377 | bellard | |
236 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
237 | ba6c2377 | bellard | if (hd_table[0]) |
238 | ba6c2377 | bellard | cmos_init_hd(0x19, 0x1b, hd_table[0]); |
239 | ba6c2377 | bellard | if (hd_table[1]) |
240 | ba6c2377 | bellard | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
241 | ba6c2377 | bellard | |
242 | ba6c2377 | bellard | val = 0;
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243 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
244 | ba6c2377 | bellard | if (hd_table[i]) {
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245 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
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246 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
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247 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
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248 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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249 | 46d4767d | bellard | geometry can be different if a translation is done. */
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250 | 46d4767d | bellard | translation = bdrv_get_translation_hint(hd_table[i]); |
251 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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252 | 46d4767d | bellard | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
253 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
254 | 46d4767d | bellard | /* No translation. */
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255 | 46d4767d | bellard | translation = 0;
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256 | 46d4767d | bellard | } else {
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257 | 46d4767d | bellard | /* LBA translation. */
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258 | 46d4767d | bellard | translation = 1;
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259 | 46d4767d | bellard | } |
260 | 40b6ecc6 | bellard | } else {
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261 | 46d4767d | bellard | translation--; |
262 | ba6c2377 | bellard | } |
263 | ba6c2377 | bellard | val |= translation << (i * 2);
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264 | ba6c2377 | bellard | } |
265 | 40b6ecc6 | bellard | } |
266 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
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267 | ba6c2377 | bellard | |
268 | ba6c2377 | bellard | /* Disable check of 0x55AA signature on the last two bytes of
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269 | ba6c2377 | bellard | first sector of disk. XXX: make it the default ? */
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270 | ba6c2377 | bellard | // rtc_set_memory(s, 0x38, 1);
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271 | 80cabfad | bellard | } |
272 | 80cabfad | bellard | |
273 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
274 | 59b8ad81 | bellard | { |
275 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
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276 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
277 | 59b8ad81 | bellard | } |
278 | 59b8ad81 | bellard | |
279 | 59b8ad81 | bellard | int ioport_get_a20(void) |
280 | 59b8ad81 | bellard | { |
281 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
282 | 59b8ad81 | bellard | } |
283 | 59b8ad81 | bellard | |
284 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
285 | e1a23744 | bellard | { |
286 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
287 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
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288 | e1a23744 | bellard | } |
289 | e1a23744 | bellard | |
290 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
291 | e1a23744 | bellard | { |
292 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
293 | e1a23744 | bellard | } |
294 | e1a23744 | bellard | |
295 | 80cabfad | bellard | /***********************************************************/
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296 | 80cabfad | bellard | /* Bochs BIOS debug ports */
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297 | 80cabfad | bellard | |
298 | b41a2cd1 | bellard | void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
299 | 80cabfad | bellard | { |
300 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
301 | a2f659ee | bellard | static int shutdown_index = 0; |
302 | a2f659ee | bellard | |
303 | 80cabfad | bellard | switch(addr) {
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304 | 80cabfad | bellard | /* Bochs BIOS messages */
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305 | 80cabfad | bellard | case 0x400: |
306 | 80cabfad | bellard | case 0x401: |
307 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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308 | 80cabfad | bellard | exit(1);
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309 | 80cabfad | bellard | case 0x402: |
310 | 80cabfad | bellard | case 0x403: |
311 | 80cabfad | bellard | #ifdef DEBUG_BIOS
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312 | 80cabfad | bellard | fprintf(stderr, "%c", val);
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313 | 80cabfad | bellard | #endif
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314 | 80cabfad | bellard | break;
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315 | a2f659ee | bellard | case 0x8900: |
316 | a2f659ee | bellard | /* same as Bochs power off */
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317 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
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318 | a2f659ee | bellard | shutdown_index++; |
319 | a2f659ee | bellard | if (shutdown_index == 8) { |
320 | a2f659ee | bellard | shutdown_index = 0;
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321 | a2f659ee | bellard | qemu_system_shutdown_request(); |
322 | a2f659ee | bellard | } |
323 | a2f659ee | bellard | } else {
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324 | a2f659ee | bellard | shutdown_index = 0;
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325 | a2f659ee | bellard | } |
326 | a2f659ee | bellard | break;
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327 | 80cabfad | bellard | |
328 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
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329 | 80cabfad | bellard | case 0x501: |
330 | 80cabfad | bellard | case 0x502: |
331 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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332 | 80cabfad | bellard | exit(1);
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333 | 80cabfad | bellard | case 0x500: |
334 | 80cabfad | bellard | case 0x503: |
335 | 80cabfad | bellard | #ifdef DEBUG_BIOS
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336 | 80cabfad | bellard | fprintf(stderr, "%c", val);
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337 | 80cabfad | bellard | #endif
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338 | 80cabfad | bellard | break;
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339 | 80cabfad | bellard | } |
340 | 80cabfad | bellard | } |
341 | 80cabfad | bellard | |
342 | 80cabfad | bellard | void bochs_bios_init(void) |
343 | 80cabfad | bellard | { |
344 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
345 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
346 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
347 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
348 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
349 | b41a2cd1 | bellard | |
350 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
351 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
352 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
353 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
354 | 80cabfad | bellard | } |
355 | 80cabfad | bellard | |
356 | 80cabfad | bellard | |
357 | 80cabfad | bellard | int load_kernel(const char *filename, uint8_t *addr, |
358 | 80cabfad | bellard | uint8_t *real_addr) |
359 | 80cabfad | bellard | { |
360 | 80cabfad | bellard | int fd, size;
|
361 | 80cabfad | bellard | int setup_sects;
|
362 | 80cabfad | bellard | |
363 | 096b7ea4 | bellard | fd = open(filename, O_RDONLY | O_BINARY); |
364 | 80cabfad | bellard | if (fd < 0) |
365 | 80cabfad | bellard | return -1; |
366 | 80cabfad | bellard | |
367 | 80cabfad | bellard | /* load 16 bit code */
|
368 | 80cabfad | bellard | if (read(fd, real_addr, 512) != 512) |
369 | 80cabfad | bellard | goto fail;
|
370 | 80cabfad | bellard | setup_sects = real_addr[0x1F1];
|
371 | 80cabfad | bellard | if (!setup_sects)
|
372 | 80cabfad | bellard | setup_sects = 4;
|
373 | 80cabfad | bellard | if (read(fd, real_addr + 512, setup_sects * 512) != |
374 | 80cabfad | bellard | setup_sects * 512)
|
375 | 80cabfad | bellard | goto fail;
|
376 | 80cabfad | bellard | |
377 | 80cabfad | bellard | /* load 32 bit code */
|
378 | 80cabfad | bellard | size = read(fd, addr, 16 * 1024 * 1024); |
379 | 80cabfad | bellard | if (size < 0) |
380 | 80cabfad | bellard | goto fail;
|
381 | 80cabfad | bellard | close(fd); |
382 | 80cabfad | bellard | return size;
|
383 | 80cabfad | bellard | fail:
|
384 | 80cabfad | bellard | close(fd); |
385 | 80cabfad | bellard | return -1; |
386 | 80cabfad | bellard | } |
387 | 80cabfad | bellard | |
388 | 59b8ad81 | bellard | static void main_cpu_reset(void *opaque) |
389 | 59b8ad81 | bellard | { |
390 | 59b8ad81 | bellard | CPUState *env = opaque; |
391 | 59b8ad81 | bellard | cpu_reset(env); |
392 | 59b8ad81 | bellard | } |
393 | 59b8ad81 | bellard | |
394 | 59b8ad81 | bellard | /*************************************************/
|
395 | 59b8ad81 | bellard | |
396 | 59b8ad81 | bellard | static void putb(uint8_t **pp, int val) |
397 | 59b8ad81 | bellard | { |
398 | 59b8ad81 | bellard | uint8_t *q; |
399 | 59b8ad81 | bellard | q = *pp; |
400 | 59b8ad81 | bellard | *q++ = val; |
401 | 59b8ad81 | bellard | *pp = q; |
402 | 59b8ad81 | bellard | } |
403 | 59b8ad81 | bellard | |
404 | 59b8ad81 | bellard | static void putstr(uint8_t **pp, const char *str) |
405 | 59b8ad81 | bellard | { |
406 | 59b8ad81 | bellard | uint8_t *q; |
407 | 59b8ad81 | bellard | q = *pp; |
408 | 59b8ad81 | bellard | while (*str)
|
409 | 59b8ad81 | bellard | *q++ = *str++; |
410 | 59b8ad81 | bellard | *pp = q; |
411 | 59b8ad81 | bellard | } |
412 | 59b8ad81 | bellard | |
413 | 59b8ad81 | bellard | static void putle16(uint8_t **pp, int val) |
414 | 59b8ad81 | bellard | { |
415 | 59b8ad81 | bellard | uint8_t *q; |
416 | 59b8ad81 | bellard | q = *pp; |
417 | 59b8ad81 | bellard | *q++ = val; |
418 | 59b8ad81 | bellard | *q++ = val >> 8;
|
419 | 59b8ad81 | bellard | *pp = q; |
420 | 59b8ad81 | bellard | } |
421 | 59b8ad81 | bellard | |
422 | 59b8ad81 | bellard | static void putle32(uint8_t **pp, int val) |
423 | 59b8ad81 | bellard | { |
424 | 59b8ad81 | bellard | uint8_t *q; |
425 | 59b8ad81 | bellard | q = *pp; |
426 | 59b8ad81 | bellard | *q++ = val; |
427 | 59b8ad81 | bellard | *q++ = val >> 8;
|
428 | 59b8ad81 | bellard | *q++ = val >> 16;
|
429 | 59b8ad81 | bellard | *q++ = val >> 24;
|
430 | 59b8ad81 | bellard | *pp = q; |
431 | 59b8ad81 | bellard | } |
432 | 59b8ad81 | bellard | |
433 | 59b8ad81 | bellard | static int mpf_checksum(const uint8_t *data, int len) |
434 | 59b8ad81 | bellard | { |
435 | 59b8ad81 | bellard | int sum, i;
|
436 | 59b8ad81 | bellard | sum = 0;
|
437 | 59b8ad81 | bellard | for(i = 0; i < len; i++) |
438 | 59b8ad81 | bellard | sum += data[i]; |
439 | 59b8ad81 | bellard | return sum & 0xff; |
440 | 59b8ad81 | bellard | } |
441 | 59b8ad81 | bellard | |
442 | 59b8ad81 | bellard | /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
|
443 | 59b8ad81 | bellard | static void bios_add_mptable(uint8_t *bios_data) |
444 | 59b8ad81 | bellard | { |
445 | 59b8ad81 | bellard | uint8_t *mp_config_table, *q, *float_pointer_struct; |
446 | 59b8ad81 | bellard | int ioapic_id, offset, i, len;
|
447 | 59b8ad81 | bellard | |
448 | 59b8ad81 | bellard | if (smp_cpus <= 1) |
449 | 59b8ad81 | bellard | return;
|
450 | 59b8ad81 | bellard | |
451 | 87022ff5 | bellard | mp_config_table = bios_data + 0xb000;
|
452 | 59b8ad81 | bellard | q = mp_config_table; |
453 | 59b8ad81 | bellard | putstr(&q, "PCMP"); /* "PCMP signature */ |
454 | 59b8ad81 | bellard | putle16(&q, 0); /* table length (patched later) */ |
455 | 59b8ad81 | bellard | putb(&q, 4); /* spec rev */ |
456 | 59b8ad81 | bellard | putb(&q, 0); /* checksum (patched later) */ |
457 | 59b8ad81 | bellard | putstr(&q, "QEMUCPU "); /* OEM id */ |
458 | 59b8ad81 | bellard | putstr(&q, "0.1 "); /* vendor id */ |
459 | 59b8ad81 | bellard | putle32(&q, 0); /* OEM table ptr */ |
460 | 59b8ad81 | bellard | putle16(&q, 0); /* OEM table size */ |
461 | 59b8ad81 | bellard | putle16(&q, 20); /* entry count */ |
462 | 59b8ad81 | bellard | putle32(&q, 0xfee00000); /* local APIC addr */ |
463 | 59b8ad81 | bellard | putle16(&q, 0); /* ext table length */ |
464 | 59b8ad81 | bellard | putb(&q, 0); /* ext table checksum */ |
465 | 59b8ad81 | bellard | putb(&q, 0); /* reserved */ |
466 | 59b8ad81 | bellard | |
467 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
468 | 59b8ad81 | bellard | putb(&q, 0); /* entry type = processor */ |
469 | 59b8ad81 | bellard | putb(&q, i); /* APIC id */
|
470 | 59b8ad81 | bellard | putb(&q, 0x11); /* local APIC version number */ |
471 | 59b8ad81 | bellard | if (i == 0) |
472 | 59b8ad81 | bellard | putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */ |
473 | 59b8ad81 | bellard | else
|
474 | 59b8ad81 | bellard | putb(&q, 1); /* cpu flags: enabled */ |
475 | 59b8ad81 | bellard | putb(&q, 0); /* cpu signature */ |
476 | 59b8ad81 | bellard | putb(&q, 6);
|
477 | 59b8ad81 | bellard | putb(&q, 0);
|
478 | 59b8ad81 | bellard | putb(&q, 0);
|
479 | 59b8ad81 | bellard | putle16(&q, 0x201); /* feature flags */ |
480 | 59b8ad81 | bellard | putle16(&q, 0);
|
481 | 59b8ad81 | bellard | |
482 | 59b8ad81 | bellard | putle16(&q, 0); /* reserved */ |
483 | 59b8ad81 | bellard | putle16(&q, 0);
|
484 | 59b8ad81 | bellard | putle16(&q, 0);
|
485 | 59b8ad81 | bellard | putle16(&q, 0);
|
486 | 59b8ad81 | bellard | } |
487 | 59b8ad81 | bellard | |
488 | 59b8ad81 | bellard | /* isa bus */
|
489 | 59b8ad81 | bellard | putb(&q, 1); /* entry type = bus */ |
490 | 59b8ad81 | bellard | putb(&q, 0); /* bus ID */ |
491 | 59b8ad81 | bellard | putstr(&q, "ISA ");
|
492 | 59b8ad81 | bellard | |
493 | 59b8ad81 | bellard | /* ioapic */
|
494 | 59b8ad81 | bellard | ioapic_id = smp_cpus; |
495 | 59b8ad81 | bellard | putb(&q, 2); /* entry type = I/O APIC */ |
496 | 59b8ad81 | bellard | putb(&q, ioapic_id); /* apic ID */
|
497 | 59b8ad81 | bellard | putb(&q, 0x11); /* I/O APIC version number */ |
498 | 59b8ad81 | bellard | putb(&q, 1); /* enable */ |
499 | 59b8ad81 | bellard | putle32(&q, 0xfec00000); /* I/O APIC addr */ |
500 | 59b8ad81 | bellard | |
501 | 59b8ad81 | bellard | /* irqs */
|
502 | 59b8ad81 | bellard | for(i = 0; i < 16; i++) { |
503 | 59b8ad81 | bellard | putb(&q, 3); /* entry type = I/O interrupt */ |
504 | 59b8ad81 | bellard | putb(&q, 0); /* interrupt type = vectored interrupt */ |
505 | 59b8ad81 | bellard | putb(&q, 0); /* flags: po=0, el=0 */ |
506 | 59b8ad81 | bellard | putb(&q, 0);
|
507 | 59b8ad81 | bellard | putb(&q, 0); /* source bus ID = ISA */ |
508 | 59b8ad81 | bellard | putb(&q, i); /* source bus IRQ */
|
509 | 59b8ad81 | bellard | putb(&q, ioapic_id); /* dest I/O APIC ID */
|
510 | 59b8ad81 | bellard | putb(&q, i); /* dest I/O APIC interrupt in */
|
511 | 59b8ad81 | bellard | } |
512 | 59b8ad81 | bellard | /* patch length */
|
513 | 59b8ad81 | bellard | len = q - mp_config_table; |
514 | 59b8ad81 | bellard | mp_config_table[4] = len;
|
515 | 59b8ad81 | bellard | mp_config_table[5] = len >> 8; |
516 | 59b8ad81 | bellard | |
517 | 59b8ad81 | bellard | mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
|
518 | 59b8ad81 | bellard | |
519 | 59b8ad81 | bellard | /* align to 16 */
|
520 | 59b8ad81 | bellard | offset = q - bios_data; |
521 | 59b8ad81 | bellard | offset = (offset + 15) & ~15; |
522 | 59b8ad81 | bellard | float_pointer_struct = bios_data + offset; |
523 | 59b8ad81 | bellard | |
524 | 59b8ad81 | bellard | /* floating pointer structure */
|
525 | 59b8ad81 | bellard | q = float_pointer_struct; |
526 | 59b8ad81 | bellard | putstr(&q, "_MP_");
|
527 | 59b8ad81 | bellard | /* pointer to MP config table */
|
528 | 59b8ad81 | bellard | putle32(&q, mp_config_table - bios_data + 0x000f0000);
|
529 | 59b8ad81 | bellard | |
530 | 59b8ad81 | bellard | putb(&q, 1); /* length in 16 byte units */ |
531 | 59b8ad81 | bellard | putb(&q, 4); /* MP spec revision */ |
532 | 59b8ad81 | bellard | putb(&q, 0); /* checksum (patched later) */ |
533 | 59b8ad81 | bellard | putb(&q, 0); /* MP feature byte 1 */ |
534 | 59b8ad81 | bellard | |
535 | 59b8ad81 | bellard | putb(&q, 0);
|
536 | 59b8ad81 | bellard | putb(&q, 0);
|
537 | 59b8ad81 | bellard | putb(&q, 0);
|
538 | 59b8ad81 | bellard | putb(&q, 0);
|
539 | 59b8ad81 | bellard | float_pointer_struct[10] =
|
540 | 59b8ad81 | bellard | -mpf_checksum(float_pointer_struct, q - float_pointer_struct); |
541 | 59b8ad81 | bellard | } |
542 | 59b8ad81 | bellard | |
543 | 59b8ad81 | bellard | |
544 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
545 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
546 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
547 | b41a2cd1 | bellard | |
548 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
549 | b41a2cd1 | bellard | |
550 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
551 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
552 | b41a2cd1 | bellard | |
553 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
554 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
555 | 8d11df9e | bellard | |
556 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
557 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
558 | 6508fe59 | bellard | |
559 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
560 | 6a36d84e | bellard | static void audio_init (PCIBus *pci_bus) |
561 | 6a36d84e | bellard | { |
562 | 6a36d84e | bellard | struct soundhw *c;
|
563 | 6a36d84e | bellard | int audio_enabled = 0; |
564 | 6a36d84e | bellard | |
565 | 6a36d84e | bellard | for (c = soundhw; !audio_enabled && c->name; ++c) {
|
566 | 6a36d84e | bellard | audio_enabled = c->enabled; |
567 | 6a36d84e | bellard | } |
568 | 6a36d84e | bellard | |
569 | 6a36d84e | bellard | if (audio_enabled) {
|
570 | 6a36d84e | bellard | AudioState *s; |
571 | 6a36d84e | bellard | |
572 | 6a36d84e | bellard | s = AUD_init (); |
573 | 6a36d84e | bellard | if (s) {
|
574 | 6a36d84e | bellard | for (c = soundhw; c->name; ++c) {
|
575 | 6a36d84e | bellard | if (c->enabled) {
|
576 | 6a36d84e | bellard | if (c->isa) {
|
577 | 6a36d84e | bellard | c->init.init_isa (s); |
578 | 6a36d84e | bellard | } |
579 | 6a36d84e | bellard | else {
|
580 | 6a36d84e | bellard | if (pci_bus) {
|
581 | 6a36d84e | bellard | c->init.init_pci (pci_bus, s); |
582 | 6a36d84e | bellard | } |
583 | 6a36d84e | bellard | } |
584 | 6a36d84e | bellard | } |
585 | 6a36d84e | bellard | } |
586 | 6a36d84e | bellard | } |
587 | 6a36d84e | bellard | } |
588 | 6a36d84e | bellard | } |
589 | 6a36d84e | bellard | #endif
|
590 | 6a36d84e | bellard | |
591 | a41b2ff2 | pbrook | static void pc_init_ne2k_isa(NICInfo *nd) |
592 | a41b2ff2 | pbrook | { |
593 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
594 | a41b2ff2 | pbrook | |
595 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
596 | a41b2ff2 | pbrook | return;
|
597 | a41b2ff2 | pbrook | isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd); |
598 | a41b2ff2 | pbrook | nb_ne2k++; |
599 | a41b2ff2 | pbrook | } |
600 | a41b2ff2 | pbrook | |
601 | 80cabfad | bellard | /* PC hardware initialisation */
|
602 | b5ff2d6e | bellard | static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
603 | b5ff2d6e | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
604 | b5ff2d6e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
605 | 3dbbdc25 | bellard | const char *initrd_filename, |
606 | 3dbbdc25 | bellard | int pci_enabled)
|
607 | 80cabfad | bellard | { |
608 | 80cabfad | bellard | char buf[1024]; |
609 | a41b2ff2 | pbrook | int ret, linux_boot, initrd_size, i;
|
610 | 7587cf44 | bellard | unsigned long bios_offset, vga_bios_offset; |
611 | 7587cf44 | bellard | int bios_size, isa_bios_size;
|
612 | 46e50e9d | bellard | PCIBus *pci_bus; |
613 | 5c3ff3a7 | pbrook | int piix3_devfn = -1; |
614 | 59b8ad81 | bellard | CPUState *env; |
615 | a41b2ff2 | pbrook | NICInfo *nd; |
616 | d592d303 | bellard | |
617 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
618 | 80cabfad | bellard | |
619 | 59b8ad81 | bellard | /* init CPUs */
|
620 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
621 | 59b8ad81 | bellard | env = cpu_init(); |
622 | 59b8ad81 | bellard | if (i != 0) |
623 | ad49ff9d | bellard | env->hflags |= HF_HALTED_MASK; |
624 | 59b8ad81 | bellard | if (smp_cpus > 1) { |
625 | 59b8ad81 | bellard | /* XXX: enable it in all cases */
|
626 | 59b8ad81 | bellard | env->cpuid_features |= CPUID_APIC; |
627 | 59b8ad81 | bellard | } |
628 | e5d13e2f | bellard | register_savevm("cpu", i, 3, cpu_save, cpu_load, env); |
629 | 59b8ad81 | bellard | qemu_register_reset(main_cpu_reset, env); |
630 | 59b8ad81 | bellard | if (pci_enabled) {
|
631 | 59b8ad81 | bellard | apic_init(env); |
632 | 59b8ad81 | bellard | } |
633 | 59b8ad81 | bellard | } |
634 | 59b8ad81 | bellard | |
635 | 80cabfad | bellard | /* allocate RAM */
|
636 | 80cabfad | bellard | cpu_register_physical_memory(0, ram_size, 0); |
637 | 80cabfad | bellard | |
638 | 80cabfad | bellard | /* BIOS load */
|
639 | 7587cf44 | bellard | bios_offset = ram_size + vga_ram_size; |
640 | 7587cf44 | bellard | vga_bios_offset = bios_offset + 256 * 1024; |
641 | 7587cf44 | bellard | |
642 | 80cabfad | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
643 | 7587cf44 | bellard | bios_size = get_image_size(buf); |
644 | 7587cf44 | bellard | if (bios_size <= 0 || |
645 | 7587cf44 | bellard | (bios_size % 65536) != 0 || |
646 | 7587cf44 | bellard | bios_size > (256 * 1024)) { |
647 | 7587cf44 | bellard | goto bios_error;
|
648 | 7587cf44 | bellard | } |
649 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + bios_offset); |
650 | 7587cf44 | bellard | if (ret != bios_size) {
|
651 | 7587cf44 | bellard | bios_error:
|
652 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
|
653 | 80cabfad | bellard | exit(1);
|
654 | 80cabfad | bellard | } |
655 | 59b8ad81 | bellard | if (bios_size == 65536) { |
656 | 59b8ad81 | bellard | bios_add_mptable(phys_ram_base + bios_offset); |
657 | 59b8ad81 | bellard | } |
658 | 7587cf44 | bellard | |
659 | 80cabfad | bellard | /* VGA BIOS load */
|
660 | de9258a8 | bellard | if (cirrus_vga_enabled) {
|
661 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
662 | de9258a8 | bellard | } else {
|
663 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
664 | de9258a8 | bellard | } |
665 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
666 | 80cabfad | bellard | |
667 | 80cabfad | bellard | /* setup basic memory access */
|
668 | 7587cf44 | bellard | cpu_register_physical_memory(0xc0000, 0x10000, |
669 | 7587cf44 | bellard | vga_bios_offset | IO_MEM_ROM); |
670 | 7587cf44 | bellard | |
671 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
672 | 7587cf44 | bellard | isa_bios_size = bios_size; |
673 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
674 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
675 | 7587cf44 | bellard | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
676 | 7587cf44 | bellard | IO_MEM_UNASSIGNED); |
677 | 7587cf44 | bellard | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
678 | 7587cf44 | bellard | isa_bios_size, |
679 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
680 | 7587cf44 | bellard | /* map all the bios at the top of memory */
|
681 | 7587cf44 | bellard | cpu_register_physical_memory((uint32_t)(-bios_size), |
682 | 7587cf44 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
683 | 80cabfad | bellard | |
684 | 80cabfad | bellard | bochs_bios_init(); |
685 | 80cabfad | bellard | |
686 | 80cabfad | bellard | if (linux_boot) {
|
687 | 80cabfad | bellard | uint8_t bootsect[512];
|
688 | 41b9be47 | bellard | uint8_t old_bootsect[512];
|
689 | 80cabfad | bellard | |
690 | 80cabfad | bellard | if (bs_table[0] == NULL) { |
691 | 80cabfad | bellard | fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
692 | 80cabfad | bellard | exit(1);
|
693 | 80cabfad | bellard | } |
694 | 80cabfad | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
695 | 80cabfad | bellard | ret = load_image(buf, bootsect); |
696 | 80cabfad | bellard | if (ret != sizeof(bootsect)) { |
697 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
698 | 80cabfad | bellard | buf); |
699 | 80cabfad | bellard | exit(1);
|
700 | 80cabfad | bellard | } |
701 | 80cabfad | bellard | |
702 | 41b9be47 | bellard | if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { |
703 | 41b9be47 | bellard | /* copy the MSDOS partition table */
|
704 | 41b9be47 | bellard | memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); |
705 | 41b9be47 | bellard | } |
706 | 41b9be47 | bellard | |
707 | 80cabfad | bellard | bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
708 | 80cabfad | bellard | |
709 | 80cabfad | bellard | /* now we can load the kernel */
|
710 | 80cabfad | bellard | ret = load_kernel(kernel_filename, |
711 | 80cabfad | bellard | phys_ram_base + KERNEL_LOAD_ADDR, |
712 | 80cabfad | bellard | phys_ram_base + KERNEL_PARAMS_ADDR); |
713 | 80cabfad | bellard | if (ret < 0) { |
714 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
715 | 80cabfad | bellard | kernel_filename); |
716 | 80cabfad | bellard | exit(1);
|
717 | 80cabfad | bellard | } |
718 | 80cabfad | bellard | |
719 | 80cabfad | bellard | /* load initrd */
|
720 | 80cabfad | bellard | initrd_size = 0;
|
721 | 80cabfad | bellard | if (initrd_filename) {
|
722 | 80cabfad | bellard | initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
723 | 80cabfad | bellard | if (initrd_size < 0) { |
724 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
725 | 80cabfad | bellard | initrd_filename); |
726 | 80cabfad | bellard | exit(1);
|
727 | 80cabfad | bellard | } |
728 | 80cabfad | bellard | } |
729 | 80cabfad | bellard | if (initrd_size > 0) { |
730 | 80cabfad | bellard | stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
|
731 | 80cabfad | bellard | stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
732 | 80cabfad | bellard | } |
733 | 80cabfad | bellard | pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
734 | 80cabfad | bellard | kernel_cmdline); |
735 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
736 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
737 | 80cabfad | bellard | KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
738 | 80cabfad | bellard | /* loader type */
|
739 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
740 | 80cabfad | bellard | } |
741 | 80cabfad | bellard | |
742 | 69b91039 | bellard | if (pci_enabled) {
|
743 | 46e50e9d | bellard | pci_bus = i440fx_init(); |
744 | 502a5395 | pbrook | piix3_devfn = piix3_init(pci_bus); |
745 | 46e50e9d | bellard | } else {
|
746 | 46e50e9d | bellard | pci_bus = NULL;
|
747 | 69b91039 | bellard | } |
748 | 69b91039 | bellard | |
749 | 80cabfad | bellard | /* init basic PC hardware */
|
750 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
751 | 80cabfad | bellard | |
752 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
753 | f929aad6 | bellard | |
754 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
755 | 1f04275e | bellard | if (pci_enabled) {
|
756 | 46e50e9d | bellard | pci_cirrus_vga_init(pci_bus, |
757 | 46e50e9d | bellard | ds, phys_ram_base + ram_size, ram_size, |
758 | 1f04275e | bellard | vga_ram_size); |
759 | 1f04275e | bellard | } else {
|
760 | 1f04275e | bellard | isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, |
761 | 1f04275e | bellard | vga_ram_size); |
762 | 1f04275e | bellard | } |
763 | 1f04275e | bellard | } else {
|
764 | 46e50e9d | bellard | vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, |
765 | d5295253 | bellard | vga_ram_size, 0, 0); |
766 | 1f04275e | bellard | } |
767 | 80cabfad | bellard | |
768 | b0a21b53 | bellard | rtc_state = rtc_init(0x70, 8); |
769 | 80cabfad | bellard | |
770 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
771 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
772 | e1a23744 | bellard | |
773 | d592d303 | bellard | if (pci_enabled) {
|
774 | d592d303 | bellard | ioapic = ioapic_init(); |
775 | d592d303 | bellard | } |
776 | 59b8ad81 | bellard | isa_pic = pic_init(pic_irq_request, first_cpu); |
777 | ec844b96 | bellard | pit = pit_init(0x40, 0); |
778 | fd06c375 | bellard | pcspk_init(pit); |
779 | d592d303 | bellard | if (pci_enabled) {
|
780 | d592d303 | bellard | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
781 | d592d303 | bellard | } |
782 | b41a2cd1 | bellard | |
783 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
784 | 8d11df9e | bellard | if (serial_hds[i]) {
|
785 | e5d13e2f | bellard | serial_init(&pic_set_irq_new, isa_pic, |
786 | e5d13e2f | bellard | serial_io[i], serial_irq[i], serial_hds[i]); |
787 | 8d11df9e | bellard | } |
788 | 8d11df9e | bellard | } |
789 | b41a2cd1 | bellard | |
790 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
791 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
792 | 6508fe59 | bellard | parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); |
793 | 6508fe59 | bellard | } |
794 | 6508fe59 | bellard | } |
795 | 6508fe59 | bellard | |
796 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
797 | a41b2ff2 | pbrook | nd = &nd_table[i]; |
798 | a41b2ff2 | pbrook | if (!nd->model) {
|
799 | a41b2ff2 | pbrook | if (pci_enabled) {
|
800 | a41b2ff2 | pbrook | nd->model = "ne2k_pci";
|
801 | a41b2ff2 | pbrook | } else {
|
802 | a41b2ff2 | pbrook | nd->model = "ne2k_isa";
|
803 | a41b2ff2 | pbrook | } |
804 | 69b91039 | bellard | } |
805 | a41b2ff2 | pbrook | if (strcmp(nd->model, "ne2k_isa") == 0) { |
806 | a41b2ff2 | pbrook | pc_init_ne2k_isa(nd); |
807 | a41b2ff2 | pbrook | } else if (pci_enabled) { |
808 | a41b2ff2 | pbrook | pci_nic_init(pci_bus, nd); |
809 | a41b2ff2 | pbrook | } else {
|
810 | a41b2ff2 | pbrook | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
811 | a41b2ff2 | pbrook | exit(1);
|
812 | 69b91039 | bellard | } |
813 | a41b2ff2 | pbrook | } |
814 | b41a2cd1 | bellard | |
815 | a41b2ff2 | pbrook | if (pci_enabled) {
|
816 | 502a5395 | pbrook | pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
|
817 | a41b2ff2 | pbrook | } else {
|
818 | 69b91039 | bellard | for(i = 0; i < 2; i++) { |
819 | 69b91039 | bellard | isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
820 | 69b91039 | bellard | bs_table[2 * i], bs_table[2 * i + 1]); |
821 | 69b91039 | bellard | } |
822 | b41a2cd1 | bellard | } |
823 | 69b91039 | bellard | |
824 | 80cabfad | bellard | kbd_init(); |
825 | 7c29d0c0 | bellard | DMA_init(0);
|
826 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
827 | 6a36d84e | bellard | audio_init(pci_enabled ? pci_bus : NULL);
|
828 | fb065187 | bellard | #endif
|
829 | 80cabfad | bellard | |
830 | baca51fa | bellard | floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
831 | b41a2cd1 | bellard | |
832 | ba6c2377 | bellard | cmos_init(ram_size, boot_device, bs_table); |
833 | 69b91039 | bellard | |
834 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
835 | 0d92ed30 | pbrook | usb_uhci_init(pci_bus, piix3_devfn + 2);
|
836 | bb36d470 | bellard | } |
837 | bb36d470 | bellard | |
838 | 6515b203 | bellard | if (pci_enabled && acpi_enabled) {
|
839 | 502a5395 | pbrook | piix4_pm_init(pci_bus, piix3_devfn + 3);
|
840 | 6515b203 | bellard | } |
841 | 7d8406be | pbrook | |
842 | 7d8406be | pbrook | #if 0
|
843 | 7d8406be | pbrook | /* ??? Need to figure out some way for the user to
|
844 | 7d8406be | pbrook | specify SCSI devices. */
|
845 | 7d8406be | pbrook | if (pci_enabled) {
|
846 | 7d8406be | pbrook | void *scsi;
|
847 | 7d8406be | pbrook | BlockDriverState *bdrv;
|
848 | 7d8406be | pbrook | |
849 | 7d8406be | pbrook | scsi = lsi_scsi_init(pci_bus, -1);
|
850 | 7d8406be | pbrook | bdrv = bdrv_new("scsidisk");
|
851 | 7d8406be | pbrook | bdrv_open(bdrv, "scsi_disk.img", 0);
|
852 | 7d8406be | pbrook | lsi_scsi_attach(scsi, bdrv, -1);
|
853 | 7d8406be | pbrook | bdrv = bdrv_new("scsicd");
|
854 | 7d8406be | pbrook | bdrv_open(bdrv, "scsi_cd.iso", 0);
|
855 | 7d8406be | pbrook | bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
856 | 7d8406be | pbrook | lsi_scsi_attach(scsi, bdrv, -1);
|
857 | 7d8406be | pbrook | }
|
858 | 7d8406be | pbrook | #endif
|
859 | 69b91039 | bellard | /* must be done after all PCI devices are instanciated */
|
860 | 69b91039 | bellard | /* XXX: should be done in the Bochs BIOS */
|
861 | 69b91039 | bellard | if (pci_enabled) {
|
862 | 69b91039 | bellard | pci_bios_init(); |
863 | 6515b203 | bellard | if (acpi_enabled)
|
864 | 6515b203 | bellard | acpi_bios_init(); |
865 | 69b91039 | bellard | } |
866 | 80cabfad | bellard | } |
867 | b5ff2d6e | bellard | |
868 | 3dbbdc25 | bellard | static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
869 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
870 | 3dbbdc25 | bellard | int snapshot,
|
871 | 3dbbdc25 | bellard | const char *kernel_filename, |
872 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
873 | 3dbbdc25 | bellard | const char *initrd_filename) |
874 | 3dbbdc25 | bellard | { |
875 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
876 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
877 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
878 | 3dbbdc25 | bellard | initrd_filename, 1);
|
879 | 3dbbdc25 | bellard | } |
880 | 3dbbdc25 | bellard | |
881 | 3dbbdc25 | bellard | static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, |
882 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
883 | 3dbbdc25 | bellard | int snapshot,
|
884 | 3dbbdc25 | bellard | const char *kernel_filename, |
885 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
886 | 3dbbdc25 | bellard | const char *initrd_filename) |
887 | 3dbbdc25 | bellard | { |
888 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
889 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
890 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
891 | 3dbbdc25 | bellard | initrd_filename, 0);
|
892 | 3dbbdc25 | bellard | } |
893 | 3dbbdc25 | bellard | |
894 | b5ff2d6e | bellard | QEMUMachine pc_machine = { |
895 | b5ff2d6e | bellard | "pc",
|
896 | b5ff2d6e | bellard | "Standard PC",
|
897 | 3dbbdc25 | bellard | pc_init_pci, |
898 | 3dbbdc25 | bellard | }; |
899 | 3dbbdc25 | bellard | |
900 | 3dbbdc25 | bellard | QEMUMachine isapc_machine = { |
901 | 3dbbdc25 | bellard | "isapc",
|
902 | 3dbbdc25 | bellard | "ISA-only PC",
|
903 | 3dbbdc25 | bellard | pc_init_isa, |
904 | b5ff2d6e | bellard | }; |