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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC System Emulator
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3 | 80cabfad | bellard | *
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4 | 80cabfad | bellard | * Copyright (c) 2003-2004 Fabrice Bellard
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5 | 80cabfad | bellard | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 80cabfad | bellard | #include "vl.h" |
25 | 80cabfad | bellard | |
26 | b41a2cd1 | bellard | /* output Bochs bios info messages */
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27 | b41a2cd1 | bellard | //#define DEBUG_BIOS
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28 | b41a2cd1 | bellard | |
29 | 80cabfad | bellard | #define BIOS_FILENAME "bios.bin" |
30 | 80cabfad | bellard | #define VGABIOS_FILENAME "vgabios.bin" |
31 | de9258a8 | bellard | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
32 | 80cabfad | bellard | #define LINUX_BOOT_FILENAME "linux_boot.bin" |
33 | 80cabfad | bellard | |
34 | 80cabfad | bellard | #define KERNEL_LOAD_ADDR 0x00100000 |
35 | 80cabfad | bellard | #define INITRD_LOAD_ADDR 0x00400000 |
36 | 80cabfad | bellard | #define KERNEL_PARAMS_ADDR 0x00090000 |
37 | 80cabfad | bellard | #define KERNEL_CMDLINE_ADDR 0x00099000 |
38 | 80cabfad | bellard | |
39 | 80cabfad | bellard | int speaker_data_on;
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40 | 80cabfad | bellard | int dummy_refresh_clock;
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41 | baca51fa | bellard | static fdctrl_t *floppy_controller;
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42 | b0a21b53 | bellard | static RTCState *rtc_state;
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43 | ec844b96 | bellard | static PITState *pit;
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44 | d592d303 | bellard | static IOAPICState *ioapic;
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45 | a594cfbf | bellard | static USBPort *usb_root_ports[2]; |
46 | 80cabfad | bellard | |
47 | b41a2cd1 | bellard | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
48 | 80cabfad | bellard | { |
49 | 80cabfad | bellard | } |
50 | 80cabfad | bellard | |
51 | f929aad6 | bellard | /* MSDOS compatibility mode FPU exception support */
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52 | f929aad6 | bellard | /* XXX: add IGNNE support */
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53 | f929aad6 | bellard | void cpu_set_ferr(CPUX86State *s)
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54 | f929aad6 | bellard | { |
55 | f929aad6 | bellard | pic_set_irq(13, 1); |
56 | f929aad6 | bellard | } |
57 | f929aad6 | bellard | |
58 | f929aad6 | bellard | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
59 | f929aad6 | bellard | { |
60 | f929aad6 | bellard | pic_set_irq(13, 0); |
61 | f929aad6 | bellard | } |
62 | f929aad6 | bellard | |
63 | 28ab0e2e | bellard | /* TSC handling */
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64 | 28ab0e2e | bellard | |
65 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
66 | 28ab0e2e | bellard | { |
67 | 28ab0e2e | bellard | return qemu_get_clock(vm_clock);
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68 | 28ab0e2e | bellard | } |
69 | 28ab0e2e | bellard | |
70 | 3de388f6 | bellard | /* IRQ handling */
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71 | 3de388f6 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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72 | 3de388f6 | bellard | { |
73 | 3de388f6 | bellard | int intno;
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74 | 3de388f6 | bellard | |
75 | 3de388f6 | bellard | intno = apic_get_interrupt(env); |
76 | 3de388f6 | bellard | if (intno >= 0) { |
77 | 3de388f6 | bellard | /* set irq request if a PIC irq is still pending */
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78 | 3de388f6 | bellard | /* XXX: improve that */
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79 | 3de388f6 | bellard | pic_update_irq(isa_pic); |
80 | 3de388f6 | bellard | return intno;
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81 | 3de388f6 | bellard | } |
82 | 3de388f6 | bellard | /* read the irq from the PIC */
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83 | 3de388f6 | bellard | intno = pic_read_irq(isa_pic); |
84 | 3de388f6 | bellard | return intno;
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85 | 3de388f6 | bellard | } |
86 | 3de388f6 | bellard | |
87 | 3de388f6 | bellard | static void pic_irq_request(void *opaque, int level) |
88 | 3de388f6 | bellard | { |
89 | 59b8ad81 | bellard | CPUState *env = opaque; |
90 | 3de388f6 | bellard | if (level)
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91 | 59b8ad81 | bellard | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
92 | 3de388f6 | bellard | else
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93 | 59b8ad81 | bellard | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
94 | 3de388f6 | bellard | } |
95 | 3de388f6 | bellard | |
96 | b0a21b53 | bellard | /* PC cmos mappings */
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97 | b0a21b53 | bellard | |
98 | 80cabfad | bellard | #define REG_EQUIPMENT_BYTE 0x14 |
99 | b0a21b53 | bellard | #define REG_IBM_CENTURY_BYTE 0x32 |
100 | b0a21b53 | bellard | #define REG_IBM_PS2_CENTURY_BYTE 0x37 |
101 | b0a21b53 | bellard | |
102 | b0a21b53 | bellard | |
103 | b0a21b53 | bellard | static inline int to_bcd(RTCState *s, int a) |
104 | b0a21b53 | bellard | { |
105 | b0a21b53 | bellard | return ((a / 10) << 4) | (a % 10); |
106 | b0a21b53 | bellard | } |
107 | 80cabfad | bellard | |
108 | 777428f2 | bellard | static int cmos_get_fd_drive_type(int fd0) |
109 | 777428f2 | bellard | { |
110 | 777428f2 | bellard | int val;
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111 | 777428f2 | bellard | |
112 | 777428f2 | bellard | switch (fd0) {
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113 | 777428f2 | bellard | case 0: |
114 | 777428f2 | bellard | /* 1.44 Mb 3"5 drive */
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115 | 777428f2 | bellard | val = 4;
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116 | 777428f2 | bellard | break;
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117 | 777428f2 | bellard | case 1: |
118 | 777428f2 | bellard | /* 2.88 Mb 3"5 drive */
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119 | 777428f2 | bellard | val = 5;
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120 | 777428f2 | bellard | break;
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121 | 777428f2 | bellard | case 2: |
122 | 777428f2 | bellard | /* 1.2 Mb 5"5 drive */
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123 | 777428f2 | bellard | val = 2;
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124 | 777428f2 | bellard | break;
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125 | 777428f2 | bellard | default:
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126 | 777428f2 | bellard | val = 0;
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127 | 777428f2 | bellard | break;
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128 | 777428f2 | bellard | } |
129 | 777428f2 | bellard | return val;
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130 | 777428f2 | bellard | } |
131 | 777428f2 | bellard | |
132 | ba6c2377 | bellard | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
133 | ba6c2377 | bellard | { |
134 | ba6c2377 | bellard | RTCState *s = rtc_state; |
135 | ba6c2377 | bellard | int cylinders, heads, sectors;
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136 | ba6c2377 | bellard | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
137 | ba6c2377 | bellard | rtc_set_memory(s, type_ofs, 47);
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138 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs, cylinders); |
139 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
140 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 2, heads);
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141 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 3, 0xff); |
142 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 4, 0xff); |
143 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
144 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 6, cylinders);
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145 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
146 | ba6c2377 | bellard | rtc_set_memory(s, info_ofs + 8, sectors);
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147 | ba6c2377 | bellard | } |
148 | ba6c2377 | bellard | |
149 | ba6c2377 | bellard | /* hd_table must contain 4 block drivers */
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150 | ba6c2377 | bellard | static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
151 | 80cabfad | bellard | { |
152 | b0a21b53 | bellard | RTCState *s = rtc_state; |
153 | 80cabfad | bellard | int val;
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154 | b41a2cd1 | bellard | int fd0, fd1, nb;
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155 | b0a21b53 | bellard | time_t ti; |
156 | b0a21b53 | bellard | struct tm *tm;
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157 | ba6c2377 | bellard | int i;
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158 | b0a21b53 | bellard | |
159 | b0a21b53 | bellard | /* set the CMOS date */
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160 | b0a21b53 | bellard | time(&ti); |
161 | ee22c2f7 | bellard | if (rtc_utc)
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162 | ee22c2f7 | bellard | tm = gmtime(&ti); |
163 | ee22c2f7 | bellard | else
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164 | ee22c2f7 | bellard | tm = localtime(&ti); |
165 | b0a21b53 | bellard | rtc_set_date(s, tm); |
166 | b0a21b53 | bellard | |
167 | b0a21b53 | bellard | val = to_bcd(s, (tm->tm_year / 100) + 19); |
168 | b0a21b53 | bellard | rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); |
169 | b0a21b53 | bellard | rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); |
170 | 80cabfad | bellard | |
171 | b0a21b53 | bellard | /* various important CMOS locations needed by PC/Bochs bios */
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172 | 80cabfad | bellard | |
173 | 80cabfad | bellard | /* memory size */
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174 | 333190eb | bellard | val = 640; /* base memory in K */ |
175 | 333190eb | bellard | rtc_set_memory(s, 0x15, val);
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176 | 333190eb | bellard | rtc_set_memory(s, 0x16, val >> 8); |
177 | 333190eb | bellard | |
178 | 80cabfad | bellard | val = (ram_size / 1024) - 1024; |
179 | 80cabfad | bellard | if (val > 65535) |
180 | 80cabfad | bellard | val = 65535;
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181 | b0a21b53 | bellard | rtc_set_memory(s, 0x17, val);
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182 | b0a21b53 | bellard | rtc_set_memory(s, 0x18, val >> 8); |
183 | b0a21b53 | bellard | rtc_set_memory(s, 0x30, val);
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184 | b0a21b53 | bellard | rtc_set_memory(s, 0x31, val >> 8); |
185 | 80cabfad | bellard | |
186 | 9da98861 | bellard | if (ram_size > (16 * 1024 * 1024)) |
187 | 9da98861 | bellard | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
188 | 9da98861 | bellard | else
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189 | 9da98861 | bellard | val = 0;
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190 | 80cabfad | bellard | if (val > 65535) |
191 | 80cabfad | bellard | val = 65535;
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192 | b0a21b53 | bellard | rtc_set_memory(s, 0x34, val);
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193 | b0a21b53 | bellard | rtc_set_memory(s, 0x35, val >> 8); |
194 | 80cabfad | bellard | |
195 | 80cabfad | bellard | switch(boot_device) {
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196 | 80cabfad | bellard | case 'a': |
197 | 80cabfad | bellard | case 'b': |
198 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
199 | 80cabfad | bellard | break;
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200 | 80cabfad | bellard | default:
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201 | 80cabfad | bellard | case 'c': |
202 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
203 | 80cabfad | bellard | break;
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204 | 80cabfad | bellard | case 'd': |
205 | b0a21b53 | bellard | rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
206 | 80cabfad | bellard | break;
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207 | 80cabfad | bellard | } |
208 | 80cabfad | bellard | |
209 | b41a2cd1 | bellard | /* floppy type */
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210 | b41a2cd1 | bellard | |
211 | baca51fa | bellard | fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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212 | baca51fa | bellard | fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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213 | 80cabfad | bellard | |
214 | 777428f2 | bellard | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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215 | b0a21b53 | bellard | rtc_set_memory(s, 0x10, val);
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216 | b0a21b53 | bellard | |
217 | b0a21b53 | bellard | val = 0;
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218 | b41a2cd1 | bellard | nb = 0;
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219 | 80cabfad | bellard | if (fd0 < 3) |
220 | 80cabfad | bellard | nb++; |
221 | 80cabfad | bellard | if (fd1 < 3) |
222 | 80cabfad | bellard | nb++; |
223 | 80cabfad | bellard | switch (nb) {
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224 | 80cabfad | bellard | case 0: |
225 | 80cabfad | bellard | break;
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226 | 80cabfad | bellard | case 1: |
227 | b0a21b53 | bellard | val |= 0x01; /* 1 drive, ready for boot */ |
228 | 80cabfad | bellard | break;
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229 | 80cabfad | bellard | case 2: |
230 | b0a21b53 | bellard | val |= 0x41; /* 2 drives, ready for boot */ |
231 | 80cabfad | bellard | break;
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232 | 80cabfad | bellard | } |
233 | b0a21b53 | bellard | val |= 0x02; /* FPU is there */ |
234 | b0a21b53 | bellard | val |= 0x04; /* PS/2 mouse installed */ |
235 | b0a21b53 | bellard | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
236 | b0a21b53 | bellard | |
237 | ba6c2377 | bellard | /* hard drives */
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238 | ba6c2377 | bellard | |
239 | ba6c2377 | bellard | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
240 | ba6c2377 | bellard | if (hd_table[0]) |
241 | ba6c2377 | bellard | cmos_init_hd(0x19, 0x1b, hd_table[0]); |
242 | ba6c2377 | bellard | if (hd_table[1]) |
243 | ba6c2377 | bellard | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
244 | ba6c2377 | bellard | |
245 | ba6c2377 | bellard | val = 0;
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246 | 40b6ecc6 | bellard | for (i = 0; i < 4; i++) { |
247 | ba6c2377 | bellard | if (hd_table[i]) {
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248 | 46d4767d | bellard | int cylinders, heads, sectors, translation;
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249 | 46d4767d | bellard | /* NOTE: bdrv_get_geometry_hint() returns the physical
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250 | 46d4767d | bellard | geometry. It is always such that: 1 <= sects <= 63, 1
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251 | 46d4767d | bellard | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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252 | 46d4767d | bellard | geometry can be different if a translation is done. */
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253 | 46d4767d | bellard | translation = bdrv_get_translation_hint(hd_table[i]); |
254 | 46d4767d | bellard | if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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255 | 46d4767d | bellard | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
256 | 46d4767d | bellard | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
257 | 46d4767d | bellard | /* No translation. */
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258 | 46d4767d | bellard | translation = 0;
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259 | 46d4767d | bellard | } else {
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260 | 46d4767d | bellard | /* LBA translation. */
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261 | 46d4767d | bellard | translation = 1;
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262 | 46d4767d | bellard | } |
263 | 40b6ecc6 | bellard | } else {
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264 | 46d4767d | bellard | translation--; |
265 | ba6c2377 | bellard | } |
266 | ba6c2377 | bellard | val |= translation << (i * 2);
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267 | ba6c2377 | bellard | } |
268 | 40b6ecc6 | bellard | } |
269 | ba6c2377 | bellard | rtc_set_memory(s, 0x39, val);
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270 | ba6c2377 | bellard | |
271 | ba6c2377 | bellard | /* Disable check of 0x55AA signature on the last two bytes of
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272 | ba6c2377 | bellard | first sector of disk. XXX: make it the default ? */
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273 | ba6c2377 | bellard | // rtc_set_memory(s, 0x38, 1);
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274 | 80cabfad | bellard | } |
275 | 80cabfad | bellard | |
276 | b41a2cd1 | bellard | static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
277 | 80cabfad | bellard | { |
278 | 80cabfad | bellard | speaker_data_on = (val >> 1) & 1; |
279 | ec844b96 | bellard | pit_set_gate(pit, 2, val & 1); |
280 | 80cabfad | bellard | } |
281 | 80cabfad | bellard | |
282 | b41a2cd1 | bellard | static uint32_t speaker_ioport_read(void *opaque, uint32_t addr) |
283 | 80cabfad | bellard | { |
284 | 80cabfad | bellard | int out;
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285 | ec844b96 | bellard | out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
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286 | 80cabfad | bellard | dummy_refresh_clock ^= 1;
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287 | ec844b96 | bellard | return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) | |
288 | 80cabfad | bellard | (dummy_refresh_clock << 4);
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289 | 80cabfad | bellard | } |
290 | 80cabfad | bellard | |
291 | 59b8ad81 | bellard | void ioport_set_a20(int enable) |
292 | 59b8ad81 | bellard | { |
293 | 59b8ad81 | bellard | /* XXX: send to all CPUs ? */
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294 | 59b8ad81 | bellard | cpu_x86_set_a20(first_cpu, enable); |
295 | 59b8ad81 | bellard | } |
296 | 59b8ad81 | bellard | |
297 | 59b8ad81 | bellard | int ioport_get_a20(void) |
298 | 59b8ad81 | bellard | { |
299 | 59b8ad81 | bellard | return ((first_cpu->a20_mask >> 20) & 1); |
300 | 59b8ad81 | bellard | } |
301 | 59b8ad81 | bellard | |
302 | e1a23744 | bellard | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
303 | e1a23744 | bellard | { |
304 | 59b8ad81 | bellard | ioport_set_a20((val >> 1) & 1); |
305 | e1a23744 | bellard | /* XXX: bit 0 is fast reset */
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306 | e1a23744 | bellard | } |
307 | e1a23744 | bellard | |
308 | e1a23744 | bellard | static uint32_t ioport92_read(void *opaque, uint32_t addr) |
309 | e1a23744 | bellard | { |
310 | 59b8ad81 | bellard | return ioport_get_a20() << 1; |
311 | e1a23744 | bellard | } |
312 | e1a23744 | bellard | |
313 | 80cabfad | bellard | /***********************************************************/
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314 | 80cabfad | bellard | /* Bochs BIOS debug ports */
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315 | 80cabfad | bellard | |
316 | b41a2cd1 | bellard | void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
317 | 80cabfad | bellard | { |
318 | a2f659ee | bellard | static const char shutdown_str[8] = "Shutdown"; |
319 | a2f659ee | bellard | static int shutdown_index = 0; |
320 | a2f659ee | bellard | |
321 | 80cabfad | bellard | switch(addr) {
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322 | 80cabfad | bellard | /* Bochs BIOS messages */
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323 | 80cabfad | bellard | case 0x400: |
324 | 80cabfad | bellard | case 0x401: |
325 | 80cabfad | bellard | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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326 | 80cabfad | bellard | exit(1);
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327 | 80cabfad | bellard | case 0x402: |
328 | 80cabfad | bellard | case 0x403: |
329 | 80cabfad | bellard | #ifdef DEBUG_BIOS
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330 | 80cabfad | bellard | fprintf(stderr, "%c", val);
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331 | 80cabfad | bellard | #endif
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332 | 80cabfad | bellard | break;
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333 | a2f659ee | bellard | case 0x8900: |
334 | a2f659ee | bellard | /* same as Bochs power off */
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335 | a2f659ee | bellard | if (val == shutdown_str[shutdown_index]) {
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336 | a2f659ee | bellard | shutdown_index++; |
337 | a2f659ee | bellard | if (shutdown_index == 8) { |
338 | a2f659ee | bellard | shutdown_index = 0;
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339 | a2f659ee | bellard | qemu_system_shutdown_request(); |
340 | a2f659ee | bellard | } |
341 | a2f659ee | bellard | } else {
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342 | a2f659ee | bellard | shutdown_index = 0;
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343 | a2f659ee | bellard | } |
344 | a2f659ee | bellard | break;
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345 | 80cabfad | bellard | |
346 | 80cabfad | bellard | /* LGPL'ed VGA BIOS messages */
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347 | 80cabfad | bellard | case 0x501: |
348 | 80cabfad | bellard | case 0x502: |
349 | 80cabfad | bellard | fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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350 | 80cabfad | bellard | exit(1);
|
351 | 80cabfad | bellard | case 0x500: |
352 | 80cabfad | bellard | case 0x503: |
353 | 80cabfad | bellard | #ifdef DEBUG_BIOS
|
354 | 80cabfad | bellard | fprintf(stderr, "%c", val);
|
355 | 80cabfad | bellard | #endif
|
356 | 80cabfad | bellard | break;
|
357 | 80cabfad | bellard | } |
358 | 80cabfad | bellard | } |
359 | 80cabfad | bellard | |
360 | 80cabfad | bellard | void bochs_bios_init(void) |
361 | 80cabfad | bellard | { |
362 | b41a2cd1 | bellard | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
363 | b41a2cd1 | bellard | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
364 | b41a2cd1 | bellard | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
365 | b41a2cd1 | bellard | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
366 | a2f659ee | bellard | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
367 | b41a2cd1 | bellard | |
368 | b41a2cd1 | bellard | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
369 | b41a2cd1 | bellard | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
370 | b41a2cd1 | bellard | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
371 | b41a2cd1 | bellard | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
372 | 80cabfad | bellard | } |
373 | 80cabfad | bellard | |
374 | 80cabfad | bellard | |
375 | 80cabfad | bellard | int load_kernel(const char *filename, uint8_t *addr, |
376 | 80cabfad | bellard | uint8_t *real_addr) |
377 | 80cabfad | bellard | { |
378 | 80cabfad | bellard | int fd, size;
|
379 | 80cabfad | bellard | int setup_sects;
|
380 | 80cabfad | bellard | |
381 | 096b7ea4 | bellard | fd = open(filename, O_RDONLY | O_BINARY); |
382 | 80cabfad | bellard | if (fd < 0) |
383 | 80cabfad | bellard | return -1; |
384 | 80cabfad | bellard | |
385 | 80cabfad | bellard | /* load 16 bit code */
|
386 | 80cabfad | bellard | if (read(fd, real_addr, 512) != 512) |
387 | 80cabfad | bellard | goto fail;
|
388 | 80cabfad | bellard | setup_sects = real_addr[0x1F1];
|
389 | 80cabfad | bellard | if (!setup_sects)
|
390 | 80cabfad | bellard | setup_sects = 4;
|
391 | 80cabfad | bellard | if (read(fd, real_addr + 512, setup_sects * 512) != |
392 | 80cabfad | bellard | setup_sects * 512)
|
393 | 80cabfad | bellard | goto fail;
|
394 | 80cabfad | bellard | |
395 | 80cabfad | bellard | /* load 32 bit code */
|
396 | 80cabfad | bellard | size = read(fd, addr, 16 * 1024 * 1024); |
397 | 80cabfad | bellard | if (size < 0) |
398 | 80cabfad | bellard | goto fail;
|
399 | 80cabfad | bellard | close(fd); |
400 | 80cabfad | bellard | return size;
|
401 | 80cabfad | bellard | fail:
|
402 | 80cabfad | bellard | close(fd); |
403 | 80cabfad | bellard | return -1; |
404 | 80cabfad | bellard | } |
405 | 80cabfad | bellard | |
406 | 59b8ad81 | bellard | static void main_cpu_reset(void *opaque) |
407 | 59b8ad81 | bellard | { |
408 | 59b8ad81 | bellard | CPUState *env = opaque; |
409 | 59b8ad81 | bellard | cpu_reset(env); |
410 | 59b8ad81 | bellard | } |
411 | 59b8ad81 | bellard | |
412 | 59b8ad81 | bellard | /*************************************************/
|
413 | 59b8ad81 | bellard | |
414 | 59b8ad81 | bellard | static void putb(uint8_t **pp, int val) |
415 | 59b8ad81 | bellard | { |
416 | 59b8ad81 | bellard | uint8_t *q; |
417 | 59b8ad81 | bellard | q = *pp; |
418 | 59b8ad81 | bellard | *q++ = val; |
419 | 59b8ad81 | bellard | *pp = q; |
420 | 59b8ad81 | bellard | } |
421 | 59b8ad81 | bellard | |
422 | 59b8ad81 | bellard | static void putstr(uint8_t **pp, const char *str) |
423 | 59b8ad81 | bellard | { |
424 | 59b8ad81 | bellard | uint8_t *q; |
425 | 59b8ad81 | bellard | q = *pp; |
426 | 59b8ad81 | bellard | while (*str)
|
427 | 59b8ad81 | bellard | *q++ = *str++; |
428 | 59b8ad81 | bellard | *pp = q; |
429 | 59b8ad81 | bellard | } |
430 | 59b8ad81 | bellard | |
431 | 59b8ad81 | bellard | static void putle16(uint8_t **pp, int val) |
432 | 59b8ad81 | bellard | { |
433 | 59b8ad81 | bellard | uint8_t *q; |
434 | 59b8ad81 | bellard | q = *pp; |
435 | 59b8ad81 | bellard | *q++ = val; |
436 | 59b8ad81 | bellard | *q++ = val >> 8;
|
437 | 59b8ad81 | bellard | *pp = q; |
438 | 59b8ad81 | bellard | } |
439 | 59b8ad81 | bellard | |
440 | 59b8ad81 | bellard | static void putle32(uint8_t **pp, int val) |
441 | 59b8ad81 | bellard | { |
442 | 59b8ad81 | bellard | uint8_t *q; |
443 | 59b8ad81 | bellard | q = *pp; |
444 | 59b8ad81 | bellard | *q++ = val; |
445 | 59b8ad81 | bellard | *q++ = val >> 8;
|
446 | 59b8ad81 | bellard | *q++ = val >> 16;
|
447 | 59b8ad81 | bellard | *q++ = val >> 24;
|
448 | 59b8ad81 | bellard | *pp = q; |
449 | 59b8ad81 | bellard | } |
450 | 59b8ad81 | bellard | |
451 | 59b8ad81 | bellard | static int mpf_checksum(const uint8_t *data, int len) |
452 | 59b8ad81 | bellard | { |
453 | 59b8ad81 | bellard | int sum, i;
|
454 | 59b8ad81 | bellard | sum = 0;
|
455 | 59b8ad81 | bellard | for(i = 0; i < len; i++) |
456 | 59b8ad81 | bellard | sum += data[i]; |
457 | 59b8ad81 | bellard | return sum & 0xff; |
458 | 59b8ad81 | bellard | } |
459 | 59b8ad81 | bellard | |
460 | 59b8ad81 | bellard | /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
|
461 | 59b8ad81 | bellard | static void bios_add_mptable(uint8_t *bios_data) |
462 | 59b8ad81 | bellard | { |
463 | 59b8ad81 | bellard | uint8_t *mp_config_table, *q, *float_pointer_struct; |
464 | 59b8ad81 | bellard | int ioapic_id, offset, i, len;
|
465 | 59b8ad81 | bellard | |
466 | 59b8ad81 | bellard | if (smp_cpus <= 1) |
467 | 59b8ad81 | bellard | return;
|
468 | 59b8ad81 | bellard | |
469 | 87022ff5 | bellard | mp_config_table = bios_data + 0xb000;
|
470 | 59b8ad81 | bellard | q = mp_config_table; |
471 | 59b8ad81 | bellard | putstr(&q, "PCMP"); /* "PCMP signature */ |
472 | 59b8ad81 | bellard | putle16(&q, 0); /* table length (patched later) */ |
473 | 59b8ad81 | bellard | putb(&q, 4); /* spec rev */ |
474 | 59b8ad81 | bellard | putb(&q, 0); /* checksum (patched later) */ |
475 | 59b8ad81 | bellard | putstr(&q, "QEMUCPU "); /* OEM id */ |
476 | 59b8ad81 | bellard | putstr(&q, "0.1 "); /* vendor id */ |
477 | 59b8ad81 | bellard | putle32(&q, 0); /* OEM table ptr */ |
478 | 59b8ad81 | bellard | putle16(&q, 0); /* OEM table size */ |
479 | 59b8ad81 | bellard | putle16(&q, 20); /* entry count */ |
480 | 59b8ad81 | bellard | putle32(&q, 0xfee00000); /* local APIC addr */ |
481 | 59b8ad81 | bellard | putle16(&q, 0); /* ext table length */ |
482 | 59b8ad81 | bellard | putb(&q, 0); /* ext table checksum */ |
483 | 59b8ad81 | bellard | putb(&q, 0); /* reserved */ |
484 | 59b8ad81 | bellard | |
485 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
486 | 59b8ad81 | bellard | putb(&q, 0); /* entry type = processor */ |
487 | 59b8ad81 | bellard | putb(&q, i); /* APIC id */
|
488 | 59b8ad81 | bellard | putb(&q, 0x11); /* local APIC version number */ |
489 | 59b8ad81 | bellard | if (i == 0) |
490 | 59b8ad81 | bellard | putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */ |
491 | 59b8ad81 | bellard | else
|
492 | 59b8ad81 | bellard | putb(&q, 1); /* cpu flags: enabled */ |
493 | 59b8ad81 | bellard | putb(&q, 0); /* cpu signature */ |
494 | 59b8ad81 | bellard | putb(&q, 6);
|
495 | 59b8ad81 | bellard | putb(&q, 0);
|
496 | 59b8ad81 | bellard | putb(&q, 0);
|
497 | 59b8ad81 | bellard | putle16(&q, 0x201); /* feature flags */ |
498 | 59b8ad81 | bellard | putle16(&q, 0);
|
499 | 59b8ad81 | bellard | |
500 | 59b8ad81 | bellard | putle16(&q, 0); /* reserved */ |
501 | 59b8ad81 | bellard | putle16(&q, 0);
|
502 | 59b8ad81 | bellard | putle16(&q, 0);
|
503 | 59b8ad81 | bellard | putle16(&q, 0);
|
504 | 59b8ad81 | bellard | } |
505 | 59b8ad81 | bellard | |
506 | 59b8ad81 | bellard | /* isa bus */
|
507 | 59b8ad81 | bellard | putb(&q, 1); /* entry type = bus */ |
508 | 59b8ad81 | bellard | putb(&q, 0); /* bus ID */ |
509 | 59b8ad81 | bellard | putstr(&q, "ISA ");
|
510 | 59b8ad81 | bellard | |
511 | 59b8ad81 | bellard | /* ioapic */
|
512 | 59b8ad81 | bellard | ioapic_id = smp_cpus; |
513 | 59b8ad81 | bellard | putb(&q, 2); /* entry type = I/O APIC */ |
514 | 59b8ad81 | bellard | putb(&q, ioapic_id); /* apic ID */
|
515 | 59b8ad81 | bellard | putb(&q, 0x11); /* I/O APIC version number */ |
516 | 59b8ad81 | bellard | putb(&q, 1); /* enable */ |
517 | 59b8ad81 | bellard | putle32(&q, 0xfec00000); /* I/O APIC addr */ |
518 | 59b8ad81 | bellard | |
519 | 59b8ad81 | bellard | /* irqs */
|
520 | 59b8ad81 | bellard | for(i = 0; i < 16; i++) { |
521 | 59b8ad81 | bellard | putb(&q, 3); /* entry type = I/O interrupt */ |
522 | 59b8ad81 | bellard | putb(&q, 0); /* interrupt type = vectored interrupt */ |
523 | 59b8ad81 | bellard | putb(&q, 0); /* flags: po=0, el=0 */ |
524 | 59b8ad81 | bellard | putb(&q, 0);
|
525 | 59b8ad81 | bellard | putb(&q, 0); /* source bus ID = ISA */ |
526 | 59b8ad81 | bellard | putb(&q, i); /* source bus IRQ */
|
527 | 59b8ad81 | bellard | putb(&q, ioapic_id); /* dest I/O APIC ID */
|
528 | 59b8ad81 | bellard | putb(&q, i); /* dest I/O APIC interrupt in */
|
529 | 59b8ad81 | bellard | } |
530 | 59b8ad81 | bellard | /* patch length */
|
531 | 59b8ad81 | bellard | len = q - mp_config_table; |
532 | 59b8ad81 | bellard | mp_config_table[4] = len;
|
533 | 59b8ad81 | bellard | mp_config_table[5] = len >> 8; |
534 | 59b8ad81 | bellard | |
535 | 59b8ad81 | bellard | mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
|
536 | 59b8ad81 | bellard | |
537 | 59b8ad81 | bellard | /* align to 16 */
|
538 | 59b8ad81 | bellard | offset = q - bios_data; |
539 | 59b8ad81 | bellard | offset = (offset + 15) & ~15; |
540 | 59b8ad81 | bellard | float_pointer_struct = bios_data + offset; |
541 | 59b8ad81 | bellard | |
542 | 59b8ad81 | bellard | /* floating pointer structure */
|
543 | 59b8ad81 | bellard | q = float_pointer_struct; |
544 | 59b8ad81 | bellard | putstr(&q, "_MP_");
|
545 | 59b8ad81 | bellard | /* pointer to MP config table */
|
546 | 59b8ad81 | bellard | putle32(&q, mp_config_table - bios_data + 0x000f0000);
|
547 | 59b8ad81 | bellard | |
548 | 59b8ad81 | bellard | putb(&q, 1); /* length in 16 byte units */ |
549 | 59b8ad81 | bellard | putb(&q, 4); /* MP spec revision */ |
550 | 59b8ad81 | bellard | putb(&q, 0); /* checksum (patched later) */ |
551 | 59b8ad81 | bellard | putb(&q, 0); /* MP feature byte 1 */ |
552 | 59b8ad81 | bellard | |
553 | 59b8ad81 | bellard | putb(&q, 0);
|
554 | 59b8ad81 | bellard | putb(&q, 0);
|
555 | 59b8ad81 | bellard | putb(&q, 0);
|
556 | 59b8ad81 | bellard | putb(&q, 0);
|
557 | 59b8ad81 | bellard | float_pointer_struct[10] =
|
558 | 59b8ad81 | bellard | -mpf_checksum(float_pointer_struct, q - float_pointer_struct); |
559 | 59b8ad81 | bellard | } |
560 | 59b8ad81 | bellard | |
561 | 59b8ad81 | bellard | |
562 | b41a2cd1 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
563 | b41a2cd1 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
564 | b41a2cd1 | bellard | static const int ide_irq[2] = { 14, 15 }; |
565 | b41a2cd1 | bellard | |
566 | b41a2cd1 | bellard | #define NE2000_NB_MAX 6 |
567 | b41a2cd1 | bellard | |
568 | 8d11df9e | bellard | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
569 | b41a2cd1 | bellard | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
570 | b41a2cd1 | bellard | |
571 | 8d11df9e | bellard | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
572 | 8d11df9e | bellard | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
573 | 8d11df9e | bellard | |
574 | 6508fe59 | bellard | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
575 | 6508fe59 | bellard | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
576 | 6508fe59 | bellard | |
577 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
578 | 6a36d84e | bellard | static void audio_init (PCIBus *pci_bus) |
579 | 6a36d84e | bellard | { |
580 | 6a36d84e | bellard | struct soundhw *c;
|
581 | 6a36d84e | bellard | int audio_enabled = 0; |
582 | 6a36d84e | bellard | |
583 | 6a36d84e | bellard | for (c = soundhw; !audio_enabled && c->name; ++c) {
|
584 | 6a36d84e | bellard | audio_enabled = c->enabled; |
585 | 6a36d84e | bellard | } |
586 | 6a36d84e | bellard | |
587 | 6a36d84e | bellard | if (audio_enabled) {
|
588 | 6a36d84e | bellard | AudioState *s; |
589 | 6a36d84e | bellard | |
590 | 6a36d84e | bellard | s = AUD_init (); |
591 | 6a36d84e | bellard | if (s) {
|
592 | 6a36d84e | bellard | for (c = soundhw; c->name; ++c) {
|
593 | 6a36d84e | bellard | if (c->enabled) {
|
594 | 6a36d84e | bellard | if (c->isa) {
|
595 | 6a36d84e | bellard | c->init.init_isa (s); |
596 | 6a36d84e | bellard | } |
597 | 6a36d84e | bellard | else {
|
598 | 6a36d84e | bellard | if (pci_bus) {
|
599 | 6a36d84e | bellard | c->init.init_pci (pci_bus, s); |
600 | 6a36d84e | bellard | } |
601 | 6a36d84e | bellard | } |
602 | 6a36d84e | bellard | } |
603 | 6a36d84e | bellard | } |
604 | 6a36d84e | bellard | } |
605 | 6a36d84e | bellard | } |
606 | 6a36d84e | bellard | } |
607 | 6a36d84e | bellard | #endif
|
608 | 6a36d84e | bellard | |
609 | a41b2ff2 | pbrook | static void pc_init_ne2k_isa(NICInfo *nd) |
610 | a41b2ff2 | pbrook | { |
611 | a41b2ff2 | pbrook | static int nb_ne2k = 0; |
612 | a41b2ff2 | pbrook | |
613 | a41b2ff2 | pbrook | if (nb_ne2k == NE2000_NB_MAX)
|
614 | a41b2ff2 | pbrook | return;
|
615 | a41b2ff2 | pbrook | isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd); |
616 | a41b2ff2 | pbrook | nb_ne2k++; |
617 | a41b2ff2 | pbrook | } |
618 | a41b2ff2 | pbrook | |
619 | 80cabfad | bellard | /* PC hardware initialisation */
|
620 | b5ff2d6e | bellard | static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
621 | b5ff2d6e | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
622 | b5ff2d6e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
623 | 3dbbdc25 | bellard | const char *initrd_filename, |
624 | 3dbbdc25 | bellard | int pci_enabled)
|
625 | 80cabfad | bellard | { |
626 | 80cabfad | bellard | char buf[1024]; |
627 | a41b2ff2 | pbrook | int ret, linux_boot, initrd_size, i;
|
628 | 7587cf44 | bellard | unsigned long bios_offset, vga_bios_offset; |
629 | 7587cf44 | bellard | int bios_size, isa_bios_size;
|
630 | 46e50e9d | bellard | PCIBus *pci_bus; |
631 | 59b8ad81 | bellard | CPUState *env; |
632 | a41b2ff2 | pbrook | NICInfo *nd; |
633 | d592d303 | bellard | |
634 | 80cabfad | bellard | linux_boot = (kernel_filename != NULL);
|
635 | 80cabfad | bellard | |
636 | 59b8ad81 | bellard | /* init CPUs */
|
637 | 59b8ad81 | bellard | for(i = 0; i < smp_cpus; i++) { |
638 | 59b8ad81 | bellard | env = cpu_init(); |
639 | 59b8ad81 | bellard | if (i != 0) |
640 | ad49ff9d | bellard | env->hflags |= HF_HALTED_MASK; |
641 | 59b8ad81 | bellard | if (smp_cpus > 1) { |
642 | 59b8ad81 | bellard | /* XXX: enable it in all cases */
|
643 | 59b8ad81 | bellard | env->cpuid_features |= CPUID_APIC; |
644 | 59b8ad81 | bellard | } |
645 | e5d13e2f | bellard | register_savevm("cpu", i, 3, cpu_save, cpu_load, env); |
646 | 59b8ad81 | bellard | qemu_register_reset(main_cpu_reset, env); |
647 | 59b8ad81 | bellard | if (pci_enabled) {
|
648 | 59b8ad81 | bellard | apic_init(env); |
649 | 59b8ad81 | bellard | } |
650 | 59b8ad81 | bellard | } |
651 | 59b8ad81 | bellard | |
652 | 80cabfad | bellard | /* allocate RAM */
|
653 | 80cabfad | bellard | cpu_register_physical_memory(0, ram_size, 0); |
654 | 80cabfad | bellard | |
655 | 80cabfad | bellard | /* BIOS load */
|
656 | 7587cf44 | bellard | bios_offset = ram_size + vga_ram_size; |
657 | 7587cf44 | bellard | vga_bios_offset = bios_offset + 256 * 1024; |
658 | 7587cf44 | bellard | |
659 | 80cabfad | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
660 | 7587cf44 | bellard | bios_size = get_image_size(buf); |
661 | 7587cf44 | bellard | if (bios_size <= 0 || |
662 | 7587cf44 | bellard | (bios_size % 65536) != 0 || |
663 | 7587cf44 | bellard | bios_size > (256 * 1024)) { |
664 | 7587cf44 | bellard | goto bios_error;
|
665 | 7587cf44 | bellard | } |
666 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + bios_offset); |
667 | 7587cf44 | bellard | if (ret != bios_size) {
|
668 | 7587cf44 | bellard | bios_error:
|
669 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
|
670 | 80cabfad | bellard | exit(1);
|
671 | 80cabfad | bellard | } |
672 | 59b8ad81 | bellard | if (bios_size == 65536) { |
673 | 59b8ad81 | bellard | bios_add_mptable(phys_ram_base + bios_offset); |
674 | 59b8ad81 | bellard | } |
675 | 7587cf44 | bellard | |
676 | 80cabfad | bellard | /* VGA BIOS load */
|
677 | de9258a8 | bellard | if (cirrus_vga_enabled) {
|
678 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
679 | de9258a8 | bellard | } else {
|
680 | de9258a8 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
681 | de9258a8 | bellard | } |
682 | 7587cf44 | bellard | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
683 | 80cabfad | bellard | |
684 | 80cabfad | bellard | /* setup basic memory access */
|
685 | 7587cf44 | bellard | cpu_register_physical_memory(0xc0000, 0x10000, |
686 | 7587cf44 | bellard | vga_bios_offset | IO_MEM_ROM); |
687 | 7587cf44 | bellard | |
688 | 7587cf44 | bellard | /* map the last 128KB of the BIOS in ISA space */
|
689 | 7587cf44 | bellard | isa_bios_size = bios_size; |
690 | 7587cf44 | bellard | if (isa_bios_size > (128 * 1024)) |
691 | 7587cf44 | bellard | isa_bios_size = 128 * 1024; |
692 | 7587cf44 | bellard | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
693 | 7587cf44 | bellard | IO_MEM_UNASSIGNED); |
694 | 7587cf44 | bellard | cpu_register_physical_memory(0x100000 - isa_bios_size,
|
695 | 7587cf44 | bellard | isa_bios_size, |
696 | 7587cf44 | bellard | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
697 | 7587cf44 | bellard | /* map all the bios at the top of memory */
|
698 | 7587cf44 | bellard | cpu_register_physical_memory((uint32_t)(-bios_size), |
699 | 7587cf44 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
700 | 80cabfad | bellard | |
701 | 80cabfad | bellard | bochs_bios_init(); |
702 | 80cabfad | bellard | |
703 | 80cabfad | bellard | if (linux_boot) {
|
704 | 80cabfad | bellard | uint8_t bootsect[512];
|
705 | 41b9be47 | bellard | uint8_t old_bootsect[512];
|
706 | 80cabfad | bellard | |
707 | 80cabfad | bellard | if (bs_table[0] == NULL) { |
708 | 80cabfad | bellard | fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
709 | 80cabfad | bellard | exit(1);
|
710 | 80cabfad | bellard | } |
711 | 80cabfad | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
712 | 80cabfad | bellard | ret = load_image(buf, bootsect); |
713 | 80cabfad | bellard | if (ret != sizeof(bootsect)) { |
714 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
715 | 80cabfad | bellard | buf); |
716 | 80cabfad | bellard | exit(1);
|
717 | 80cabfad | bellard | } |
718 | 80cabfad | bellard | |
719 | 41b9be47 | bellard | if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { |
720 | 41b9be47 | bellard | /* copy the MSDOS partition table */
|
721 | 41b9be47 | bellard | memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); |
722 | 41b9be47 | bellard | } |
723 | 41b9be47 | bellard | |
724 | 80cabfad | bellard | bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
725 | 80cabfad | bellard | |
726 | 80cabfad | bellard | /* now we can load the kernel */
|
727 | 80cabfad | bellard | ret = load_kernel(kernel_filename, |
728 | 80cabfad | bellard | phys_ram_base + KERNEL_LOAD_ADDR, |
729 | 80cabfad | bellard | phys_ram_base + KERNEL_PARAMS_ADDR); |
730 | 80cabfad | bellard | if (ret < 0) { |
731 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
732 | 80cabfad | bellard | kernel_filename); |
733 | 80cabfad | bellard | exit(1);
|
734 | 80cabfad | bellard | } |
735 | 80cabfad | bellard | |
736 | 80cabfad | bellard | /* load initrd */
|
737 | 80cabfad | bellard | initrd_size = 0;
|
738 | 80cabfad | bellard | if (initrd_filename) {
|
739 | 80cabfad | bellard | initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR); |
740 | 80cabfad | bellard | if (initrd_size < 0) { |
741 | 80cabfad | bellard | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
742 | 80cabfad | bellard | initrd_filename); |
743 | 80cabfad | bellard | exit(1);
|
744 | 80cabfad | bellard | } |
745 | 80cabfad | bellard | } |
746 | 80cabfad | bellard | if (initrd_size > 0) { |
747 | 80cabfad | bellard | stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
|
748 | 80cabfad | bellard | stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
749 | 80cabfad | bellard | } |
750 | 80cabfad | bellard | pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
751 | 80cabfad | bellard | kernel_cmdline); |
752 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
753 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
754 | 80cabfad | bellard | KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
755 | 80cabfad | bellard | /* loader type */
|
756 | 80cabfad | bellard | stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
757 | 80cabfad | bellard | } |
758 | 80cabfad | bellard | |
759 | 69b91039 | bellard | if (pci_enabled) {
|
760 | 46e50e9d | bellard | pci_bus = i440fx_init(); |
761 | 46e50e9d | bellard | piix3_init(pci_bus); |
762 | 46e50e9d | bellard | } else {
|
763 | 46e50e9d | bellard | pci_bus = NULL;
|
764 | 69b91039 | bellard | } |
765 | 69b91039 | bellard | |
766 | 80cabfad | bellard | /* init basic PC hardware */
|
767 | b41a2cd1 | bellard | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
768 | 80cabfad | bellard | |
769 | f929aad6 | bellard | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
770 | f929aad6 | bellard | |
771 | 1f04275e | bellard | if (cirrus_vga_enabled) {
|
772 | 1f04275e | bellard | if (pci_enabled) {
|
773 | 46e50e9d | bellard | pci_cirrus_vga_init(pci_bus, |
774 | 46e50e9d | bellard | ds, phys_ram_base + ram_size, ram_size, |
775 | 1f04275e | bellard | vga_ram_size); |
776 | 1f04275e | bellard | } else {
|
777 | 1f04275e | bellard | isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, |
778 | 1f04275e | bellard | vga_ram_size); |
779 | 1f04275e | bellard | } |
780 | 1f04275e | bellard | } else {
|
781 | 46e50e9d | bellard | vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, |
782 | d5295253 | bellard | vga_ram_size, 0, 0); |
783 | 1f04275e | bellard | } |
784 | 80cabfad | bellard | |
785 | b0a21b53 | bellard | rtc_state = rtc_init(0x70, 8); |
786 | b41a2cd1 | bellard | register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL); |
787 | b41a2cd1 | bellard | register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL); |
788 | 80cabfad | bellard | |
789 | e1a23744 | bellard | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
790 | e1a23744 | bellard | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
791 | e1a23744 | bellard | |
792 | d592d303 | bellard | if (pci_enabled) {
|
793 | d592d303 | bellard | ioapic = ioapic_init(); |
794 | d592d303 | bellard | } |
795 | 59b8ad81 | bellard | isa_pic = pic_init(pic_irq_request, first_cpu); |
796 | ec844b96 | bellard | pit = pit_init(0x40, 0); |
797 | d592d303 | bellard | if (pci_enabled) {
|
798 | d592d303 | bellard | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
799 | d592d303 | bellard | } |
800 | b41a2cd1 | bellard | |
801 | 8d11df9e | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
802 | 8d11df9e | bellard | if (serial_hds[i]) {
|
803 | e5d13e2f | bellard | serial_init(&pic_set_irq_new, isa_pic, |
804 | e5d13e2f | bellard | serial_io[i], serial_irq[i], serial_hds[i]); |
805 | 8d11df9e | bellard | } |
806 | 8d11df9e | bellard | } |
807 | b41a2cd1 | bellard | |
808 | 6508fe59 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
809 | 6508fe59 | bellard | if (parallel_hds[i]) {
|
810 | 6508fe59 | bellard | parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); |
811 | 6508fe59 | bellard | } |
812 | 6508fe59 | bellard | } |
813 | 6508fe59 | bellard | |
814 | a41b2ff2 | pbrook | for(i = 0; i < nb_nics; i++) { |
815 | a41b2ff2 | pbrook | nd = &nd_table[i]; |
816 | a41b2ff2 | pbrook | if (!nd->model) {
|
817 | a41b2ff2 | pbrook | if (pci_enabled) {
|
818 | a41b2ff2 | pbrook | nd->model = "ne2k_pci";
|
819 | a41b2ff2 | pbrook | } else {
|
820 | a41b2ff2 | pbrook | nd->model = "ne2k_isa";
|
821 | a41b2ff2 | pbrook | } |
822 | 69b91039 | bellard | } |
823 | a41b2ff2 | pbrook | if (strcmp(nd->model, "ne2k_isa") == 0) { |
824 | a41b2ff2 | pbrook | pc_init_ne2k_isa(nd); |
825 | a41b2ff2 | pbrook | } else if (pci_enabled) { |
826 | a41b2ff2 | pbrook | pci_nic_init(pci_bus, nd); |
827 | a41b2ff2 | pbrook | } else {
|
828 | a41b2ff2 | pbrook | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
829 | a41b2ff2 | pbrook | exit(1);
|
830 | 69b91039 | bellard | } |
831 | a41b2ff2 | pbrook | } |
832 | b41a2cd1 | bellard | |
833 | a41b2ff2 | pbrook | if (pci_enabled) {
|
834 | a41b2ff2 | pbrook | pci_piix3_ide_init(pci_bus, bs_table); |
835 | a41b2ff2 | pbrook | } else {
|
836 | 69b91039 | bellard | for(i = 0; i < 2; i++) { |
837 | 69b91039 | bellard | isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
838 | 69b91039 | bellard | bs_table[2 * i], bs_table[2 * i + 1]); |
839 | 69b91039 | bellard | } |
840 | b41a2cd1 | bellard | } |
841 | 69b91039 | bellard | |
842 | 80cabfad | bellard | kbd_init(); |
843 | 7c29d0c0 | bellard | DMA_init(0);
|
844 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
845 | 6a36d84e | bellard | audio_init(pci_enabled ? pci_bus : NULL);
|
846 | fb065187 | bellard | #endif
|
847 | 80cabfad | bellard | |
848 | baca51fa | bellard | floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
849 | b41a2cd1 | bellard | |
850 | ba6c2377 | bellard | cmos_init(ram_size, boot_device, bs_table); |
851 | 69b91039 | bellard | |
852 | bb36d470 | bellard | if (pci_enabled && usb_enabled) {
|
853 | bb36d470 | bellard | usb_uhci_init(pci_bus, usb_root_ports); |
854 | a594cfbf | bellard | usb_attach(usb_root_ports[0], vm_usb_hub);
|
855 | bb36d470 | bellard | } |
856 | bb36d470 | bellard | |
857 | 69b91039 | bellard | /* must be done after all PCI devices are instanciated */
|
858 | 69b91039 | bellard | /* XXX: should be done in the Bochs BIOS */
|
859 | 69b91039 | bellard | if (pci_enabled) {
|
860 | 69b91039 | bellard | pci_bios_init(); |
861 | 69b91039 | bellard | } |
862 | 80cabfad | bellard | } |
863 | b5ff2d6e | bellard | |
864 | 3dbbdc25 | bellard | static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
865 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
866 | 3dbbdc25 | bellard | int snapshot,
|
867 | 3dbbdc25 | bellard | const char *kernel_filename, |
868 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
869 | 3dbbdc25 | bellard | const char *initrd_filename) |
870 | 3dbbdc25 | bellard | { |
871 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
872 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
873 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
874 | 3dbbdc25 | bellard | initrd_filename, 1);
|
875 | 3dbbdc25 | bellard | } |
876 | 3dbbdc25 | bellard | |
877 | 3dbbdc25 | bellard | static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, |
878 | 3dbbdc25 | bellard | DisplayState *ds, const char **fd_filename, |
879 | 3dbbdc25 | bellard | int snapshot,
|
880 | 3dbbdc25 | bellard | const char *kernel_filename, |
881 | 3dbbdc25 | bellard | const char *kernel_cmdline, |
882 | 3dbbdc25 | bellard | const char *initrd_filename) |
883 | 3dbbdc25 | bellard | { |
884 | 3dbbdc25 | bellard | pc_init1(ram_size, vga_ram_size, boot_device, |
885 | 3dbbdc25 | bellard | ds, fd_filename, snapshot, |
886 | 3dbbdc25 | bellard | kernel_filename, kernel_cmdline, |
887 | 3dbbdc25 | bellard | initrd_filename, 0);
|
888 | 3dbbdc25 | bellard | } |
889 | 3dbbdc25 | bellard | |
890 | b5ff2d6e | bellard | QEMUMachine pc_machine = { |
891 | b5ff2d6e | bellard | "pc",
|
892 | b5ff2d6e | bellard | "Standard PC",
|
893 | 3dbbdc25 | bellard | pc_init_pci, |
894 | 3dbbdc25 | bellard | }; |
895 | 3dbbdc25 | bellard | |
896 | 3dbbdc25 | bellard | QEMUMachine isapc_machine = { |
897 | 3dbbdc25 | bellard | "isapc",
|
898 | 3dbbdc25 | bellard | "ISA-only PC",
|
899 | 3dbbdc25 | bellard | pc_init_isa, |
900 | b5ff2d6e | bellard | }; |