target-i386: Fix exceptions for fxsave/fxrstor
This patch corrects the following aspects of exception generation infxsave/fxrstor:
target-i386: add RDTSCP support
RDTSCP reads the time stamp counter and atomically also the contentof a 32-bit MSR, which can be freely set by the OS. This allows CPUlocal data to be queried by userspace.Linux uses this to allow a fast implementation of the getcpu()...
target-i386: add SSE4a instruction support
This adds support for the AMD Phenom/Barcelona's SSE4a instructions.Those include insertq and extrq, which are doing shift and mask onXMM registers, in two versions (immediate shift/length values andstored in another XMM register)....
target-i386: add lock mov cr0 = cr8
AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.This behavior is guarded by the CR8_LEGACY CPUID bit(Fn8000_0001:ECX1).
Signed-off-by: Andre Przywara <andre.przywara@amd.com>...
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
x86: use globals for CPU registers
Use globals for the 8 or 16 CPU registers on i386 and x86_64.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: kill a tmp register
target-i386: use subfi instead of sub with a non-freed constant
gcc wants 1st static and then const
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
ioports: remove unused env parameter and compile only once
The CPU state parameter is not used, remove it and adjust callers. Now wecan compile ioport.c once for all targets.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
i386: Drop redundant kvm_enabled test
cpu_synchronize_state already does this.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Work around OpenSolaris sys/regset.h namespace pollution
Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there aresome additions and it's not entirely compatible. Because of that, there havebeen conflicts with system headers on BSD systems. Some hacks have beenintroduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...
kvm_arch_get_registers() shouldn't be called directly
Direct call to kvm_arch_get_registers() bypass logic incpu_synchronize_state()
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Fix Sparse warnings: add "static"
kvm: Simplify cpu_synchronize_state()
cpu_synchronize_state() is a little unreadable since the 'modified'argument isn't self-explanatory. Simplify it by making it alwayssynchronize the kernel state into qemu, and automatically flush theregisters back to the kernel if they've been synchronized on this...
push CPUID level to 4 to allow Intel multicore decoding
Intel CPUs store the number of cores in CPUID leaf 4. So pushthe maxleaf value to 4 to allow the guests access to this leaf.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
set CPUID bits to present cores and threads topology
Controlled by the enhanced -smp option set the CPUID bits to present theguest the desired topology. This is vendor specific, but (with the exceptionof the CMP_LEGACY bit) not conflicting, so we set all bits everytime....
allow overriding of CPUID level on command line
The CPUID level determines how many CPUID leafs are exposed to the guest.Some features (like multi-core) cannot be propagated without the properlevel, but guests maybe confused by bogus entries in some leafs....
introduce kvm64 CPU
In addition to the TCG based qemu64 type let's introduce a kvm64 CPU type,which is the least common denominator of all KVM-capable x86-CPUs(based on Intel Pentium 4 Prescott). It can be used as a base typefor migration.
cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal
handle_cpu_signal is very nearly copy-paste code for each target, with afew minor variations. This patch sets up appropriate defaults for ageneric handle_cpu_signal and provides overrides for particular targets...
Unbreak large mem support by removing kqemu
kqemu introduces a number of restrictions on the i386 target. The worst is thatit prevents large memory from working in the default build.
Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on...
rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIAN
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Only allow -cpu host when KVM is enabled
-cpu host is not at all useful when using tcg.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Initialize cpuid variables
This causes a build break when !KVM.
omit 3DNOW! CPUID bits from qemu64 CPU model
Since we recently do not disable 3DNOW! support anymore, we shouldavoid setting the bits in the default qemu64 CPU model to easemigration. TCG does not support it anyway and even AMD deprecatesit's usage nowadays....
Update to a hopefully more future proof FSF address
gdbstub: x86: Support for setting segment registers
This allows to set segment registers via gdb also in system emulationmode. Basic sanity checks are applied and nothing is changed if theyfail. But screwing up the target via this interface will never be...
kvm: Work around borken MSR_GET_INDEX_LIST
Allocate enough memory for KVM_GET_MSR_INDEX_LIST as older kernels shotfar beyond their limits, corrupting user space memory.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make sure to mark MCE defines as ULL
Fixes build on 32-bit
QEMU: MCE: Add MCE simulation to qemu/tcg
- MCE features are initialized when VCPU is intialized according to CPUID.- A monitor command "mce" is added to inject a MCE.- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.
aliguori: fix build for linux-user...
Use ctz64 in favor of ffsll
Not all host platforms support ffsll.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Suppress a GCC warning
KVM: x86: Refactor persistent CPU state
This patch aligns the KVM-related layout and encoding of the CPU stateto be saved to disk or migrated with qemu-kvm. The major differences arereordering of fields and a compressed interrupt_bitmap into a singlenumber as there can be no more than one pending IRQ at a time....
preserve the hypervisor bit while KVM trims the CPUID bits
The KVM kernel will disable all bits in CPUID which are not present inthe host. As this is mostly true for the hypervisor bit (1.ecx),preserve its value before the trim and restore it afterwards....
allow hypervisor CPUID bit to be overriden
KVM defaults to the hypervisor CPUID bit to be set, whereas pureQEMU clears it. On some occasions one wants to set or clear it theother way round (for instance to get HyperV running inside a guest).
Move the bit-set to be done before the command line parsing and...
introduce -cpu host target
Although the guest's CPUID bits can be controlled in a fine grained wayin QEMU, a simple way to inject the host CPU is missing. This is handyfor KVM desktop virtualization, where one wants the guest to support thefull host feature set....
CPUID Fn8000_0001.EAX is family/model/stepping, not features
fix KVMs GET_SUPPORTED_CPUID feature usage
If we want to trim the user provided CPUID bits for KVM to be not greaterthan that of the host, we should not remove the bits after we sentthem to the kernel.This fixes the masking of features that are not present on the host by...
remove CPUID host hacks
KVM provides an in-kernel feature to disable CPUID bits that are notpresent in the current host. So there is no need here to duplicate thiswork. Additionally allows 3DNow! on capable processors, since therestriction seems to apply to QEMU/TCG only....
Handle init/sipi in a main cpu exec loop. (v2)
This should fix compilation problem in case of CONFIG_USER_ONLY.
Currently INIT/SIPI is handled in the context of CPU that sends IPI.This patch changes this to handle them like all other events in a maincpu exec loop. When KVM will gain thread per vcpu capability it will...
allow CPUID vendor override
KVM-enabled QEMU will always report the vendor ID of the physical CPU it isrunning on. Allow to override this if explicitly requested on thecommand line. It will not suffice to name a CPU type (like -cpu phenom),but you have to explicitly set the vendor: -cpu phenom,vendor=AuthenticAMD...
QEMU KVM: i386: Fix the cpu reset state
As per the IA32 processor manual, the accessed bit is set to 1 in theprocessor state after reset. qemu pc cpu_reset code was missing thisaccessed bit setting.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>...
x86: Add support for resume flag
kvm: x86: Save/restore KVM-specific CPU states
Save and restore all so far neglected KVM-specific CPU states. Handlingthe TSC stabilizes migration in KVM mode. The interrupt_bitmap andmp_state are currently unused, but will become relevant for in-kernel...
kvm: Add missing bits to support live migration
This patch adds the missing hooks to allow live migration in KVM mode.It adds proper synchronization before/after saving/restoring the VCPUstates (note: PPC is untested), hooks intocpu_physical_memory_set_dirty_tracking() to enable dirty memory logging...
Convert machine registration to use module init functions
This cleans up quite a lot of #ifdefs, extern variables, and other ugliness.
kvm: work around supported cpuid ioctl() brokenness
KVM_GET_SUPPORTED_CPUID has been known to fail to return -E2BIGwhen it runs out of entries. Detect this by always trying againwith a bigger table if the ioctl() fills the table.
Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Include assert.h from qemu-common.h
Include assert.h from qemu-common.h and remove other direct uses.cpu-all.h still need to include it because of the dyngen-exec.h hacks
Signed-off-by: Paul Brook <paul@codesourcery.com>
Replace gcc variadic macro extension with C99 version
Remove noisy printf when KVM masks CPU features
kvm: Add support for querying supported cpu features
kvm does not support all cpu features; add support for dunamically queryingthe supported feature set.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Make x86 cpuid feature names available in file scope
To be used later.
Fix x86 feature modifications for features that set multiple bits
QEMU allows adding or removing cpu features by using the syntax '-cpu +feature'or '-cpu -feature'. Some cpuid features cause more than one bit to be set orcleared; but QEMU stops after just one bit has been modified, causing the...
kvm: Trim cpu features not supported by kvm
Remove cpu features that are not supported by kvm from the cpuid featuresreported to the guest.
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
qemu: per-arch cpu_has_work (Marcelo Tosatti)
Blue Swirl: fix Sparc32 breakage
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
Fix i386-linux-user build (Laurent Desnogues)
This broke due to r7230.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7233 c046a42c-6fe2-441c-8c8c-71466251a162
put valid data into exit_int_info if needed (Gleb Natapov)
If fault happened during event delivery exit_int_info should containvalid info about the event on vm exit.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
xen: groundwork for xen support (Gerd Hoffmann)
- configure script and build system changes.- wind up new machine type.- add xen* command line options.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
kqemu: merge CONFIG_KQEMU and USE_KQEMU
Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g".
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7189 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Enhanced dump of segment registers (Jan Kiszka)
Parse the descriptor flags that segment registers refer to and show theresult in a more human-friendly format. The output of info registers eg.then looks like this:
[...]ES =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA]...
kvm: Fix cpuid initialization (Jan Kiszka)
Fix (more or less) spurious guest boot failures due to corrupted cpuidstates. The reason was insufficient initialization of cpuid entriesbefore passing them to the kernel.
At this chance also fix improper entry pointer progression and simplify...
Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and addsthis feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode....
Immediate versions of ro[lr]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6968 c046a42c-6fe2-441c-8c8c-71466251a162
kvm: Drop kvm_patch_opcode_byte (Jan Kiszka)
As cpu_memory_rw_debug is now capable of modifying ROM, we can drop ourown patch function.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6906 c046a42c-6fe2-441c-8c8c-71466251a162
x86: Add NULL check to lsl (Jan Kiszka)
According to the Intel specs, lsl performs a check against NULL for theprovided selector, just like lar does. helper_lar() includes thecorresponding code, helper_lsl() was lacking it so far.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
target-i386: use the new bswap* TCG ops
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6836 c046a42c-6fe2-441c-8c8c-71466251a162
tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
Guest debugging support for KVM (Jan Kiszka)
This is a backport of the guest debugging support for the KVMaccelerator that is now part of the KVM tree. It implements the reworkedKVM kernel API for guest debugging (KVM_CAP_SET_GUEST_DEBUG) which isnot yet part of any mainline kernel but will probably be 2.6.30 stuff....
The _exit syscall is used for both thread termination in NPTL applications,and process termination in legacy applications. Try to guess which we wantbased on the presence of multiple threads.
Also implement locking when modifying the CPU list.
Signed-off-by: Paul Brook <paul@codesourcery.com>...
Fix cpuid KVM crash on i386 (Lubomir Rintel)
Cpuid should return into vec, not overwrite past address in count.Changeset 6565 broke this.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6689 c046a42c-6fe2-441c-8c8c-71466251a162
Fix "info registers" under kvm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6684 c046a42c-6fe2-441c-8c8c-71466251a162
x86: use qemu_log_mask on triple faults (Chris Wright)
replace open coded qemu_log_mask with proper macro
Signed-off-by: Chris Wright <chrisw@sous-sol.org>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6649 c046a42c-6fe2-441c-8c8c-71466251a162
KVM: cpuid function 2: store all values (Amit Shah)
Incrementing the array index was missed in the previous series which causesus to not store all the values.
Signed-off-by: Amit Shah <amit.shah@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
KVM: Get all cpuid values from function 2 (Amit Shah)
cpuid function 2 can have multiple values to describe cache behaviour.Loop till we have fetched all the values.
KVM: Fetch sub-leaf cpuid values for functions 4, 0xb, 0xd. (Amit Shah)
CPUID functions 4, 0xb and 0xd have sub-leaf values which depend on theinput value of ECX. Store these values as well.
KVM: CPUID takes ecx as input value for some functions (Amit Shah)
The CPUID instruction takes the value of ECX as an input parameterin addition to the value of EAX as the count for functions 4, 0xband 0xd. Make sure we pass the value to the instruction....
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
Add phenom CPU descriptor (Alexander Graf)
As part of my ongoing effort to make nested SVM useful, I started working to getVMware ESX run inside KVM.
VMware couples itself pretty tightly to the CPUID, so it's a good idea to emulatea machine that officially supports SVM and should thus exploit the powers of...
Implement FFXSR (Alexander Graf)
Newer AMD CPUs have the FFXSR capability. This leaves out XMMregister in FXSAVE/FXRESTORE when in CPL=0 and 64-bit mode.
This is required for Hyper-V.
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Replace noreturn with QEMU_NORETURN
Thanks to Robert Riebisch for analysis [1]
[1] http://marc.info/?l=qemu-devel&m=123352293319271&w=2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6492 c046a42c-6fe2-441c-8c8c-71466251a162
Fix a typo in ext2_feature_name (Carl-Daniel Hailfinger)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6474 c046a42c-6fe2-441c-8c8c-71466251a162
Use new logging API in reset handling (Jan Kiszka)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6473 c046a42c-6fe2-441c-8c8c-71466251a162
MTRR support on x86, part 2 (Carl-Daniel Hailfinger)
Load and save MTRR state together with machine state.
Add support for the MTRRcap MSR which is used by the latest Bochs BIOSand some operating systems.
Fix a typo in ext2_feature_name.
With this patch, MTRR emulation should be good enough to not trigger any...
kvm-x86: Remove eflags conversion into emulator format (Jan Kiszka)
It seems that the conversion of the kernel-delivered eflags state intoqemu's internal split representation was once needed in an older kvmdesign (register read-back may have taken place from inside cpu_exec)....
x86: Issue reset on triple faults (Jan Kiszka)
As discussed a few times on this list: A triple fault causes a systemreset on x86, and some guests make use of this (e.g. 386BSD). To keepthe chance of tracing unexpected resets, log them if CPU_LOG_RESET is...
Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added morearchs.
This patch introduces a flag to log CPU resets. Useful for tracingunexpected resets (such as those triggered by x86 triple faults).
MTRR support on x86 (Carl-Daniel Hailfinger)
The current codebase ignores MTRR (Memory Type Range Register)configuration writes and reads because Qemu does not implement caching.All BIOS/firmware in know of for x86 do implement a mode calledCache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU...
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.
This patch doesn't try to merge logging macros from different files,but just unify the debugging code #ifdefs onto a macro on each file. Afurther cleanup can unify the debugging macros on a common header, later...
Suppress i386 warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6304 c046a42c-6fe2-441c-8c8c-71466251a162
Add noreturn function attribute
Introduce noreturn attribute and attach it to cpu_loop_exit as well asinterrupt/exception helpers for i386. This avoids a bunch of gcc4warnings.
[ Note that this patch comes with a workaround to include qemu-common.heven in cases where is currently causes conflicts with dyngen-exec.h....
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Use the ARRAY_SIZE() macro where appropriate.
Change from v1: Avoid changing the existing coding style in certain files.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
Initialize msr list size properly in KVM
Hollis Blanchard noticed that the last commit was not sufficient. We also needto initialize the msr size in our newly allocated list.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6018 c046a42c-6fe2-441c-8c8c-71466251a162
Correctly initialize msr list in KVM
I believe this was spotted by Gerd Hoffman but I can't find his patchnow. This will cause very subtle corruption on the heap because wedon't allocate the appropriately sized buffer.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix smsw for x86_64 guest and bigendian host case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6009 c046a42c-6fe2-441c-8c8c-71466251a162