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# Date Author Comment
dbaa07c4 05/11/2010 08:02 pm Jan Kiszka

kvm: validate context for kvm cpu get/put operations

Validate that KVM vcpu state is only read/written from cpu thread itself
or that cpu is stopped.

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Avi Kivity <>

0af691d7 05/11/2010 08:02 pm Marcelo Tosatti

kvm: enable smp > 1

Process INIT/SIPI requests and enable -smp > 1.

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Avi Kivity <>

6e9cc3ed 05/05/2010 01:20 pm Richard Henderson

target-i386: Remove duplicate CPU log.

The proper logging for -d cpu is done in generic code.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

ff44f1a3 04/26/2010 05:28 pm Jan Kiszka

KVM: x86: Add debug register saving and restoring

Make use of the new KVM_GET/SET_DEBUGREGS to save/restore the x86 debug
registers.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Marcelo Tosatti <>

b5e5a934 04/26/2010 05:28 pm Marcelo Tosatti

target-i386: print EFER in cpu_dump_state

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Avi Kivity <>

20420430 04/26/2010 05:28 pm Sheng Yang

kvm: allow qemu to set EPT identity mapping address

If we use larger BIOS image than current 256KB, we would need move reserved
TSS and EPT identity mapping pages. Currently TSS support this, but not
EPT.

Signed-off-by: Marcelo Tosatti <>...

7f5b7d3e 04/25/2010 09:58 pm Blue Swirl

x86: remove dead assignments, spotted by clang analyzer

Value stored is never read.

Signed-off-by: Blue Swirl <>

8c0d577e 04/18/2010 05:22 pm Blue Swirl

kvm: avoid collision with dprintf macro in stdio.h, spotted by clang

Fixes clang errors:
CC i386-softmmu/kvm.o
/src/qemu/target-i386/kvm.c:40:9: error: 'dprintf' macro redefined
In file included from /src/qemu/target-i386/kvm.c:21:
In file included from /src/qemu/qemu-common.h:27:...

9bd5494e 04/08/2010 10:44 pm Adam Lackorzynski

target-i386: Fix variable in (disabled) debugging code

Signed-off-by: Adam Lackorzynski <>
Signed-off-by: Aurelien Jarno <>

e5c15eff 04/08/2010 10:42 pm Stefan Weil

target-i386: Fix compiler warning

With argument checking for cpu_fprintf, gcc throws this warning:

CC    i386-softmmu/helper.o
cc1: warnings being treated as errors
/qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’:
/qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments...
1a7ff922 04/08/2010 10:34 pm Paolo Bonzini

remove TARGET_* defines from translate-all.c

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Aurelien Jarno <>

d4c430a8 03/17/2010 04:44 am Paul Brook

Large page TLB flush

QEMU uses a fixed page size for the CPU TLB. If the guest uses large
pages then we effectively split these into multiple smaller pages, and
populate the corresponding TLB entries on demand.

When the guest invalidates the TLB by virtual address we must invalidate...

c6dc6f63 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: move CPUID functions into separate file

about half of target-i386/helper.c consist of CPUID related functions.
Only one of them is a real TCG helper function. So move the whole
CPUID stuff out of this into a separate file to get better
maintainable parts....

42673936 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: replace magic number with named constant

CPUID leaf Fn8000_0001.EDX contains a copy of many Fn0000_0001.EDX bits.
Define a name for this mask to improve readability and avoid typos.

Signed-off-by: Andre Przywara <>
Signed-off-by: Aurelien Jarno <>

4d067ed7 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: fix missing feature set bits

This one was accidently removed with commit
bb0300dc57c10b3721451b0ff566a03f9276cc77

Signed-off-by: Andre Przywara <>
Signed-off-by: Aurelien Jarno <>

bdde476a 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: moved host_cpuid function and remove prototype

the host_cpuid function was located at the end of the file and had
a prototype before it's first use. Move it up and remove the
prototype.

Signed-off-by: Andre Przywara <>
Signed-off-by: Aurelien Jarno <>

e117f772 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: add missing CPUID feature flag names

Some CPUID feature flags had no string value, so they could not be
switched on or off from the command line.
Add names for the missing ones mentioned in the current public CPUID
specification from both Intel and AMD. Those only mentioned in the...

ed2c54d4 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: add "host" to the list of supported CPU models

Signed-off-by: Andre Przywara <>
Signed-off-by: Aurelien Jarno <>

457dfed6 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: remove unnecessary kvm_trim function

Correct me if I am wrong, but kvm_trim looks like a really bloated
implementation of a bitwise AND. So remove this function and replace
it with the real stuff(TM).

Signed-off-by: Andre Przywara <>...

551a2dec 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: add TCG feature bit trimming

In KVM we trim the user provided CPUID bits to match the host CPU's
one. Introduce a similar feature to QEMU/TCG. Create a mask of TCG's
capabilities and apply it to the user bits.
This allows to let the CPU models reflect their native archetypes....

d3bf5915 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: Always expose 32 and 64-bit CPUs

Since 64-bit capability is just another CPUID bit we now properly
mask, there is no reason anymore to hide the 64-bit capable CPU
models from a 32-bit only QEMU. All 64-bit CPUs can be used
perfectly in 32-bit legacy mode anyway, so these models also make...

58012d66 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: fix CPUID levels

Bump up the xlevel number for qemu32 to allow parsing of the processor
name string for this model.
Similiarly the 486 processor should have at least the feature bit
leaf enabled.

Signed-off-by: Andre Przywara <>...

8560efed 03/13/2010 05:50 pm Aurelien Jarno

x86/cpuid: Enable all features of real CPU

Enable all features of real CPU, unsupported features will be
trimmed depending on TCG or KVM capabilities.

Move the list of unsupported TCG features near the TCG capabilities
masks.

Signed-off-by: Aurelien Jarno <>

2f7a21c4 03/13/2010 05:50 pm Aurelien Jarno

x86/cpuid: fix indentation

Signed-off-by: Aurelien Jarno <>

2e21e749 03/13/2010 12:35 pm TeLeMan

target-i386: fix commit c22549204a6edc431e8e4358e61bd56386ff6957

The commit c22549204a6edc431e8e4358e61bd56386ff6957 led movntps &
movntdq to be translated incorrectly.

Signed-off-by: TeLeMan <>
Signed-off-by: Aurelien Jarno <>

4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

b16f827b 03/10/2010 09:43 am Aurelien Jarno

target-i386: fix SIB decoding with index = 4

A SIB byte with an index of 4 means "no scaled index", even if the scale
value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects
%r12. This is correctly handled by the computation of the index variable,...

41b1e61f 03/06/2010 08:20 pm malc

target-i386: Fix long jumps/calls in long mode with REX.W set

Signed-off-by: malc <>
Signed-off-by: Aurelien Jarno <>

c2254920 03/06/2010 07:33 pm Aurelien Jarno

target-i386: fix lddqu SSE instruction

This instruction load data from memory to register and not the reverse.

Signed-off-by: Aurelien Jarno <>

ea643051 03/04/2010 05:29 am Jan Kiszka

KVM: x86: Restrict writeback of VCPU state

Do not write nmi_pending, sipi_vector, and mpstate unless we at least go
through a reset. And TSC as well as KVM wallclocks should only be
written on full sync, otherwise we risk to drop some time on state
read-modify-write....

ea375f9a 03/04/2010 05:29 am Jan Kiszka

KVM: Rework VCPU state writeback API

This grand cleanup drops all reset and vmsave/load related
synchronization points in favor of four(!) generic hooks:

- cpu_synchronize_all_states in qemu_savevm_state_complete
(initial sync from kernel before vmsave)...

b0b1d690 03/04/2010 05:29 am Jan Kiszka

KVM: Rework of guest debug state writing

So far we synchronized any dirty VCPU state back into the kernel before
updating the guest debug state. This was a tribute to a deficite in x86
kernels before 2.6.33. But as this is an arch-dependent issue, it is
better handle in the x86 part of KVM and remove the writeback point for...

35bed8ee 03/01/2010 05:29 am Paul Brook

Move ioport.h out of cpu-all.h

Only include ioport.h where it is actually needed.

Signed-off-by: Paul Brook <>

63a54736 02/28/2010 08:20 pm Jason Wessel

target-i386: fix crash on x86 32bit linux host with hw breakpoint exceptions

If you make use of hw breakpoints on a 32bit x86 linux host, qemu
will segmentation fault when processing the exception.

The problem is that the value of env is stored in $ebp in the op_helper...

d354899c 02/24/2010 12:01 am Blue Swirl

Fix OpenBSD linker warning

helper.o(.text+0x11e0): In function `listflags':
/src/qemu/target-i386/helper.c:661: warning: sprintf() is often misused, please use snprintf()

Signed-off-by: Blue Swirl <>

161717d2 02/23/2010 11:46 pm Blue Swirl

Fix i386-bsd-user build

Signed-off-by: Blue Swirl <>

724c6893 02/23/2010 12:16 am Anthony Liguori

Merge remote branch 'qemu-kvm/uq/master' into staging

b5ec5ce0 02/23/2010 12:16 am john cooper

Add cpu model configuration support..

This is a reimplementation of prior versions which adds
the ability to define cpu models for contemporary processors.
The added models are likewise selected via -cpu <name>,
and are intended to displace the existing convention...

62f734a0 02/21/2010 11:41 am Jes Sorensen

kvm: Kill CR3_CACHE feature references

Remove all references to KVM_CR3_CACHE as it was never implemented.

Signed-off-by: Jes Sorensen <>
Signed-off-by: Avi Kivity <>

4c5b10b7 02/19/2010 11:53 pm Jes Sorensen

QEMU e820 reservation patch

Hi,

Kevin and I have agreed on the approach for this one now. So here is
the latest version of the patch for QEMU, submitting e820 reservation
entries via fw_cfg.

Cheers,
Jes

Use qemu-cfg to provide the BIOS with an optional table of e820 entries....

8217d945 02/08/2010 06:06 pm Anthony Liguori

Merge remote branch 'qemu-kvm/uq/master' into staging-tmp

5e398dd2 02/05/2010 08:13 pm Paolo Bonzini

remove two dead assignments in target-i386/translate.c

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

19ccb8ea 02/03/2010 11:47 pm Jan Kiszka

KVM: x86: Fix up misreported CPU features

From qemu-kvm: Kernels before 2.6.30 misreported some essential CPU
features via KVM_GET_SUPPORTED_CPUID. Fix them up.

Signed-off-by: Jan Kiszka <>

aee028b9 02/03/2010 11:47 pm Jan Kiszka

KVM: Request setting of nmi_pending and sipi_vector

The final version of VCPU events in 2.6.33 will allow to skip
nmi_pending and sipi_vector on KVM_SET_VCPU_EVENTS. For now let's write
them unconditionally, which is unproblematic for upstream due to missing...

baee019f 01/20/2010 12:31 am Paolo Bonzini

remove dead code from target-i386/exec.h

These are unused since edea5f0 (no need to define global registers in
cpu-exec.c, 2008-05-10).

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

bb0300dc 01/14/2010 01:14 am Gleb Natapov

Add KVM paravirt cpuid leaf

Initialize KVM paravirt cpuid leaf and allow user to control guest
visible PV features through -cpu flag.

Signed-off-by: Gleb Natapov <>
Signed-off-by: Anthony Liguori <>

d7209371 01/14/2010 01:14 am Amit Shah

x86: translate.c: remove dead assignment

clang-analyzer points out a redundant assignment.

Signed-off-by: Amit Shah <>
Signed-off-by: Anthony Liguori <>

af364b41 01/11/2010 05:56 pm Huang Ying

MCE: Fix bug of IA32_MCG_STATUS after system reset

Now, if we inject a fatal MCE into guest OS, for example Linux, Linux
will go panic and then reboot. But if we inject another MCE now,
system will reset directly instead of go panic firstly, because
MCG_STATUS.MCIP is set to 1 and not cleared after reboot. This is does...

e73223a5 01/11/2010 05:56 pm Gleb Natapov

remove pending exception on vcpu reset.

Without this qemu can even start on kvm modules with events support
since default value of exception_injected in zero and this is #DE
exception.

Signed-off-by: Gleb Natapov <>
Signed-off-by: Anthony Liguori <>

99596385 01/03/2010 04:14 am Aurelien Jarno

target-i386: Fix "call im" on x86_64 when executing 32-bit code

Similarly to what is done in 32938e127f50a40844a0fb9c5abb8691aeeccf7e
for "jmp im", trunc the immediate to 32-bit when not running in 64-bit
mode.

Reported-by: Kevin O'Connor <>...

c84bd4f1 12/24/2009 08:39 pm Gleb Natapov

Intel CPUs starting from pentium have apic

Intel CPUs starting from pentium have apic. Lets advertise it.

Signed-off-by: Gleb Natapov <>
Signed-off-by: Aurelien Jarno <>

acb6685f 12/18/2009 07:26 pm Anthony Liguori

Revert "kvm: x86: Save/restore exception_index"

This reverts commit ebbc8a3d8e76d0402f8a08c10c0f32e24715d41d.

As suggested by Jan Kiszka,

"It was obsoleted by d1793b836f8f123b961c613de1bb1c0c185c84cc and now
saves/restores a useless field."

Signed-off-by: Anthony Liguori <>

31827373 12/18/2009 07:26 pm Jan Kiszka

kvm: x86: Use separate exception_injected CPUState field

Marcelo correctly remarked that there are usage conflicts between QEMU
core code and KVM /wrt exception_index. So spend a separate field and
also save/restore it properly.

Signed-off-by: Jan Kiszka <>...

d46272c7 12/18/2009 07:26 pm Jan Kiszka

target-i386: Fix evaluation of DR7 register

hw_breakpoint_type and hw_breakpoint_len used the wrong index multiplier
to extract type and len.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

f1e00a9c 12/13/2009 09:48 pm Andre Przywara

target-i386: Update CPUID feature set for TCG

The CPUID features QEMU presented to the guest were not up-to-date
with QEMU's emulated feature set.
Add the missing bits of recent (and not so recent) additions to
QEMU's emulation engine.
For stability reasons only the user mode usable bits are exposed for...

1a03675d 12/12/2009 03:59 pm Glauber Costa

v2: properly save kvm system time msr registers

Currently, the msrs involved in setting up pvclock are not saved over
migration and/or save/restore. This patch puts their value in special
fields in our CPUState, and deal with them using vmstate.

kvm also has to account for it, by including them in the msr list...

4d6e3ac5 12/12/2009 03:59 pm Jan Kiszka

kvm: x86: Save/restore exception_index

As KVM now makes use of exception_index to keep pending exceptions, we
have to save&restore this field as well.

NOTE: We have to nail the arch-independent exception_index down to a
certain bit width for proper vmstate processing, namely to 32 bit....

6d9fef1a 12/07/2009 07:13 pm Andre Przywara

cpuid: Fix multicore setup on Intel

The multicore CPUID code detects whether the guest is an Intel or an
AMD CPU, because the Linux kernel is picky about the CmpLegacy bit.
KVM by default passes through the host's vendor, which was not
catched by the code. So fork out the vendor determining bits into a...

6fb6d245 12/07/2009 04:45 pm Jan Kiszka

kvm: x86: Fix initial kvm_has_msr_star

KVM_GET_MSR_INDEX_LIST returns -E2BIG when the provided space is too
small for all MSRs. But this is precisely the error we trigger with the
initial request in order to obtain that size. Do not fail in that case.

This caused a subtle corruption of the guest state as MSR_STAR was not...

a0fb002c 12/03/2009 11:25 pm Jan Kiszka

kvm: x86: Add support for VCPU event states

This patch extends the qemu-kvm state sync logic with support for
KVM_GET/SET_VCPU_EVENTS, giving access to yet missing exception,
interrupt and NMI states.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

5a2e3c2e 12/03/2009 11:25 pm Jan Kiszka

kvm: x86: Fix merge artifact of f8d926e9 about mp_state

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

caa5af0f 11/17/2009 04:49 pm Jan Kiszka

kvm: Add arch reset handler

Will be required by succeeding changes.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

0e607a80 11/17/2009 04:49 pm Jan Kiszka

kvm: x86: Refactor use of interrupt_bitmap

Drop interrupt_bitmap from the cpustate and solely rely on the integer
interupt_injected. This prepares us for the new injected-interrupt
interface, which will deprecate the bitmap, while preserving
compatibility....

9bdbe550 11/12/2009 07:23 pm Hollis Blanchard

kvm: Move KVM mp_state accessors to i386-specific code

Unbreaks PowerPC and S390 KVM builds.

Signed-off-by: Hollis Blanchard <>
Signed-off-by: Anthony Liguori <>

b55a37c9 11/07/2009 12:37 pm Blue Swirl

user: move CPU reset call to main.c for x86/PPC/Sparc

Signed-off-by: Blue Swirl <>

c1699988 11/07/2009 10:06 am Glauber Costa

v3: don't call reset functions on cpu initialization

There is absolutely no need to call reset functions when initializing
devices. Since we are already registering them, calling qemu_system_reset()
should suffice. Actually, it is what happens when we reboot the machine,...

d4829d49 10/27/2009 07:28 pm Juan Quintela

vmstate: Add version arg to VMSTATE_SINGLE_TEST()

This allows to define VMSTATE_SINGLE with VMSTATE_SINGLE_TEST
Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

31501a71 10/23/2009 06:10 pm Andre Przywara

target-i386: implement lzcnt emulation

lzcnt is a AMD Phenom/Barcelona added instruction returning the
number of leading zero bits in a word.
As this is similar to the "bsr" instruction, reuse the existing
code. There need to be some more changes, though, as lzcnt always...

976b2037 10/18/2009 05:51 pm Blue Swirl

x86: add 'static' to please Sparse

Signed-off-by: Blue Swirl <>

49d9fdcc 10/06/2009 11:01 pm Laurent Desnogues

target-i386: fix ARPL

The arpl implementation in target-i386/translate.c uses cpu_A0
temporary across a brcond op. This patch fixes that issue.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

5a2d0e57 10/05/2009 11:41 pm Aurelien Jarno

target-i386: move recently added vmstate fields at the end of the structure

This reduce the impact on hosts that have addressing modes with limited
offsets. Suggested by Laurent Desnogues.

Signed-off-by: Aurelien Jarno <>

1e7fbc6d 10/05/2009 10:01 pm Juan Quintela

x86: fix miss merge

There was a missmerge, and then we got a tail recursive call to cpu_post_load
without case base :)

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

5f30fa18 10/05/2009 05:32 pm Jan Kiszka

gdbstub: x86: Switch 64/32 bit registers dynamically

Commit 56aebc891674cd2d07b3f64183415697be200084 changed gdbstub in way
that debugging 32 or 16-bit guest code is no longer possible with qemu
for x86_64 guest CPUs. Since that commit, qemu only provides registers...

3c8ce630 10/05/2009 05:32 pm Juan Quintela

x86: factor out cpu_get/put_fpreg()

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

0cb892aa 10/05/2009 05:32 pm Juan Quintela

x86: port cpu to vmstate

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

e5cc6429 10/05/2009 05:32 pm Juan Quintela

x86: mcg_cap is never 0

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

acc68836 10/05/2009 05:32 pm Juan Quintela

x86: split FPReg union

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

c1a54d57 10/05/2009 05:32 pm Juan Quintela

x86: split MTRRVar union

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

66e6d55b 10/05/2009 05:32 pm Juan Quintela

x86: port segments to vmstate

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

c4c38c8c 10/05/2009 05:32 pm Juan Quintela

x86: factor out cpu_pre_save()

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

468f6581 10/05/2009 05:32 pm Juan Quintela

x86: factor out cpu_pre/post_load()

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

fc3b0aa2 10/05/2009 05:32 pm Juan Quintela

x86: factor out cpu_get/put_xmm_reg()

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

216c07c3 10/05/2009 05:32 pm Juan Quintela

x86: factor out cpu_get/put_mttr_var()

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

60a902f1 10/05/2009 05:32 pm Juan Quintela

x86: add fpregs_format_vmstate

Don't even ask, being able to load/save between 64<->80bit floats should be forbidden

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

ac74d0f1 10/05/2009 05:32 pm Juan Quintela

x86: mce_banks always have the same size

mce_banks is always MCE_BANKS_DEF * 4 in size, value never change

CC: Huang Ying <>
Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

496eb021 10/05/2009 05:32 pm Juan Quintela

x86: send mce_banks as an array

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

eb831623 10/05/2009 05:32 pm Juan Quintela

x86: fpuc is uint16_t not unsigned int

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

67b8f419 10/05/2009 05:32 pm Juan Quintela

x86: fpus is uint16_t not unsigned int

We save more that fpus on that 16 bits (fpstt), we need an additional field

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

cdc0c58f 10/05/2009 05:32 pm Juan Quintela

x86: add fptag_vmstate to the state

It is needed to store fptags

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

bfc179b6 10/05/2009 05:32 pm Juan Quintela

x86: add pending_irq_vmstate to the state

It is needed to save the interrupt_bitmap

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

1f76b9b9 10/05/2009 05:32 pm Juan Quintela

x86: hflags is not modified at all, just save it directly

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

5ee0ffaa 10/05/2009 05:32 pm Juan Quintela

x86: make a20_mask int32_t

This makes the savevm code correct, and sign extensins gives us exactly
what we need (namely, sign extend to 64 bits when used with 64bit addresess.

Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax....

09d85fb8 10/05/2009 12:10 am Kevin Wolf

target-i386: Fix exceptions for fxsave/fxrstor

This patch corrects the following aspects of exception generation in
fxsave/fxrstor:

  • Generate #GP if the operand is not aligned to a 16 byte boundary
  • Generate #UD if the LOCK prefix is used
  • For CR0.EM = 1 #NM is generated, not #UD...
1b050077 10/04/2009 03:46 pm Andre Przywara

target-i386: add RDTSCP support

RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()...

d9f4bb27 10/04/2009 03:09 pm Andre Przywara

target-i386: add SSE4a instruction support

This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register)....

ccd59d09 10/04/2009 03:04 pm Andre Przywara

target-i386: add lock mov cr0 = cr8

AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.
If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.
This behavior is guarded by the CR8_LEGACY CPUID bit
(Fn8000_0001:ECX1).

Signed-off-by: Andre Przywara <>...

c227f099 10/02/2009 12:12 am Anthony Liguori

Revert "Get rid of _t suffix"

In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem. Something
like this must be presented on the list first so people can provide input...

99a0949b 10/01/2009 09:45 pm malc

Get rid of _t suffix

Some not so obvious bits, slirp and Xen were left alone for the time
being.

Signed-off-by: malc <>