Revision 0be71e32 hw/pxa2xx.c

b/hw/pxa2xx.c
860 860
    iomemtype = cpu_register_io_memory(pxa2xx_ssp_readfn,
861 861
                                       pxa2xx_ssp_writefn, s);
862 862
    sysbus_init_mmio(dev, 0x1000, iomemtype);
863
    register_savevm("pxa2xx_ssp", -1, 0,
863
    register_savevm(&dev->qdev, "pxa2xx_ssp", -1, 0,
864 864
                    pxa2xx_ssp_save, pxa2xx_ssp_load, s);
865 865

  
866 866
    s->bus = ssi_create_bus(&dev->qdev, "ssi");
......
1515 1515
    cpu_register_physical_memory(base & ~region_size,
1516 1516
                    region_size + 1, iomemtype);
1517 1517

  
1518
    vmstate_register(base, &vmstate_pxa2xx_i2c, s);
1518
    vmstate_register(NULL, base, &vmstate_pxa2xx_i2c, s);
1519 1519

  
1520 1520
    return s;
1521 1521
}
......
1751 1751
                    pxa2xx_i2s_writefn, s);
1752 1752
    cpu_register_physical_memory(base, 0x100000, iomemtype);
1753 1753

  
1754
    register_savevm("pxa2xx_i2s", base, 0,
1754
    register_savevm(NULL, "pxa2xx_i2s", base, 0,
1755 1755
                    pxa2xx_i2s_save, pxa2xx_i2s_load, s);
1756 1756

  
1757 1757
    return s;
......
2014 2014
        qemu_chr_add_handlers(chr, pxa2xx_fir_is_empty,
2015 2015
                        pxa2xx_fir_rx, pxa2xx_fir_event, s);
2016 2016

  
2017
    register_savevm("pxa2xx_fir", 0, 0, pxa2xx_fir_save, pxa2xx_fir_load, s);
2017
    register_savevm(NULL, "pxa2xx_fir", 0, 0, pxa2xx_fir_save,
2018
                    pxa2xx_fir_load, s);
2018 2019

  
2019 2020
    return s;
2020 2021
}
......
2099 2100
    iomemtype = cpu_register_io_memory(pxa2xx_cm_readfn,
2100 2101
                    pxa2xx_cm_writefn, s);
2101 2102
    cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
2102
    register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
2103
    register_savevm(NULL, "pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
2103 2104

  
2104 2105
    cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
2105 2106

  
......
2110 2111
    iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
2111 2112
                    pxa2xx_mm_writefn, s);
2112 2113
    cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
2113
    register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2114
    register_savevm(NULL, "pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2114 2115

  
2115 2116
    s->pm_base = 0x40f00000;
2116 2117
    iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
2117 2118
                    pxa2xx_pm_writefn, s);
2118 2119
    cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
2119
    register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
2120
    register_savevm(NULL, "pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
2120 2121

  
2121 2122
    for (i = 0; pxa27x_ssp[i].io_base; i ++);
2122 2123
    s->ssp = (SSIBus **)qemu_mallocz(sizeof(SSIBus *) * i);
......
2140 2141
                    pxa2xx_rtc_writefn, s);
2141 2142
    cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
2142 2143
    pxa2xx_rtc_init(s);
2143
    register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
2144
    register_savevm(NULL, "pxa2xx_rtc", 0, 0, pxa2xx_rtc_save,
2145
                    pxa2xx_rtc_load, s);
2144 2146

  
2145 2147
    s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 0xffff);
2146 2148
    s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0xff);
......
2219 2221
    iomemtype = cpu_register_io_memory(pxa2xx_cm_readfn,
2220 2222
                    pxa2xx_cm_writefn, s);
2221 2223
    cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
2222
    register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
2224
    register_savevm(NULL, "pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
2223 2225

  
2224 2226
    cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s);
2225 2227

  
......
2230 2232
    iomemtype = cpu_register_io_memory(pxa2xx_mm_readfn,
2231 2233
                    pxa2xx_mm_writefn, s);
2232 2234
    cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
2233
    register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2235
    register_savevm(NULL, "pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
2234 2236

  
2235 2237
    s->pm_base = 0x40f00000;
2236 2238
    iomemtype = cpu_register_io_memory(pxa2xx_pm_readfn,
2237 2239
                    pxa2xx_pm_writefn, s);
2238 2240
    cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
2239
    register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
2241
    register_savevm(NULL, "pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
2240 2242

  
2241 2243
    for (i = 0; pxa255_ssp[i].io_base; i ++);
2242 2244
    s->ssp = (SSIBus **)qemu_mallocz(sizeof(SSIBus *) * i);
......
2260 2262
                    pxa2xx_rtc_writefn, s);
2261 2263
    cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
2262 2264
    pxa2xx_rtc_init(s);
2263
    register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
2265
    register_savevm(NULL, "pxa2xx_rtc", 0, 0, pxa2xx_rtc_save,
2266
                    pxa2xx_rtc_load, s);
2264 2267

  
2265 2268
    s->i2c[0] = pxa2xx_i2c_init(0x40301600, s->pic[PXA2XX_PIC_I2C], 0xffff);
2266 2269
    s->i2c[1] = pxa2xx_i2c_init(0x40f00100, s->pic[PXA2XX_PIC_PWRI2C], 0xff);

Also available in: Unified diff