Revision 0bf46a40
| b/qemu-common.h | ||
|---|---|---|
| 189 | 189 |
/* Force QEMU to process pending events */ |
| 190 | 190 |
void qemu_notify_event(void); |
| 191 | 191 |
|
| 192 |
#ifdef CONFIG_USER_ONLY |
|
| 193 |
#define qemu_init_vcpu(env) do { } while (0)
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|
| 194 |
#else |
|
| 195 |
void qemu_init_vcpu(void *env); |
|
| 196 |
#endif |
|
| 197 |
|
|
| 192 | 198 |
typedef struct QEMUIOVector {
|
| 193 | 199 |
struct iovec *iov; |
| 194 | 200 |
int niov; |
| b/target-alpha/translate.c | ||
|---|---|---|
| 2505 | 2505 |
env->ipr[IPR_SISR] = 0; |
| 2506 | 2506 |
env->ipr[IPR_VIRBND] = -1ULL; |
| 2507 | 2507 |
|
| 2508 |
qemu_init_vcpu(env); |
|
| 2508 | 2509 |
return env; |
| 2509 | 2510 |
} |
| 2510 | 2511 |
|
| b/target-arm/helper.c | ||
|---|---|---|
| 267 | 267 |
gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg, |
| 268 | 268 |
19, "arm-vfp.xml", 0); |
| 269 | 269 |
} |
| 270 |
qemu_init_vcpu(env); |
|
| 270 | 271 |
return env; |
| 271 | 272 |
} |
| 272 | 273 |
|
| b/target-cris/translate.c | ||
|---|---|---|
| 3405 | 3405 |
|
| 3406 | 3406 |
cpu_exec_init(env); |
| 3407 | 3407 |
cpu_reset(env); |
| 3408 |
qemu_init_vcpu(env); |
|
| 3408 | 3409 |
|
| 3409 | 3410 |
if (tcg_initialized) |
| 3410 | 3411 |
return env; |
| b/target-i386/helper.c | ||
|---|---|---|
| 1692 | 1692 |
#ifdef CONFIG_KQEMU |
| 1693 | 1693 |
kqemu_init(env); |
| 1694 | 1694 |
#endif |
| 1695 |
if (kvm_enabled()) |
|
| 1696 |
kvm_init_vcpu(env); |
|
| 1695 |
|
|
| 1696 |
qemu_init_vcpu(env); |
|
| 1697 |
|
|
| 1697 | 1698 |
return env; |
| 1698 | 1699 |
} |
| b/target-m68k/helper.c | ||
|---|---|---|
| 180 | 180 |
} |
| 181 | 181 |
|
| 182 | 182 |
cpu_reset(env); |
| 183 |
qemu_init_vcpu(env); |
|
| 183 | 184 |
return env; |
| 184 | 185 |
} |
| 185 | 186 |
|
| b/target-mips/translate.c | ||
|---|---|---|
| 8551 | 8551 |
env->cpu_model_str = cpu_model; |
| 8552 | 8552 |
mips_tcg_init(); |
| 8553 | 8553 |
cpu_reset(env); |
| 8554 |
qemu_init_vcpu(env); |
|
| 8554 | 8555 |
return env; |
| 8555 | 8556 |
} |
| 8556 | 8557 |
|
| b/target-ppc/helper.c | ||
|---|---|---|
| 2831 | 2831 |
cpu_ppc_register_internal(env, def); |
| 2832 | 2832 |
cpu_ppc_reset(env); |
| 2833 | 2833 |
|
| 2834 |
if (kvm_enabled()) |
|
| 2835 |
kvm_init_vcpu(env); |
|
| 2834 |
qemu_init_vcpu(env); |
|
| 2836 | 2835 |
|
| 2837 | 2836 |
return env; |
| 2838 | 2837 |
} |
| b/target-sh4/translate.c | ||
|---|---|---|
| 290 | 290 |
cpu_sh4_reset(env); |
| 291 | 291 |
cpu_sh4_register(env, def); |
| 292 | 292 |
tlb_flush(env, 1); |
| 293 |
qemu_init_vcpu(env); |
|
| 293 | 294 |
return env; |
| 294 | 295 |
} |
| 295 | 296 |
|
| b/target-sparc/helper.c | ||
|---|---|---|
| 723 | 723 |
return NULL; |
| 724 | 724 |
} |
| 725 | 725 |
cpu_reset(env); |
| 726 |
qemu_init_vcpu(env); |
|
| 726 | 727 |
|
| 727 | 728 |
return env; |
| 728 | 729 |
} |
| b/vl.c | ||
|---|---|---|
| 3731 | 3731 |
return qemu_event_init(); |
| 3732 | 3732 |
} |
| 3733 | 3733 |
|
| 3734 |
void qemu_init_vcpu(void *_env) |
|
| 3735 |
{
|
|
| 3736 |
CPUState *env = _env; |
|
| 3737 |
|
|
| 3738 |
if (kvm_enabled()) |
|
| 3739 |
kvm_init_vcpu(env); |
|
| 3740 |
return; |
|
| 3741 |
} |
|
| 3742 |
|
|
| 3734 | 3743 |
#ifdef _WIN32 |
| 3735 | 3744 |
static void host_main_loop_wait(int *timeout) |
| 3736 | 3745 |
{
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