Revision 0c45d3d4 gdbstub.c
| b/gdbstub.c | ||
|---|---|---|
| 1462 | 1462 |
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| 1463 | 1463 |
return r; |
| 1464 | 1464 |
} |
| 1465 |
#elif defined (TARGET_LM32) |
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| 1466 |
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| 1467 |
#include "hw/lm32_pic.h" |
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| 1468 |
#define NUM_CORE_REGS (32 + 7) |
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| 1469 |
|
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| 1470 |
static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) |
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| 1471 |
{
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| 1472 |
if (n < 32) {
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| 1473 |
GET_REG32(env->regs[n]); |
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| 1474 |
} else {
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| 1475 |
switch (n) {
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| 1476 |
case 32: |
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| 1477 |
GET_REG32(env->pc); |
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| 1478 |
break; |
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| 1479 |
/* FIXME: put in right exception ID */ |
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| 1480 |
case 33: |
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| 1481 |
GET_REG32(0); |
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| 1482 |
break; |
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| 1483 |
case 34: |
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| 1484 |
GET_REG32(env->eba); |
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| 1485 |
break; |
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| 1486 |
case 35: |
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| 1487 |
GET_REG32(env->deba); |
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| 1488 |
break; |
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| 1489 |
case 36: |
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| 1490 |
GET_REG32(env->ie); |
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| 1491 |
break; |
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| 1492 |
case 37: |
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| 1493 |
GET_REG32(lm32_pic_get_im(env->pic_state)); |
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| 1494 |
break; |
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| 1495 |
case 38: |
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| 1496 |
GET_REG32(lm32_pic_get_ip(env->pic_state)); |
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| 1497 |
break; |
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| 1498 |
} |
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| 1499 |
} |
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| 1500 |
return 0; |
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| 1501 |
} |
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| 1502 |
|
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| 1503 |
static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) |
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| 1504 |
{
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| 1505 |
uint32_t tmp; |
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| 1506 |
|
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| 1507 |
if (n > NUM_CORE_REGS) {
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| 1508 |
return 0; |
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| 1509 |
} |
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| 1510 |
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| 1511 |
tmp = ldl_p(mem_buf); |
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| 1512 |
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| 1513 |
if (n < 32) {
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| 1514 |
env->regs[n] = tmp; |
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| 1515 |
} else {
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| 1516 |
switch (n) {
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| 1517 |
case 32: |
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| 1518 |
env->pc = tmp; |
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| 1519 |
break; |
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| 1520 |
case 34: |
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| 1521 |
env->eba = tmp; |
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| 1522 |
break; |
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| 1523 |
case 35: |
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| 1524 |
env->deba = tmp; |
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| 1525 |
break; |
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| 1526 |
case 36: |
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| 1527 |
env->ie = tmp; |
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| 1528 |
break; |
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| 1529 |
case 37: |
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| 1530 |
lm32_pic_set_im(env->pic_state, tmp); |
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| 1531 |
break; |
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| 1532 |
case 38: |
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| 1533 |
lm32_pic_set_ip(env->pic_state, tmp); |
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| 1534 |
break; |
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| 1535 |
} |
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| 1536 |
} |
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| 1537 |
return 4; |
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| 1538 |
} |
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| 1465 | 1539 |
#else |
| 1466 | 1540 |
|
| 1467 | 1541 |
#define NUM_CORE_REGS 0 |
| ... | ... | |
| 1737 | 1811 |
#elif defined (TARGET_S390X) |
| 1738 | 1812 |
cpu_synchronize_state(s->c_cpu); |
| 1739 | 1813 |
s->c_cpu->psw.addr = pc; |
| 1814 |
#elif defined (TARGET_LM32) |
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| 1815 |
s->c_cpu->pc = pc; |
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| 1740 | 1816 |
#endif |
| 1741 | 1817 |
} |
| 1742 | 1818 |
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