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/*
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* OMAP LCD controller.
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*
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* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw/hw.h" |
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#include "ui/console.h" |
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#include "hw/arm/omap.h" |
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#include "hw/framebuffer.h" |
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#include "ui/pixel_ops.h" |
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struct omap_lcd_panel_s {
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MemoryRegion *sysmem; |
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MemoryRegion iomem; |
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qemu_irq irq; |
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QemuConsole *con; |
30 |
|
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int plm;
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int tft;
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int mono;
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int enable;
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int width;
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int height;
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int interrupts;
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uint32_t timing[3];
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uint32_t subpanel; |
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uint32_t ctrl; |
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|
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struct omap_dma_lcd_channel_s *dma;
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uint16_t palette[256];
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int palette_done;
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int frame_done;
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int invalidate;
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int sync_error;
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}; |
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static void omap_lcd_interrupts(struct omap_lcd_panel_s *s) |
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{ |
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if (s->frame_done && (s->interrupts & 1)) { |
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qemu_irq_raise(s->irq); |
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return;
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} |
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|
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if (s->palette_done && (s->interrupts & 2)) { |
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qemu_irq_raise(s->irq); |
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return;
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} |
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|
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if (s->sync_error) {
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qemu_irq_raise(s->irq); |
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return;
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} |
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|
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qemu_irq_lower(s->irq); |
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} |
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#define draw_line_func drawfn
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#define DEPTH 8 |
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#include "hw/omap_lcd_template.h" |
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#define DEPTH 15 |
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#include "hw/omap_lcd_template.h" |
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#define DEPTH 16 |
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#include "hw/omap_lcd_template.h" |
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#define DEPTH 32 |
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#include "hw/omap_lcd_template.h" |
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|
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static draw_line_func draw_line_table2[33] = { |
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[0 ... 32] = NULL, |
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[8] = draw_line2_8,
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[15] = draw_line2_15,
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[16] = draw_line2_16,
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[32] = draw_line2_32,
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}, draw_line_table4[33] = {
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[0 ... 32] = NULL, |
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[8] = draw_line4_8,
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[15] = draw_line4_15,
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[16] = draw_line4_16,
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[32] = draw_line4_32,
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}, draw_line_table8[33] = {
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[0 ... 32] = NULL, |
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[8] = draw_line8_8,
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[15] = draw_line8_15,
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[16] = draw_line8_16,
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[32] = draw_line8_32,
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}, draw_line_table12[33] = {
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[0 ... 32] = NULL, |
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[8] = draw_line12_8,
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[15] = draw_line12_15,
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[16] = draw_line12_16,
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[32] = draw_line12_32,
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}, draw_line_table16[33] = {
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[0 ... 32] = NULL, |
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[8] = draw_line16_8,
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[15] = draw_line16_15,
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[16] = draw_line16_16,
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[32] = draw_line16_32,
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}; |
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static void omap_update_display(void *opaque) |
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{ |
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struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque; |
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DisplaySurface *surface = qemu_console_surface(omap_lcd->con); |
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draw_line_func draw_line; |
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int size, height, first, last;
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int width, linesize, step, bpp, frame_offset;
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hwaddr frame_base; |
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|
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if (!omap_lcd || omap_lcd->plm == 1 || !omap_lcd->enable || |
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!surface_bits_per_pixel(surface)) { |
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return;
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} |
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frame_offset = 0;
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if (omap_lcd->plm != 2) { |
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cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[ |
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omap_lcd->dma->current_frame], |
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(void *)omap_lcd->palette, 0x200); |
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switch (omap_lcd->palette[0] >> 12 & 7) { |
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case 3 ... 7: |
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frame_offset += 0x200;
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break;
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default:
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frame_offset += 0x20;
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} |
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} |
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|
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/* Colour depth */
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switch ((omap_lcd->palette[0] >> 12) & 7) { |
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case 1: |
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draw_line = draw_line_table2[surface_bits_per_pixel(surface)]; |
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bpp = 2;
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break;
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case 2: |
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draw_line = draw_line_table4[surface_bits_per_pixel(surface)]; |
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bpp = 4;
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break;
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|
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case 3: |
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draw_line = draw_line_table8[surface_bits_per_pixel(surface)]; |
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bpp = 8;
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break;
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|
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case 4 ... 7: |
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if (!omap_lcd->tft)
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draw_line = draw_line_table12[surface_bits_per_pixel(surface)]; |
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else
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draw_line = draw_line_table16[surface_bits_per_pixel(surface)]; |
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bpp = 16;
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break;
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default:
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/* Unsupported at the moment. */
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return;
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} |
170 |
|
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/* Resolution */
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width = omap_lcd->width; |
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if (width != surface_width(surface) ||
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omap_lcd->height != surface_height(surface)) { |
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qemu_console_resize(omap_lcd->con, |
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omap_lcd->width, omap_lcd->height); |
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surface = qemu_console_surface(omap_lcd->con); |
178 |
omap_lcd->invalidate = 1;
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} |
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if (omap_lcd->dma->current_frame == 0) |
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size = omap_lcd->dma->src_f1_bottom - omap_lcd->dma->src_f1_top; |
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else
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size = omap_lcd->dma->src_f2_bottom - omap_lcd->dma->src_f2_top; |
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if (frame_offset + ((width * omap_lcd->height * bpp) >> 3) > size + 2) { |
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omap_lcd->sync_error = 1;
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omap_lcd_interrupts(omap_lcd); |
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omap_lcd->enable = 0;
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return;
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} |
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/* Content */
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frame_base = omap_lcd->dma->phys_framebuffer[ |
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omap_lcd->dma->current_frame] + frame_offset; |
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omap_lcd->dma->condition |= 1 << omap_lcd->dma->current_frame;
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if (omap_lcd->dma->interrupts & 1) |
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qemu_irq_raise(omap_lcd->dma->irq); |
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if (omap_lcd->dma->dual)
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omap_lcd->dma->current_frame ^= 1;
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if (!surface_bits_per_pixel(surface)) {
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return;
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} |
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first = 0;
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height = omap_lcd->height; |
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if (omap_lcd->subpanel & (1 << 31)) { |
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if (omap_lcd->subpanel & (1 << 29)) |
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first = (omap_lcd->subpanel >> 16) & 0x3ff; |
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else
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height = (omap_lcd->subpanel >> 16) & 0x3ff; |
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/* TODO: fill the rest of the panel with DPD */
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} |
215 |
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step = width * bpp >> 3;
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linesize = surface_stride(surface); |
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framebuffer_update_display(surface, omap_lcd->sysmem, |
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frame_base, width, height, |
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step, linesize, 0,
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omap_lcd->invalidate, |
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draw_line, omap_lcd->palette, |
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&first, &last); |
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if (first >= 0) { |
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dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1); |
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} |
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omap_lcd->invalidate = 0;
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} |
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static void omap_ppm_save(const char *filename, uint8_t *data, |
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int w, int h, int linesize, Error **errp) |
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{ |
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FILE *f; |
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uint8_t *d, *d1; |
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unsigned int v; |
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int ret, y, x, bpp;
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f = fopen(filename, "wb");
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if (!f) {
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error_setg(errp, "failed to open file '%s': %s", filename,
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strerror(errno)); |
242 |
return;
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} |
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ret = fprintf(f, "P6\n%d %d\n%d\n", w, h, 255); |
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if (ret < 0) { |
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goto write_err;
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} |
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d1 = data; |
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bpp = linesize / w; |
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for (y = 0; y < h; y ++) { |
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d = d1; |
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for (x = 0; x < w; x ++) { |
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v = *(uint32_t *) d; |
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switch (bpp) {
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case 2: |
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ret = fputc((v >> 8) & 0xf8, f); |
257 |
if (ret == EOF) { |
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goto write_err;
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} |
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ret = fputc((v >> 3) & 0xfc, f); |
261 |
if (ret == EOF) { |
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goto write_err;
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} |
264 |
ret = fputc((v << 3) & 0xf8, f); |
265 |
if (ret == EOF) { |
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goto write_err;
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} |
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break;
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case 3: |
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case 4: |
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default:
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ret = fputc((v >> 16) & 0xff, f); |
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if (ret == EOF) { |
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goto write_err;
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} |
276 |
ret = fputc((v >> 8) & 0xff, f); |
277 |
if (ret == EOF) { |
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goto write_err;
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} |
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ret = fputc((v) & 0xff, f);
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if (ret == EOF) { |
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goto write_err;
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} |
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break;
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} |
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d += bpp; |
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} |
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d1 += linesize; |
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} |
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out:
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fclose(f); |
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return;
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write_err:
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error_setg(errp, "failed to write to file '%s': %s", filename,
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strerror(errno)); |
297 |
unlink(filename); |
298 |
goto out;
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} |
300 |
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static void omap_screen_dump(void *opaque, const char *filename, bool cswitch, |
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Error **errp) |
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{ |
304 |
struct omap_lcd_panel_s *omap_lcd = opaque;
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DisplaySurface *surface = qemu_console_surface(omap_lcd->con); |
306 |
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omap_update_display(opaque); |
308 |
if (omap_lcd && surface_data(surface))
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omap_ppm_save(filename, surface_data(surface), |
310 |
omap_lcd->width, omap_lcd->height, |
311 |
surface_stride(surface), errp); |
312 |
} |
313 |
|
314 |
static void omap_invalidate_display(void *opaque) { |
315 |
struct omap_lcd_panel_s *omap_lcd = opaque;
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316 |
omap_lcd->invalidate = 1;
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317 |
} |
318 |
|
319 |
static void omap_lcd_update(struct omap_lcd_panel_s *s) { |
320 |
if (!s->enable) {
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321 |
s->dma->current_frame = -1;
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322 |
s->sync_error = 0;
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323 |
if (s->plm != 1) |
324 |
s->frame_done = 1;
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omap_lcd_interrupts(s); |
326 |
return;
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327 |
} |
328 |
|
329 |
if (s->dma->current_frame == -1) { |
330 |
s->frame_done = 0;
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s->palette_done = 0;
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332 |
s->dma->current_frame = 0;
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} |
334 |
|
335 |
if (!s->dma->mpu->port[s->dma->src].addr_valid(s->dma->mpu,
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s->dma->src_f1_top) || |
337 |
!s->dma->mpu->port[ |
338 |
s->dma->src].addr_valid(s->dma->mpu, |
339 |
s->dma->src_f1_bottom) || |
340 |
(s->dma->dual && |
341 |
(!s->dma->mpu->port[ |
342 |
s->dma->src].addr_valid(s->dma->mpu, |
343 |
s->dma->src_f2_top) || |
344 |
!s->dma->mpu->port[ |
345 |
s->dma->src].addr_valid(s->dma->mpu, |
346 |
s->dma->src_f2_bottom)))) { |
347 |
s->dma->condition |= 1 << 2; |
348 |
if (s->dma->interrupts & (1 << 1)) |
349 |
qemu_irq_raise(s->dma->irq); |
350 |
s->enable = 0;
|
351 |
return;
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352 |
} |
353 |
|
354 |
s->dma->phys_framebuffer[0] = s->dma->src_f1_top;
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355 |
s->dma->phys_framebuffer[1] = s->dma->src_f2_top;
|
356 |
|
357 |
if (s->plm != 2 && !s->palette_done) { |
358 |
cpu_physical_memory_read( |
359 |
s->dma->phys_framebuffer[s->dma->current_frame], |
360 |
(void *)s->palette, 0x200); |
361 |
s->palette_done = 1;
|
362 |
omap_lcd_interrupts(s); |
363 |
} |
364 |
} |
365 |
|
366 |
static uint64_t omap_lcdc_read(void *opaque, hwaddr addr, |
367 |
unsigned size)
|
368 |
{ |
369 |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
370 |
|
371 |
switch (addr) {
|
372 |
case 0x00: /* LCD_CONTROL */ |
373 |
return (s->tft << 23) | (s->plm << 20) | |
374 |
(s->tft << 7) | (s->interrupts << 3) | |
375 |
(s->mono << 1) | s->enable | s->ctrl | 0xfe000c34; |
376 |
|
377 |
case 0x04: /* LCD_TIMING0 */ |
378 |
return (s->timing[0] << 10) | (s->width - 1) | 0x0000000f; |
379 |
|
380 |
case 0x08: /* LCD_TIMING1 */ |
381 |
return (s->timing[1] << 10) | (s->height - 1); |
382 |
|
383 |
case 0x0c: /* LCD_TIMING2 */ |
384 |
return s->timing[2] | 0xfc000000; |
385 |
|
386 |
case 0x10: /* LCD_STATUS */ |
387 |
return (s->palette_done << 6) | (s->sync_error << 2) | s->frame_done; |
388 |
|
389 |
case 0x14: /* LCD_SUBPANEL */ |
390 |
return s->subpanel;
|
391 |
|
392 |
default:
|
393 |
break;
|
394 |
} |
395 |
OMAP_BAD_REG(addr); |
396 |
return 0; |
397 |
} |
398 |
|
399 |
static void omap_lcdc_write(void *opaque, hwaddr addr, |
400 |
uint64_t value, unsigned size)
|
401 |
{ |
402 |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
403 |
|
404 |
switch (addr) {
|
405 |
case 0x00: /* LCD_CONTROL */ |
406 |
s->plm = (value >> 20) & 3; |
407 |
s->tft = (value >> 7) & 1; |
408 |
s->interrupts = (value >> 3) & 3; |
409 |
s->mono = (value >> 1) & 1; |
410 |
s->ctrl = value & 0x01cff300;
|
411 |
if (s->enable != (value & 1)) { |
412 |
s->enable = value & 1;
|
413 |
omap_lcd_update(s); |
414 |
} |
415 |
break;
|
416 |
|
417 |
case 0x04: /* LCD_TIMING0 */ |
418 |
s->timing[0] = value >> 10; |
419 |
s->width = (value & 0x3ff) + 1; |
420 |
break;
|
421 |
|
422 |
case 0x08: /* LCD_TIMING1 */ |
423 |
s->timing[1] = value >> 10; |
424 |
s->height = (value & 0x3ff) + 1; |
425 |
break;
|
426 |
|
427 |
case 0x0c: /* LCD_TIMING2 */ |
428 |
s->timing[2] = value;
|
429 |
break;
|
430 |
|
431 |
case 0x10: /* LCD_STATUS */ |
432 |
break;
|
433 |
|
434 |
case 0x14: /* LCD_SUBPANEL */ |
435 |
s->subpanel = value & 0xa1ffffff;
|
436 |
break;
|
437 |
|
438 |
default:
|
439 |
OMAP_BAD_REG(addr); |
440 |
} |
441 |
} |
442 |
|
443 |
static const MemoryRegionOps omap_lcdc_ops = { |
444 |
.read = omap_lcdc_read, |
445 |
.write = omap_lcdc_write, |
446 |
.endianness = DEVICE_NATIVE_ENDIAN, |
447 |
}; |
448 |
|
449 |
void omap_lcdc_reset(struct omap_lcd_panel_s *s) |
450 |
{ |
451 |
s->dma->current_frame = -1;
|
452 |
s->plm = 0;
|
453 |
s->tft = 0;
|
454 |
s->mono = 0;
|
455 |
s->enable = 0;
|
456 |
s->width = 0;
|
457 |
s->height = 0;
|
458 |
s->interrupts = 0;
|
459 |
s->timing[0] = 0; |
460 |
s->timing[1] = 0; |
461 |
s->timing[2] = 0; |
462 |
s->subpanel = 0;
|
463 |
s->palette_done = 0;
|
464 |
s->frame_done = 0;
|
465 |
s->sync_error = 0;
|
466 |
s->invalidate = 1;
|
467 |
s->subpanel = 0;
|
468 |
s->ctrl = 0;
|
469 |
} |
470 |
|
471 |
struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
|
472 |
hwaddr base, |
473 |
qemu_irq irq, |
474 |
struct omap_dma_lcd_channel_s *dma,
|
475 |
omap_clk clk) |
476 |
{ |
477 |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) |
478 |
g_malloc0(sizeof(struct omap_lcd_panel_s)); |
479 |
|
480 |
s->irq = irq; |
481 |
s->dma = dma; |
482 |
s->sysmem = sysmem; |
483 |
omap_lcdc_reset(s); |
484 |
|
485 |
memory_region_init_io(&s->iomem, &omap_lcdc_ops, s, "omap.lcdc", 0x100); |
486 |
memory_region_add_subregion(sysmem, base, &s->iomem); |
487 |
|
488 |
s->con = graphic_console_init(omap_update_display, |
489 |
omap_invalidate_display, |
490 |
omap_screen_dump, NULL, s);
|
491 |
|
492 |
return s;
|
493 |
} |