root / include / hw / i386 / apic_internal.h @ 0d09e41a
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/*
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* APIC support - internal interfaces
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*
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* Copyright (c) 2004-2005 Fabrice Bellard
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* Copyright (c) 2011 Jan Kiszka, Siemens AG
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>
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*/
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#ifndef QEMU_APIC_INTERNAL_H
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#define QEMU_APIC_INTERNAL_H
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#include "exec/memory.h" |
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#include "hw/sysbus.h" |
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#include "qemu/timer.h" |
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/* APIC Local Vector Table */
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#define APIC_LVT_TIMER 0 |
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#define APIC_LVT_THERMAL 1 |
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#define APIC_LVT_PERFORM 2 |
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#define APIC_LVT_LINT0 3 |
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#define APIC_LVT_LINT1 4 |
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#define APIC_LVT_ERROR 5 |
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#define APIC_LVT_NB 6 |
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/* APIC delivery modes */
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#define APIC_DM_FIXED 0 |
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#define APIC_DM_LOWPRI 1 |
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#define APIC_DM_SMI 2 |
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#define APIC_DM_NMI 4 |
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#define APIC_DM_INIT 5 |
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#define APIC_DM_SIPI 6 |
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#define APIC_DM_EXTINT 7 |
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/* APIC destination mode */
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#define APIC_DESTMODE_FLAT 0xf |
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#define APIC_DESTMODE_CLUSTER 1 |
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#define APIC_TRIGGER_EDGE 0 |
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#define APIC_TRIGGER_LEVEL 1 |
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#define APIC_LVT_TIMER_PERIODIC (1<<17) |
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#define APIC_LVT_MASKED (1<<16) |
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#define APIC_LVT_LEVEL_TRIGGER (1<<15) |
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#define APIC_LVT_REMOTE_IRR (1<<14) |
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#define APIC_INPUT_POLARITY (1<<13) |
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#define APIC_SEND_PENDING (1<<12) |
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#define ESR_ILLEGAL_ADDRESS (1 << 7) |
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#define APIC_SV_DIRECTED_IO (1<<12) |
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#define APIC_SV_ENABLE (1<<8) |
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#define VAPIC_ENABLE_BIT 0 |
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#define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT) |
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#define MAX_APICS 255 |
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#define MSI_SPACE_SIZE 0x100000 |
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typedef struct APICCommonState APICCommonState; |
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#define TYPE_APIC_COMMON "apic-common" |
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#define APIC_COMMON(obj) \
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OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON) |
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#define APIC_COMMON_CLASS(klass) \
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OBJECT_CLASS_CHECK(APICCommonClass, (klass), TYPE_APIC_COMMON) |
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#define APIC_COMMON_GET_CLASS(obj) \
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OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON) |
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typedef struct APICCommonClass |
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{ |
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SysBusDeviceClass parent_class; |
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void (*init)(APICCommonState *s);
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void (*set_base)(APICCommonState *s, uint64_t val);
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void (*set_tpr)(APICCommonState *s, uint8_t val);
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uint8_t (*get_tpr)(APICCommonState *s); |
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void (*enable_tpr_reporting)(APICCommonState *s, bool enable); |
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void (*vapic_base_update)(APICCommonState *s);
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void (*external_nmi)(APICCommonState *s);
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void (*pre_save)(APICCommonState *s);
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void (*post_load)(APICCommonState *s);
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} APICCommonClass; |
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struct APICCommonState {
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SysBusDevice busdev; |
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MemoryRegion io_memory; |
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X86CPU *cpu; |
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uint32_t apicbase; |
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uint8_t id; |
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uint8_t arb_id; |
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uint8_t tpr; |
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uint32_t spurious_vec; |
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uint8_t log_dest; |
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uint8_t dest_mode; |
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uint32_t isr[8]; /* in service register */ |
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uint32_t tmr[8]; /* trigger mode register */ |
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uint32_t irr[8]; /* interrupt request register */ |
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uint32_t lvt[APIC_LVT_NB]; |
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uint32_t esr; /* error register */
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uint32_t icr[2];
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uint32_t divide_conf; |
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int count_shift;
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uint32_t initial_count; |
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int64_t initial_count_load_time; |
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int64_t next_time; |
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int idx;
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QEMUTimer *timer; |
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int64_t timer_expiry; |
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int sipi_vector;
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int wait_for_sipi;
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uint32_t vapic_control; |
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DeviceState *vapic; |
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hwaddr vapic_paddr; /* note: persistence via kvmvapic */
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}; |
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typedef struct VAPICState { |
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uint8_t tpr; |
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uint8_t isr; |
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uint8_t zero; |
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uint8_t irr; |
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uint8_t enabled; |
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} QEMU_PACKED VAPICState; |
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extern bool apic_report_tpr_access; |
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void apic_report_irq_delivered(int delivered); |
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bool apic_next_timer(APICCommonState *s, int64_t current_time);
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void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); |
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void apic_enable_vapic(DeviceState *d, hwaddr paddr);
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void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip,
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TPRAccess access); |
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#endif /* !QEMU_APIC_INTERNAL_H */ |