Revision 0eaef5aa target-mips/cpu.h
| b/target-mips/cpu.h | ||
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uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */ |
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int insn_flags; /* Supported instruction set */ |
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#ifdef CONFIG_USER_ONLY |
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target_ulong tls_value; |
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#endif |
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target_ulong tls_value; /* For usermode emulation */ |
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CPU_COMMON |
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const mips_def_t *cpu_model; |
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#ifndef CONFIG_USER_ONLY |
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void *irq[8]; |
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#endif |
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struct QEMUTimer *timer; /* Internal timer */ |
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}; |
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|
| ... | ... | |
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return env->hflags & MIPS_HFLAG_KSU; |
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} |
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#if defined(CONFIG_USER_ONLY) |
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static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) |
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{
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if (newsp) |
| ... | ... | |
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env->active_tc.gpr[7] = 0; |
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env->active_tc.gpr[2] = 0; |
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} |
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#endif |
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#include "cpu-all.h" |
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