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/*
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 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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 *
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 * Copyright (c) 2004-2007 Fabrice Bellard
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 * Copyright (c) 2007 Jocelyn Mayer
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "hw.h"
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#include "ppc.h"
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#include "ppc_mac.h"
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#include "mac_dbdma.h"
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#include "nvram.h"
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#include "pc.h"
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#include "pci.h"
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#include "usb-ohci.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#include "fw_cfg.h"
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#include "escc.h"
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#include "openpic.h"
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#include "ide.h"
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#include "loader.h"
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#include "elf.h"
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#include "kvm.h"
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#define MAX_IDE_BUS 2
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#define VGA_BIOS_SIZE 65536
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#define CFG_ADDR 0xf0000510
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/* debug UniNorth */
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//#define DEBUG_UNIN
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#ifdef DEBUG_UNIN
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#define UNIN_DPRINTF(fmt, ...)                                  \
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    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define UNIN_DPRINTF(fmt, ...)
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#endif
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/* UniN device */
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static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
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}
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static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
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{
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    uint32_t value;
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    value = 0;
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    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
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    return value;
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}
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static CPUWriteMemoryFunc * const unin_write[] = {
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    &unin_writel,
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    &unin_writel,
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    &unin_writel,
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};
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static CPUReadMemoryFunc * const unin_read[] = {
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    &unin_readl,
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    &unin_readl,
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    &unin_readl,
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};
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static int fw_cfg_boot_set(void *opaque, const char *boot_device)
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{
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    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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    return 0;
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}
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/* PowerPC Mac99 hardware initialisation */
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static void ppc_core99_init (ram_addr_t ram_size,
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                             const char *boot_device,
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                             const char *kernel_filename,
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                             const char *kernel_cmdline,
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                             const char *initrd_filename,
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                             const char *cpu_model)
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{
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    CPUState *env = NULL, *envs[MAX_CPUS];
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    char *filename;
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    qemu_irq *pic, **openpic_irqs;
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    int unin_memory;
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    int linux_boot, i;
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    ram_addr_t ram_offset, bios_offset, vga_bios_offset;
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    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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    PCIBus *pci_bus;
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    MacIONVRAMState *nvr;
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    int nvram_mem_index;
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    int vga_bios_size, bios_size;
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    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
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    int ppc_boot_device;
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    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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    void *fw_cfg;
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    void *dbdma;
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    uint8_t *vga_bios_ptr;
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    int machine_arch;
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    linux_boot = (kernel_filename != NULL);
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    /* init CPUs */
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    if (cpu_model == NULL)
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#ifdef TARGET_PPC64
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        cpu_model = "970fx";
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#else
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        cpu_model = "G4";
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#endif
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    for (i = 0; i < smp_cpus; i++) {
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        env = cpu_init(cpu_model);
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        if (!env) {
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            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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            exit(1);
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        }
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        /* Set time-base frequency to 100 Mhz */
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        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
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#if 0
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        env->osi_call = vga_osi_call;
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#endif
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        qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
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        envs[i] = env;
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    }
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    /* Make sure all register sets take effect */
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    cpu_synchronize_state(env);
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    /* allocate RAM */
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    ram_offset = qemu_ram_alloc(ram_size);
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    cpu_register_physical_memory(0, ram_size, ram_offset);
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    /* allocate and load BIOS */
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    bios_offset = qemu_ram_alloc(BIOS_SIZE);
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    if (bios_name == NULL)
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        bios_name = PROM_FILENAME;
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    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
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    /* Load OpenBIOS (ELF) */
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    if (filename) {
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        bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
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        qemu_free(filename);
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    } else {
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        bios_size = -1;
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    }
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    if (bios_size < 0 || bios_size > BIOS_SIZE) {
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        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
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        exit(1);
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    }
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    /* allocate and load VGA BIOS */
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    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
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    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
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    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
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    if (filename) {
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        vga_bios_size = load_image(filename, vga_bios_ptr + 8);
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        qemu_free(filename);
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    } else {
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        vga_bios_size = -1;
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    }
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    if (vga_bios_size < 0) {
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        /* if no bios is present, we can still work */
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        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
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                VGABIOS_FILENAME);
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        vga_bios_size = 0;
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    } else {
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        /* set a specific header (XXX: find real Apple format for NDRV
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           drivers) */
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        vga_bios_ptr[0] = 'N';
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        vga_bios_ptr[1] = 'D';
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        vga_bios_ptr[2] = 'R';
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        vga_bios_ptr[3] = 'V';
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        cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
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        vga_bios_size += 8;
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        /* Round to page boundary */
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        vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
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            TARGET_PAGE_MASK;
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    }
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    if (linux_boot) {
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        uint64_t lowaddr = 0;
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        int bswap_needed;
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#ifdef BSWAP_NEEDED
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        bswap_needed = 1;
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#else
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        bswap_needed = 0;
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#endif
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        kernel_base = KERNEL_LOAD_ADDR;
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        /* Now we can load the kernel. The first step tries to load the kernel
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           supposing PhysAddr = 0x00000000. If that was wrong the kernel is
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           loaded again, the new PhysAddr being computed from lowaddr. */
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        kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
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                               1, ELF_MACHINE, 0);
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        if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
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            kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
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                                   NULL, NULL, NULL, 1, ELF_MACHINE, 0);
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        }
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        if (kernel_size < 0)
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            kernel_size = load_aout(kernel_filename, kernel_base,
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                                    ram_size - kernel_base, bswap_needed,
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                                    TARGET_PAGE_SIZE);
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        if (kernel_size < 0)
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            kernel_size = load_image_targphys(kernel_filename,
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                                              kernel_base,
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                                              ram_size - kernel_base);
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        if (kernel_size < 0) {
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            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
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            exit(1);
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        }
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        /* load initrd */
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        if (initrd_filename) {
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            initrd_base = INITRD_LOAD_ADDR;
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            initrd_size = load_image_targphys(initrd_filename, initrd_base,
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                                              ram_size - initrd_base);
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            if (initrd_size < 0) {
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                hw_error("qemu: could not load initial ram disk '%s'\n",
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                         initrd_filename);
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                exit(1);
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            }
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        } else {
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            initrd_base = 0;
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            initrd_size = 0;
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        }
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        ppc_boot_device = 'm';
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    } else {
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        kernel_base = 0;
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        kernel_size = 0;
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        initrd_base = 0;
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        initrd_size = 0;
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        ppc_boot_device = '\0';
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        /* We consider that NewWorld PowerMac never have any floppy drive
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         * For now, OHW cannot boot from the network.
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         */
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        for (i = 0; boot_device[i] != '\0'; i++) {
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            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
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                ppc_boot_device = boot_device[i];
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                break;
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            }
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        }
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        if (ppc_boot_device == '\0') {
263
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
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            exit(1);
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        }
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    }
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    isa_mem_base = 0x80000000;
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    /* Register 8 MB of ISA IO space */
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    isa_mmio_init(0xf2000000, 0x00800000);
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    /* UniN init */
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    unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
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    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
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    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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    openpic_irqs[0] =
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        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
280
    for (i = 0; i < smp_cpus; i++) {
281
        /* Mac99 IRQ connection between OpenPIC outputs pins
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         * and PowerPC input pins
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         */
284
        switch (PPC_INPUT(env)) {
285
        case PPC_FLAGS_INPUT_6xx:
286
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
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            /* Not connected ? */
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            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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            /* Check this */
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            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
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            break;
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#if defined(TARGET_PPC64)
300
        case PPC_FLAGS_INPUT_970:
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            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
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            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
308
            /* Not connected ? */
309
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
310
            /* Check this */
311
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
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                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
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            break;
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#endif /* defined(TARGET_PPC64) */
315
        default:
316
            hw_error("Bus model not supported on mac99 machine\n");
317
            exit(1);
318
        }
319
    }
320
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
321
    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
322
        /* 970 gets a U3 bus */
323
        pci_bus = pci_pmac_u3_init(pic);
324
        machine_arch = ARCH_MAC99_U3;
325
    } else {
326
        pci_bus = pci_pmac_init(pic);
327
        machine_arch = ARCH_MAC99;
328
    }
329
    /* init basic PC hardware */
330
    pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
331

    
332
    escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
333
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
334

    
335
    for(i = 0; i < nb_nics; i++)
336
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
337

    
338
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
339
        fprintf(stderr, "qemu: too many IDE bus\n");
340
        exit(1);
341
    }
342
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
343
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
344
    }
345
    dbdma = DBDMA_init(&dbdma_mem_index);
346
    pci_cmd646_ide_init(pci_bus, hd, 0);
347

    
348
    /* cuda also initialize ADB */
349
    cuda_init(&cuda_mem_index, pic[0x19]);
350

    
351
    adb_kbd_init(&adb_bus);
352
    adb_mouse_init(&adb_bus);
353

    
354

    
355
    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
356
               dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
357
               escc_mem_index);
358

    
359
    if (usb_enabled) {
360
        usb_ohci_init_pci(pci_bus, -1);
361
    }
362

    
363
    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
364
        graphic_depth = 15;
365

    
366
    /* The NewWorld NVRAM is not located in the MacIO device */
367
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
368
    pmac_format_nvram_partition(nvr, 0x2000);
369
    macio_nvram_map(nvr, 0xFFF04000);
370
    /* No PCI init: the BIOS will do it */
371

    
372
    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
373
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
374
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
375
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
376
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
377
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
378
    if (kernel_cmdline) {
379
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
380
        pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
381
    } else {
382
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
383
    }
384
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
385
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
386
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
387

    
388
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
389
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
390
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
391

    
392
    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
393
}
394

    
395
static QEMUMachine core99_machine = {
396
    .name = "mac99",
397
    .desc = "Mac99 based PowerMAC",
398
    .init = ppc_core99_init,
399
    .max_cpus = MAX_CPUS,
400
#ifdef TARGET_PPC64
401
    .is_default = 1,
402
#endif
403
};
404

    
405
static void core99_machine_init(void)
406
{
407
    qemu_register_machine(&core99_machine);
408
}
409

    
410
machine_init(core99_machine_init);