Revision 10c4c98a hw/pci.c
| b/hw/pci.c | ||
|---|---|---|
| 45 | 45 |
/* The bus IRQ state is the logical OR of the connected devices. |
| 46 | 46 |
Keep a count of the number of devices with raised IRQs. */ |
| 47 | 47 |
int nirq; |
| 48 |
int irq_count[]; |
|
| 48 |
int *irq_count; |
|
| 49 |
}; |
|
| 50 |
|
|
| 51 |
static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent); |
|
| 52 |
|
|
| 53 |
static struct BusInfo pci_bus_info = {
|
|
| 54 |
.name = "PCI", |
|
| 55 |
.size = sizeof(PCIBus), |
|
| 56 |
.print_dev = pcibus_dev_print, |
|
| 49 | 57 |
}; |
| 50 | 58 |
|
| 51 | 59 |
static void pci_update_mappings(PCIDevice *d); |
| ... | ... | |
| 109 | 117 |
PCIBus *bus; |
| 110 | 118 |
static int nbus = 0; |
| 111 | 119 |
|
| 112 |
bus = FROM_QBUS(PCIBus, qbus_create(BUS_TYPE_PCI, |
|
| 113 |
sizeof(PCIBus) + (nirq * sizeof(int)), |
|
| 114 |
parent, name)); |
|
| 120 |
bus = FROM_QBUS(PCIBus, qbus_create(&pci_bus_info, parent, name)); |
|
| 115 | 121 |
bus->set_irq = set_irq; |
| 116 | 122 |
bus->map_irq = map_irq; |
| 117 | 123 |
bus->irq_opaque = pic; |
| 118 | 124 |
bus->devfn_min = devfn_min; |
| 119 | 125 |
bus->nirq = nirq; |
| 126 |
bus->irq_count = qemu_malloc(nirq * sizeof(bus->irq_count[0])); |
|
| 120 | 127 |
bus->next = first_bus; |
| 121 | 128 |
first_bus = bus; |
| 122 | 129 |
register_savevm("PCIBUS", nbus++, 1, pcibus_save, pcibus_load, bus);
|
| ... | ... | |
| 892 | 899 |
void pci_qdev_register(PCIDeviceInfo *info) |
| 893 | 900 |
{
|
| 894 | 901 |
info->qdev.init = pci_qdev_init; |
| 895 |
info->qdev.bus_type = BUS_TYPE_PCI;
|
|
| 902 |
info->qdev.bus_info = &pci_bus_info;
|
|
| 896 | 903 |
qdev_register(&info->qdev); |
| 897 | 904 |
} |
| 898 | 905 |
|
| ... | ... | |
| 991 | 998 |
{
|
| 992 | 999 |
return pci_find_capability_list(pdev, cap_id, NULL); |
| 993 | 1000 |
} |
| 1001 |
|
|
| 1002 |
static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent) |
|
| 1003 |
{
|
|
| 1004 |
PCIDevice *d = (PCIDevice *)dev; |
|
| 1005 |
const pci_class_desc *desc; |
|
| 1006 |
char ctxt[64]; |
|
| 1007 |
PCIIORegion *r; |
|
| 1008 |
int i, class; |
|
| 1009 |
|
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| 1010 |
class = le16_to_cpu(*((uint16_t *)(d->config + PCI_CLASS_DEVICE))); |
|
| 1011 |
desc = pci_class_descriptions; |
|
| 1012 |
while (desc->desc && class != desc->class) |
|
| 1013 |
desc++; |
|
| 1014 |
if (desc->desc) {
|
|
| 1015 |
snprintf(ctxt, sizeof(ctxt), "%s", desc->desc); |
|
| 1016 |
} else {
|
|
| 1017 |
snprintf(ctxt, sizeof(ctxt), "Class %04x", class); |
|
| 1018 |
} |
|
| 1019 |
|
|
| 1020 |
monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, " |
|
| 1021 |
"pci id %04x:%04x (sub %04x:%04x)\n", |
|
| 1022 |
indent, "", ctxt, |
|
| 1023 |
d->bus->bus_num, d->devfn >> 3, d->devfn & 7, |
|
| 1024 |
le16_to_cpu(*((uint16_t *)(d->config + PCI_VENDOR_ID))), |
|
| 1025 |
le16_to_cpu(*((uint16_t *)(d->config + PCI_DEVICE_ID))), |
|
| 1026 |
le16_to_cpu(*((uint16_t *)(d->config + PCI_SUBSYSTEM_VENDOR_ID))), |
|
| 1027 |
le16_to_cpu(*((uint16_t *)(d->config + PCI_SUBSYSTEM_ID)))); |
|
| 1028 |
for (i = 0; i < PCI_NUM_REGIONS; i++) {
|
|
| 1029 |
r = &d->io_regions[i]; |
|
| 1030 |
if (!r->size) |
|
| 1031 |
continue; |
|
| 1032 |
monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "", |
|
| 1033 |
i, r->type & PCI_ADDRESS_SPACE_IO ? "i/o" : "mem", |
|
| 1034 |
r->addr, r->addr + r->size - 1); |
|
| 1035 |
} |
|
| 1036 |
} |
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