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root / target-mips @ 10eb0cc0

Name Size
TODO 1.9 kB
cpu.h 18 kB
exec.h 2.6 kB
helper.c 20.9 kB
helper.h 8.6 kB
machine.c 10.6 kB
mips-defs.h 2.1 kB
op_helper.c 96.3 kB
translate.c 351 kB
translate_init.c 22.5 kB

Latest revisions

# Date Author Comment
10eb0cc0 07/03/2010 09:48 am Paolo Bonzini

move cpu_pc_from_tb to target-*/exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

83dae095 07/03/2010 09:47 am Paolo Bonzini

remove unused stuff from */exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

afa88c3a 07/02/2010 12:45 am Aurelien Jarno

target-mips: add Loongson support prefetch

Loongson CPU uses a load to zero register for prefetch.
Emulate it as a NOP.

Signed-off-by: Aurelien Jarno <>

5c13fdfd 07/01/2010 08:48 am Aurelien Jarno

target-mips: split load and store

Signed-off-by: Aurelien Jarno <>

6fbab869 06/30/2010 09:00 pm Aurelien Jarno

target-mips: fix DINSU instruction

Signed-off-by: Aurelien Jarno <>

aa8f4009 06/30/2010 12:26 am Aurelien Jarno

target-mips: enable movn/movz on loongson 2E & 2F

Signed-off-by: Aurelien Jarno <>

5bc6fba8 06/30/2010 12:07 am Huacai Chen

MIPS: Initial support of fulong mini pc (CPU definition)

Signed-off-by: Huacai Chen <>
Signed-off-by: Aurelien Jarno <>

33087598 06/10/2010 12:37 am Stefan Weil

target-mips: Fix compilation

TCGv t1 needs tcg_temp_free instead of tcg_temp_free_i32.

Cc: Nathan Froyd <>
Cc: Aurelien Jarno <>
Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

bbfa8f72 06/09/2010 05:10 pm Nathan Froyd

target-mips: add microMIPS exception handler support

Unlike MIPS16, microMIPS lets you choose the ISA mode for your exception
handlers. The ISA mode is selectable via a user-writable CP0.Config3
flag.

Signed-off-by: Nathan Froyd <>...

3c824109 06/09/2010 05:10 pm Nathan Froyd

target-mips: microMIPS ASE support

Add instruction decoding for the microMIPS ASE. All we do is decode and
then forward to the existing gen_* routines.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

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