Revision 1497c961 target-arm/translate.c

b/target-arm/translate.c
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#include "exec-all.h"
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#include "disas.h"
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#include "tcg-op.h"
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#define GEN_HELPER 1
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#include "helpers.h"
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#define ENABLE_ARCH_5J    0
......
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#define gen_sxtb(var) tcg_gen_ext8s_i32(var, var)
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#define gen_sxth(var) tcg_gen_ext16s_i32(var, var)
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#define HELPER_ADDR(x) helper_##x
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#define gen_sxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(sxtb16), var, var)
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#define gen_uxtb16(var) tcg_gen_helper_1_1(HELPER_ADDR(uxtb16), var, var)
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#define gen_sxtb16(var) gen_helper_sxtb16(var, var)
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#define gen_uxtb16(var) gen_helper_uxtb16(var, var)
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#define gen_op_clz_T0(var) \
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    tcg_gen_helper_1_1(HELPER_ADDR(clz), cpu_T[0], cpu_T[0])
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#define gen_op_addl_T0_T1_setq() \
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    gen_helper_add_setq(cpu_T[0], cpu_T[0], cpu_T[1])
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#define gen_op_addl_T0_T1_saturate() \
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    gen_helper_add_saturate(cpu_T[0], cpu_T[0], cpu_T[1])
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#define gen_op_subl_T0_T1_saturate() \
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    gen_helper_sub_saturate(cpu_T[0], cpu_T[0], cpu_T[1])
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#define gen_op_addl_T0_T1_usaturate() \
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    gen_helper_add_usaturate(cpu_T[0], cpu_T[0], cpu_T[1])
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#define gen_op_subl_T0_T1_usaturate() \
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    gen_helper_sub_usaturate(cpu_T[0], cpu_T[0], cpu_T[1])
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/* Dual 16-bit add.  Result placed in t0 and t1 is marked as dead.
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    tmp = (t0 ^ t1) & 0x8000;
......
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                            switch (size) {
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                            case 0: gen_op_neon_clz_u8(); break;
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                            case 1: gen_op_neon_clz_u16(); break;
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                            case 2: gen_op_clz_T0(); break;
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                            case 2: gen_helper_clz(cpu_T[0], cpu_T[0]); break;
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                            default: return 1;
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                            }
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                            break;
......
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            } else if (op1 == 3) {
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                /* clz */
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                rd = (insn >> 12) & 0xf;
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                gen_movl_T0_reg(s, rm);
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                gen_op_clz_T0();
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                gen_movl_reg_T0(s, rd);
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                tmp = load_reg(s, rm);
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                gen_helper_clz(tmp, tmp);
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                store_reg(s, rd, tmp);
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            } else {
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                goto illegal_op;
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            }
......
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            gen_movl_T0_reg(s, rm);
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            gen_movl_T1_reg(s, rn);
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            if (op1 & 2)
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                gen_op_double_T1_saturate();
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                gen_helper_double_saturate(cpu_T[1], cpu_T[1]);
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            if (op1 & 1)
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                gen_op_subl_T0_T1_saturate();
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            else
......
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                gen_movl_T0_reg(s, rm);
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                gen_movl_T1_reg(s, rn);
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                if (op & 2)
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                    gen_op_double_T1_saturate();
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                    gen_helper_double_saturate(cpu_T[1], cpu_T[1]);
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                if (op & 1)
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                    gen_op_subl_T0_T1_saturate();
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                else
......
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                    gen_op_sel_T0_T1();
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                    break;
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                case 0x18: /* clz */
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                    gen_op_clz_T0();
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                    gen_helper_clz(cpu_T[0], cpu_T[0]);
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                    break;
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                default:
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                    goto illegal_op;

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