Archipelago » qemu

/*

 *  PowerPC emulation micro-operations for qemu.

 * 

 *  Copyright (c) 2003-2007 Jocelyn Mayer

 *

 * This library is free software; you can redistribute it and/or

 * modify it under the terms of the GNU Lesser General Public

 * License as published by the Free Software Foundation; either

 * version 2 of the License, or (at your option) any later version.

 *

 * This library is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * Lesser General Public License for more details.

 *

 * You should have received a copy of the GNU Lesser General Public

 * License along with this library; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

//#define DEBUG_OP

#include "config.h"

#include "exec.h"

#include "op_helper.h"

/* XXX: this is to be suppressed */

#define regs (env)

#define FT0 (env->ft0)

#define FT1 (env->ft1)

#define FT2 (env->ft2)

/* XXX: this is to be suppressed... */

#define PPC_OP(name) void OPPROTO glue(op_, name)(void)

#define REG 0

#include "op_template.h"

#define REG 1

#include "op_template.h"

#define REG 2

#include "op_template.h"

#define REG 3

#include "op_template.h"

#define REG 4

#include "op_template.h"

#define REG 5

#include "op_template.h"

#define REG 6

#include "op_template.h"

#define REG 7

#include "op_template.h"

#define REG 8

#include "op_template.h"

#define REG 9

#include "op_template.h"

#define REG 10

#include "op_template.h"

#define REG 11

#include "op_template.h"

#define REG 12

#include "op_template.h"

#define REG 13

#include "op_template.h"

#define REG 14

#include "op_template.h"

#define REG 15

#include "op_template.h"

#define REG 16

#include "op_template.h"

#define REG 17

#include "op_template.h"

#define REG 18

#include "op_template.h"

#define REG 19

#include "op_template.h"

#define REG 20

#include "op_template.h"

#define REG 21

#include "op_template.h"

#define REG 22

#include "op_template.h"

#define REG 23

#include "op_template.h"

#define REG 24

#include "op_template.h"

#define REG 25

#include "op_template.h"

#define REG 26

#include "op_template.h"

#define REG 27

#include "op_template.h"

#define REG 28

#include "op_template.h"

#define REG 29

#include "op_template.h"

#define REG 30

#include "op_template.h"

#define REG 31

#include "op_template.h"

/* PowerPC state maintenance operations */

/* set_Rc0 */

PPC_OP(set_Rc0)

{

    env->crf[0] = T0 | xer_ov;

    RETURN();

}

/* Set Rc1 (for floating point arithmetic) */

PPC_OP(set_Rc1)

{

    env->crf[1] = regs->fpscr[7];

    RETURN();

}

/* Constants load */

void OPPROTO op_reset_T0 (void)

{

    T0 = 0;

    RETURN();

}

PPC_OP(set_T0)

{

    T0 = (uint32_t)PARAM1;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_set_T0_64 (void)

{

    T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;

    RETURN();

}

#endif

PPC_OP(set_T1)

{

    T1 = (uint32_t)PARAM1;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_set_T1_64 (void)

{

    T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;

    RETURN();

}

#endif

#if 0 // unused

PPC_OP(set_T2)

{

    T2 = PARAM(1);

    RETURN();

}

#endif

void OPPROTO op_move_T1_T0 (void)

{

    T1 = T0;

    RETURN();

}

void OPPROTO op_move_T2_T0 (void)

{

    T2 = T0;

    RETURN();

}

/* Generate exceptions */

PPC_OP(raise_exception_err)

{

    do_raise_exception_err(PARAM(1), PARAM(2));

}

PPC_OP(update_nip)

{

    env->nip = (uint32_t)PARAM1;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_update_nip_64 (void)

{

    env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;

    RETURN();

}

#endif

PPC_OP(debug)

{

    do_raise_exception(EXCP_DEBUG);

}

PPC_OP(exit_tb)

{

    EXIT_TB();

}

/* Load/store special registers */

PPC_OP(load_cr)

{

    do_load_cr();

    RETURN();

}

PPC_OP(store_cr)

{

    do_store_cr(PARAM(1));

    RETURN();

}

void OPPROTO op_load_cro (void)

{

    T0 = env->crf[PARAM1];

    RETURN();

}

void OPPROTO op_store_cro (void)

{

    env->crf[PARAM1] = T0;

    RETURN();

}

PPC_OP(load_xer_cr)

{

    T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1);

    RETURN();

}

PPC_OP(clear_xer_cr)

{

    xer_so = 0;

    xer_ov = 0;

    xer_ca = 0;

    RETURN();

}

PPC_OP(load_xer_bc)

{

    T1 = xer_bc;

    RETURN();

}

void OPPROTO op_store_xer_bc (void)

{

    xer_bc = T0;

    RETURN();

}

PPC_OP(load_xer)

{

    do_load_xer();

    RETURN();

}

PPC_OP(store_xer)

{

    do_store_xer();

    RETURN();

}

#if !defined(CONFIG_USER_ONLY)

/* Segment registers load and store */

PPC_OP(load_sr)

{

    T0 = regs->sr[T1];

    RETURN();

}

PPC_OP(store_sr)

{

    do_store_sr(env, T1, T0);

    RETURN();

}

PPC_OP(load_sdr1)

{

    T0 = regs->sdr1;

    RETURN();

}

PPC_OP(store_sdr1)

{

    do_store_sdr1(env, T0);

    RETURN();

}

#if defined (TARGET_PPC64)

void OPPROTO op_load_asr (void)

{

    T0 = env->asr;

    RETURN();

}

void OPPROTO op_store_asr (void)

{

    ppc_store_asr(env, T0);

    RETURN();

}

#endif

PPC_OP(load_msr)

{

    T0 = do_load_msr(env);

    RETURN();

}

PPC_OP(store_msr)

{

    do_store_msr(env, T0);

    RETURN();

}

#if defined (TARGET_PPC64)

void OPPROTO op_store_msr_32 (void)

{

    ppc_store_msr_32(env, T0);

    RETURN();

}

#endif

#endif

/* SPR */

PPC_OP(load_spr)

{

    T0 = regs->spr[PARAM(1)];

    RETURN();

}

PPC_OP(store_spr)

{

    regs->spr[PARAM(1)] = T0;

    RETURN();

}

PPC_OP(load_lr)

{

    T0 = regs->lr;

    RETURN();

}

PPC_OP(store_lr)

{

    regs->lr = T0;

    RETURN();

}

PPC_OP(load_ctr)

{

    T0 = regs->ctr;

    RETURN();

}

PPC_OP(store_ctr)

{

    regs->ctr = T0;

    RETURN();

}

PPC_OP(load_tbl)

{

    T0 = cpu_ppc_load_tbl(regs);

    RETURN();

}

PPC_OP(load_tbu)

{

    T0 = cpu_ppc_load_tbu(regs);

    RETURN();

}

#if !defined(CONFIG_USER_ONLY)

PPC_OP(store_tbl)

{

    cpu_ppc_store_tbl(regs, T0);

    RETURN();

}

PPC_OP(store_tbu)

{

    cpu_ppc_store_tbu(regs, T0);

    RETURN();

}

PPC_OP(load_decr)

{

    T0 = cpu_ppc_load_decr(regs);

    RETURN();

}

PPC_OP(store_decr)

{

    cpu_ppc_store_decr(regs, T0);

    RETURN();

}

PPC_OP(load_ibat)

{

    T0 = regs->IBAT[PARAM(1)][PARAM(2)];

    RETURN();

}

void OPPROTO op_store_ibatu (void)

{

    do_store_ibatu(env, PARAM1, T0);

    RETURN();

}

void OPPROTO op_store_ibatl (void)

{

#if 1

    env->IBAT[1][PARAM1] = T0;

#else

    do_store_ibatl(env, PARAM1, T0);

#endif

    RETURN();

}

PPC_OP(load_dbat)

{

    T0 = regs->DBAT[PARAM(1)][PARAM(2)];

    RETURN();

}

void OPPROTO op_store_dbatu (void)

{

    do_store_dbatu(env, PARAM1, T0);

    RETURN();

}

void OPPROTO op_store_dbatl (void)

{

#if 1

    env->DBAT[1][PARAM1] = T0;

#else

    do_store_dbatl(env, PARAM1, T0);

#endif

    RETURN();

}

#endif /* !defined(CONFIG_USER_ONLY) */

/* FPSCR */

PPC_OP(load_fpscr)

{

    do_load_fpscr();

    RETURN();

}

PPC_OP(store_fpscr)

{

    do_store_fpscr(PARAM1);

    RETURN();

}

PPC_OP(reset_scrfx)

{

    regs->fpscr[7] &= ~0x8;

    RETURN();

}

/* crf operations */

PPC_OP(getbit_T0)

{

    T0 = (T0 >> PARAM(1)) & 1;

    RETURN();

}

PPC_OP(getbit_T1)

{

    T1 = (T1 >> PARAM(1)) & 1;

    RETURN();

}

PPC_OP(setcrfbit)

{

    T1 = (T1 & PARAM(1)) | (T0 << PARAM(2));

    RETURN();

}

/* Branch */

#define EIP regs->nip

PPC_OP(setlr)

{

    regs->lr = (uint32_t)PARAM1;

    RETURN();

}

#if defined (TARGET_PPC64)

void OPPROTO op_setlr_64 (void)

{

    regs->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;

    RETURN();

}

#endif

PPC_OP(goto_tb0)

{

    GOTO_TB(op_goto_tb0, PARAM1, 0);

}

PPC_OP(goto_tb1)

{

    GOTO_TB(op_goto_tb1, PARAM1, 1);

}

void OPPROTO op_b_T1 (void)

{

    regs->nip = (uint32_t)(T1 & ~3);

    RETURN();

}

#if defined (TARGET_PPC64)

void OPPROTO op_b_T1_64 (void)

{

    regs->nip = (uint64_t)(T1 & ~3);

    RETURN();

}

#endif

PPC_OP(jz_T0)

{

    if (!T0)

        GOTO_LABEL_PARAM(1);

    RETURN();

}

void OPPROTO op_btest_T1 (void)

{

    if (T0) {

        regs->nip = (uint32_t)(T1 & ~3);

    } else {

        regs->nip = (uint32_t)PARAM1;

    }

    RETURN();

}

#if defined (TARGET_PPC64)

void OPPROTO op_btest_T1_64 (void)

{

    if (T0) {

        regs->nip = (uint64_t)(T1 & ~3);

    } else {

        regs->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2;

    }

    RETURN();

}

#endif

PPC_OP(movl_T1_ctr)

{

    T1 = regs->ctr;

    RETURN();

}

PPC_OP(movl_T1_lr)

{

    T1 = regs->lr;

    RETURN();

}

/* tests with result in T0 */

void OPPROTO op_test_ctr (void)

{

    T0 = (uint32_t)regs->ctr;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctr_64 (void)

{

    T0 = (uint64_t)regs->ctr;

    RETURN();

}

#endif

void OPPROTO op_test_ctr_true (void)

{

    T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) != 0);

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctr_true_64 (void)

{

    T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) != 0);

    RETURN();

}

#endif

void OPPROTO op_test_ctr_false (void)

{

    T0 = ((uint32_t)regs->ctr != 0 && (T0 & PARAM1) == 0);

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctr_false_64 (void)

{

    T0 = ((uint64_t)regs->ctr != 0 && (T0 & PARAM1) == 0);

    RETURN();

}

#endif

void OPPROTO op_test_ctrz (void)

{

    T0 = ((uint32_t)regs->ctr == 0);

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctrz_64 (void)

{

    T0 = ((uint64_t)regs->ctr == 0);

    RETURN();

}

#endif

void OPPROTO op_test_ctrz_true (void)

{

    T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) != 0);

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctrz_true_64 (void)

{

    T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) != 0);

    RETURN();

}

#endif

void OPPROTO op_test_ctrz_false (void)

{

    T0 = ((uint32_t)regs->ctr == 0 && (T0 & PARAM1) == 0);

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_test_ctrz_false_64 (void)

{

    T0 = ((uint64_t)regs->ctr == 0 && (T0 & PARAM1) == 0);

    RETURN();

}

#endif

PPC_OP(test_true)

{

    T0 = (T0 & PARAM(1));

    RETURN();

}

PPC_OP(test_false)

{

    T0 = ((T0 & PARAM(1)) == 0);

    RETURN();

}

/* CTR maintenance */

PPC_OP(dec_ctr)

{

    regs->ctr--;

    RETURN();

}

/***                           Integer arithmetic                          ***/

/* add */

PPC_OP(add)

{

    T0 += T1;

    RETURN();

}

void OPPROTO op_check_addo (void)

{

    if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) &

                 ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) {

        xer_ov = 0;

    } else {

        xer_so = 1;

        xer_ov = 1;

    }

}

#if defined(TARGET_PPC64)

void OPPROTO op_check_addo_64 (void)

{

    if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) &

                 ((uint64_t)T2 ^ (uint64_t)T0) & (1ULL << 63)))) {

        xer_ov = 0;

    } else {

        xer_so = 1;

        xer_ov = 1;

    }

}

#endif

/* add carrying */

void OPPROTO op_check_addc (void)

{

    if (likely((uint32_t)T0 >= (uint32_t)T2)) {

        xer_ca = 0;

    } else {

        xer_ca = 1;

    }

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_check_addc_64 (void)

{

    if (likely((uint64_t)T0 >= (uint64_t)T2)) {

        xer_ca = 0;

    } else {

        xer_ca = 1;

    }

    RETURN();

}

#endif

/* add extended */

void OPPROTO op_adde (void)

{

    do_adde();

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_adde_64 (void)

{

    do_adde_64();

    RETURN();

}

#endif

/* add immediate */

PPC_OP(addi)

{

    T0 += PARAM(1);

    RETURN();

}

/* add to minus one extended */

void OPPROTO op_add_me (void)

{

    T0 += xer_ca + (-1);

    if (likely((uint32_t)T1 != 0))

        xer_ca = 1;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_add_me_64 (void)

{

    T0 += xer_ca + (-1);

    if (likely((uint64_t)T1 != 0))

        xer_ca = 1;

    RETURN();

}

#endif

void OPPROTO op_addmeo (void)

{

    do_addmeo();

    RETURN();

}

void OPPROTO op_addmeo_64 (void)

{

    do_addmeo();

    RETURN();

}

/* add to zero extended */

void OPPROTO op_add_ze (void)

{

    T0 += xer_ca;

    RETURN();

}

/* divide word */

void OPPROTO op_divw (void)

{

    if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||

                 (int32_t)T1 == 0)) {

        T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31));

    } else {

        T0 = (int32_t)T0 / (int32_t)T1;

    }

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_divd (void)

{

    if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) ||

                 (int64_t)T1 == 0)) {

        T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63));

    } else {

        T0 = (int64_t)T0 / (int64_t)T1;

    }

    RETURN();

}

#endif

void OPPROTO op_divwo (void)

{

    do_divwo();

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_divdo (void)

{

    do_divdo();

    RETURN();

}

#endif

/* divide word unsigned */

void OPPROTO op_divwu (void)

{

    if (unlikely(T1 == 0)) {

        T0 = 0;

    } else {

        T0 = (uint32_t)T0 / (uint32_t)T1;

    }

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_divdu (void)

{

    if (unlikely(T1 == 0)) {

        T0 = 0;

    } else {

        T0 /= T1;

    }

    RETURN();

}

#endif

void OPPROTO op_divwuo (void)

{

    do_divwuo();

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_divduo (void)

{

    do_divduo();

    RETURN();

}

#endif

/* multiply high word */

void OPPROTO op_mulhw (void)

{

    T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_mulhd (void)

{

    uint64_t tl, th;

    do_imul64(&tl, &th);

    T0 = th;

    RETURN();

}

#endif

/* multiply high word unsigned */

void OPPROTO op_mulhwu (void)

{

    T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32;

    RETURN();

}

#if defined(TARGET_PPC64)

void OPPROTO op_mulhdu (void)

{

    uint64_t tl, th;

    do_mul64(&tl, &th);

    T0 = th;

    RETURN();

}

#endif

/* multiply low immediate */

PPC_OP(mulli)

{

    T0 = ((int32_t)T0 * (int32_t)PARAM1);