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root / target-arm @ 16f62432

Name Size
  nwfpe
cpu.h 2 kB
exec.h 1.3 kB
op.c 12.7 kB
op_template.h 1.2 kB
translate.c 23.3 kB

Latest revisions

# Date Author Comment
537730b9 02/22/2004 03:40 pm bellard

zero offset optimisation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@635 c046a42c-6fe2-441c-8c8c-71466251a162

3d57da2a 02/16/2004 11:47 pm bellard

suppressed dummy FPU ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@610 c046a42c-6fe2-441c-8c8c-71466251a162

00406dff 02/16/2004 11:43 pm bellard

added arm nwfpe support (initial patch by Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@609 c046a42c-6fe2-441c-8c8c-71466251a162

3cf1e035 01/24/2004 05:19 pm bellard

added TARGET_LONG_BITS

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@580 c046a42c-6fe2-441c-8c8c-71466251a162

a6b025d3 01/24/2004 05:18 pm bellard

added cpu_get_phys_page_debug()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@579 c046a42c-6fe2-441c-8c8c-71466251a162

bd497938 01/05/2004 02:06 am bellard

use generic GenOpFunc

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@543 c046a42c-6fe2-441c-8c8c-71466251a162

163a7cb6 11/30/2003 09:40 pm bellard

imull fix (suggested by Robert J. Harley)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@478 c046a42c-6fe2-441c-8c8c-71466251a162

2e134c9c 11/11/2003 03:55 pm bellard

64-bit multiplication fix (Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@446 c046a42c-6fe2-441c-8c8c-71466251a162

e748ba4f 11/04/2003 12:25 am bellard

ARM half word load/store fix (Ulrich Hecht)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@438 c046a42c-6fe2-441c-8c8c-71466251a162

2c0262af 09/30/2003 11:34 pm bellard

new directory structure

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@385 c046a42c-6fe2-441c-8c8c-71466251a162

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