Revision 171b31e7 target-mips/translate.c
b/target-mips/translate.c | ||
---|---|---|
1722 | 1722 |
case OPC_INS: |
1723 | 1723 |
if (lsb > msb) |
1724 | 1724 |
goto fail; |
1725 |
GEN_LOAD_REG_TN(T2, rt);
|
|
1725 |
GEN_LOAD_REG_TN(T0, rt);
|
|
1726 | 1726 |
gen_op_ins(lsb, msb - lsb + 1); |
1727 | 1727 |
break; |
1728 | 1728 |
case OPC_DINSM: |
1729 | 1729 |
if (lsb > msb) |
1730 | 1730 |
goto fail; |
1731 |
GEN_LOAD_REG_TN(T2, rt);
|
|
1731 |
GEN_LOAD_REG_TN(T0, rt);
|
|
1732 | 1732 |
gen_op_ins(lsb, msb - lsb + 1 + 32); |
1733 | 1733 |
break; |
1734 | 1734 |
case OPC_DINSU: |
1735 | 1735 |
if (lsb > msb) |
1736 | 1736 |
goto fail; |
1737 |
GEN_LOAD_REG_TN(T2, rt);
|
|
1737 |
GEN_LOAD_REG_TN(T0, rt);
|
|
1738 | 1738 |
gen_op_ins(lsb + 32, msb - lsb + 1); |
1739 | 1739 |
break; |
1740 | 1740 |
case OPC_DINS: |
1741 | 1741 |
if (lsb > msb) |
1742 | 1742 |
goto fail; |
1743 |
GEN_LOAD_REG_TN(T2, rt);
|
|
1743 |
GEN_LOAD_REG_TN(T0, rt);
|
|
1744 | 1744 |
gen_op_ins(lsb, msb - lsb + 1); |
1745 | 1745 |
break; |
1746 | 1746 |
default: |
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