Revision 1724f049

b/cpu-common.h
40 40
}
41 41

  
42 42
ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
43
ram_addr_t qemu_ram_alloc(ram_addr_t);
43
ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size);
44 44
void qemu_ram_free(ram_addr_t addr);
45 45
/* This should only be used for ram local to a device.  */
46 46
void *qemu_get_ram_ptr(ram_addr_t addr);
b/exec.c
2778 2778
    return last;
2779 2779
}
2780 2780

  
2781
ram_addr_t qemu_ram_alloc(ram_addr_t size)
2781
ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size)
2782 2782
{
2783 2783
    RAMBlock *new_block;
2784 2784

  
b/hw/an5206.c
54 54

  
55 55
    /* DRAM at address zero */
56 56
    cpu_register_physical_memory(0, ram_size,
57
        qemu_ram_alloc(ram_size) | IO_MEM_RAM);
57
        qemu_ram_alloc(NULL, "an5206.ram", ram_size) | IO_MEM_RAM);
58 58

  
59 59
    /* Internal SRAM.  */
60 60
    cpu_register_physical_memory(AN5206_RAMBAR_ADDR, 512,
61
        qemu_ram_alloc(512) | IO_MEM_RAM);
61
        qemu_ram_alloc(NULL, "an5206.sram", 512) | IO_MEM_RAM);
62 62

  
63 63
    mcf5206_init(AN5206_MBAR_ADDR, env);
64 64

  
b/hw/armv7m.c
200 200

  
201 201
    /* Flash programming is done via the SCU, so pretend it is ROM.  */
202 202
    cpu_register_physical_memory(0, flash_size,
203
                                 qemu_ram_alloc(flash_size) | IO_MEM_ROM);
203
                                 qemu_ram_alloc(NULL, "armv7m.flash",
204
                                                flash_size) | IO_MEM_ROM);
204 205
    cpu_register_physical_memory(0x20000000, sram_size,
205
                                 qemu_ram_alloc(sram_size) | IO_MEM_RAM);
206
                                 qemu_ram_alloc(NULL, "armv7m.sram",
207
                                                sram_size) | IO_MEM_RAM);
206 208
    armv7m_bitband_init();
207 209

  
208 210
    nvic = qdev_create(NULL, "armv7m_nvic");
......
236 238
       space.  This stops qemu complaining about executing code outside RAM
237 239
       when returning from an exception.  */
238 240
    cpu_register_physical_memory(0xfffff000, 0x1000,
239
                                 qemu_ram_alloc(0x1000) | IO_MEM_RAM);
241
                                 qemu_ram_alloc(NULL, "armv7m.hack", 
242
                                                0x1000) | IO_MEM_RAM);
240 243

  
241 244
    qemu_register_reset(armv7m_reset, env);
242 245
    return pic;
b/hw/axis_dev88.c
268 268
    env = cpu_init(cpu_model);
269 269

  
270 270
    /* allocate RAM */
271
    phys_ram = qemu_ram_alloc(ram_size);
271
    phys_ram = qemu_ram_alloc(NULL, "axisdev88.ram", ram_size);
272 272
    cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
273 273

  
274 274
    /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the 
275 275
       internal memory.  */
276
    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
276
    phys_intmem = qemu_ram_alloc(NULL, "axisdev88.chipram", INTMEM_SIZE);
277 277
    cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
278 278
                                 phys_intmem | IO_MEM_RAM);
279 279

  
b/hw/dummy_m68k.c
39 39

  
40 40
    /* RAM at address zero */
41 41
    cpu_register_physical_memory(0, ram_size,
42
        qemu_ram_alloc(ram_size) | IO_MEM_RAM);
42
        qemu_ram_alloc(NULL, "dummy_m68k.ram", ram_size) | IO_MEM_RAM);
43 43

  
44 44
    /* Load kernel.  */
45 45
    if (kernel_filename) {
b/hw/etraxfs.c
68 68
    env = cpu_init(cpu_model);
69 69

  
70 70
    /* allocate RAM */
71
    phys_ram = qemu_ram_alloc(ram_size);
71
    phys_ram = qemu_ram_alloc(NULL, "etraxfs.ram", ram_size);
72 72
    cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
73 73

  
74 74
    /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the 
75 75
       internal memory.  */
76
    phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
76
    phys_intmem = qemu_ram_alloc(NULL, "etraxfs.chipram", INTMEM_SIZE);
77 77
    cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
78 78
                                 phys_intmem | IO_MEM_RAM);
79 79

  
80 80

  
81
    phys_flash = qemu_ram_alloc(FLASH_SIZE);
81
    phys_flash = qemu_ram_alloc(NULL, "etraxfs.flash", FLASH_SIZE);
82 82
    dinfo = drive_get(IF_PFLASH, 0, 0);
83 83
    pflash_cfi02_register(0x0, phys_flash,
84 84
                          dinfo ? dinfo->bdrv : NULL, (64 * 1024),
b/hw/g364fb.c
593 593
    s = qemu_mallocz(sizeof(G364State));
594 594

  
595 595
    s->vram_size = 8 * 1024 * 1024;
596
    s->vram_offset = qemu_ram_alloc(s->vram_size);
596
    s->vram_offset = qemu_ram_alloc(NULL, "g364fb.vram", s->vram_size);
597 597
    s->vram = qemu_get_ram_ptr(s->vram_offset);
598 598
    s->irq = irq;
599 599

  
b/hw/gumstix.c
67 67
#else
68 68
    be = 0;
69 69
#endif
70
    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom),
70
    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "connext.rom",
71
                                                          connex_rom),
71 72
                               dinfo->bdrv, sector_len, connex_rom / sector_len,
72 73
                               2, 0, 0, 0, 0, be)) {
73 74
        fprintf(stderr, "qemu: Error registering flash memory.\n");
......
105 106
#else
106 107
    be = 0;
107 108
#endif
108
    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom),
109
    if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "verdex.rom",
110
                                                          verdex_rom),
109 111
                               dinfo->bdrv, sector_len, verdex_rom / sector_len,
110 112
                               2, 0, 0, 0, 0, be)) {
111 113
        fprintf(stderr, "qemu: Error registering flash memory.\n");
b/hw/ide/via.c
157 157
    pci_register_bar((PCIDevice *)d, 4, 0x10,
158 158
                           PCI_BASE_ADDRESS_SPACE_IO, bmdma_map);
159 159

  
160
    vmstate_register(0, &vmstate_ide_pci, d);
160
    vmstate_register(&dev->qdev, 0, &vmstate_ide_pci, d);
161 161

  
162 162
    ide_bus_new(&d->bus[0], &d->dev.qdev);
163 163
    ide_bus_new(&d->bus[1], &d->dev.qdev);
b/hw/integratorcp.c
253 253
    }
254 254
    memcpy(integrator_spd + 73, "QEMU-MEMORY", 11);
255 255
    s->cm_init = 0x00000112;
256
    s->flash_offset = qemu_ram_alloc(0x100000);
256
    s->flash_offset = qemu_ram_alloc(NULL, "integrator.flash", 0x100000);
257 257

  
258 258
    iomemtype = cpu_register_io_memory(integratorcm_readfn,
259 259
                                       integratorcm_writefn, s);
......
467 467
        fprintf(stderr, "Unable to find CPU definition\n");
468 468
        exit(1);
469 469
    }
470
    ram_offset = qemu_ram_alloc(ram_size);
470
    ram_offset = qemu_ram_alloc(NULL, "integrator.ram", ram_size);
471 471
    /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash.  */
472 472
    /* ??? RAM should repeat to fill physical memory space.  */
473 473
    /* SDRAM at address zero*/
b/hw/mainstone.c
87 87
    /* Setup CPU & memory */
88 88
    cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
89 89
    cpu_register_physical_memory(0, MAINSTONE_ROM,
90
                    qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM);
90
                    qemu_ram_alloc(NULL, "mainstone.rom",
91
                                   MAINSTONE_ROM) | IO_MEM_ROM);
91 92

  
92 93
#ifdef TARGET_WORDS_BIGENDIAN
93 94
    be = 1;
......
104 105
        }
105 106

  
106 107
        if (!pflash_cfi01_register(mainstone_flash_base[i],
107
                                   qemu_ram_alloc(MAINSTONE_FLASH),
108
                                   qemu_ram_alloc(NULL, "mainstone.flash",
109
                                                  MAINSTONE_FLASH),
108 110
                                   dinfo->bdrv, sector_len,
109 111
                                   MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0,
110 112
                                   be)) {
b/hw/mcf5208.c
220 220

  
221 221
    /* DRAM at 0x40000000 */
222 222
    cpu_register_physical_memory(0x40000000, ram_size,
223
        qemu_ram_alloc(ram_size) | IO_MEM_RAM);
223
        qemu_ram_alloc(NULL, "mcf5208.ram", ram_size) | IO_MEM_RAM);
224 224

  
225 225
    /* Internal SRAM.  */
226 226
    cpu_register_physical_memory(0x80000000, 16384,
227
        qemu_ram_alloc(16384) | IO_MEM_RAM);
227
        qemu_ram_alloc(NULL, "mcf5208.sram", 16384) | IO_MEM_RAM);
228 228

  
229 229
    /* Internal peripherals.  */
230 230
    pic = mcf_intc_init(0xfc048000, env);
b/hw/mips_fulong2e.c
292 292
    bios_size = 1024 * 1024;
293 293

  
294 294
    /* allocate RAM */
295
    ram_offset = qemu_ram_alloc(ram_size);
296
    bios_offset = qemu_ram_alloc(bios_size);
295
    ram_offset = qemu_ram_alloc(NULL, "fulong2e.ram", ram_size);
296
    bios_offset = qemu_ram_alloc(NULL, "fulong2e.bios", bios_size);
297 297

  
298 298
    cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
299 299
    cpu_register_physical_memory(0x1fc00000LL,
b/hw/mips_jazz.c
158 158
    qemu_register_reset(main_cpu_reset, env);
159 159

  
160 160
    /* allocate RAM */
161
    ram_offset = qemu_ram_alloc(ram_size);
161
    ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
162 162
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
163 163

  
164
    bios_offset = qemu_ram_alloc(MAGNUM_BIOS_SIZE);
164
    bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
165 165
    cpu_register_physical_memory(0x1fc00000LL,
166 166
                                 MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
167 167
    cpu_register_physical_memory(0xfff00000LL,
b/hw/mips_malta.c
831 831
                ((unsigned int)ram_size / (1 << 20)));
832 832
        exit(1);
833 833
    }
834
    ram_offset = qemu_ram_alloc(ram_size);
835
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
834
    ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size);
835
    bios_offset = qemu_ram_alloc(NULL, "mips_malta.bios", BIOS_SIZE);
836 836

  
837 837

  
838 838
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
b/hw/mips_mipssim.c
144 144
    qemu_register_reset(main_cpu_reset, reset_info);
145 145

  
146 146
    /* Allocate RAM. */
147
    ram_offset = qemu_ram_alloc(ram_size);
148
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
147
    ram_offset = qemu_ram_alloc(NULL, "mips_mipssim.ram", ram_size);
148
    bios_offset = qemu_ram_alloc(NULL, "mips_mipssim.bios", BIOS_SIZE);
149 149

  
150 150
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
151 151

  
b/hw/mips_r4k.c
198 198
                ((unsigned int)ram_size / (1 << 20)));
199 199
        exit(1);
200 200
    }
201
    ram_offset = qemu_ram_alloc(ram_size);
201
    ram_offset = qemu_ram_alloc(NULL, "mips_r4k.ram", ram_size);
202 202

  
203 203
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
204 204

  
......
226 226
    be = 0;
227 227
#endif
228 228
    if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
229
        bios_offset = qemu_ram_alloc(BIOS_SIZE);
229
        bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", BIOS_SIZE);
230 230
	cpu_register_physical_memory(0x1fc00000, BIOS_SIZE,
231 231
                                     bios_offset | IO_MEM_ROM);
232 232

  
233 233
        load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
234 234
    } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) {
235 235
        uint32_t mips_rom = 0x00400000;
236
        bios_offset = qemu_ram_alloc(mips_rom);
236
        bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", mips_rom);
237 237
        if (!pflash_cfi01_register(0x1fc00000, bios_offset,
238 238
                                   dinfo->bdrv, sector_len,
239 239
                                   mips_rom / sector_len,
b/hw/musicpal.c
1506 1506

  
1507 1507
    /* For now we use a fixed - the original - RAM size */
1508 1508
    cpu_register_physical_memory(0, MP_RAM_DEFAULT_SIZE,
1509
                                 qemu_ram_alloc(MP_RAM_DEFAULT_SIZE));
1509
                                 qemu_ram_alloc(NULL, "musicpal.ram",
1510
                                                MP_RAM_DEFAULT_SIZE));
1510 1511

  
1511
    sram_off = qemu_ram_alloc(MP_SRAM_SIZE);
1512
    sram_off = qemu_ram_alloc(NULL, "musicpal.sram", MP_SRAM_SIZE);
1512 1513
    cpu_register_physical_memory(MP_SRAM_BASE, MP_SRAM_SIZE, sram_off);
1513 1514

  
1514 1515
    dev = sysbus_create_simple("mv88w8618_pic", MP_PIC_BASE,
......
1555 1556
         * image is smaller than 32 MB.
1556 1557
         */
1557 1558
#ifdef TARGET_WORDS_BIGENDIAN
1558
        pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(flash_size),
1559
        pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL,
1560
                              "musicpal.flash", flash_size),
1559 1561
                              dinfo->bdrv, 0x10000,
1560 1562
                              (flash_size + 0xffff) >> 16,
1561 1563
                              MP_FLASH_SIZE_MAX / flash_size,
1562 1564
                              2, 0x00BF, 0x236D, 0x0000, 0x0000,
1563 1565
                              0x5555, 0x2AAA, 1);
1564 1566
#else
1565
        pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(flash_size),
1567
        pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL,
1568
                              "musicpal.flash", flash_size),
1566 1569
                              dinfo->bdrv, 0x10000,
1567 1570
                              (flash_size + 0xffff) >> 16,
1568 1571
                              MP_FLASH_SIZE_MAX / flash_size,
b/hw/omap1.c
3732 3732

  
3733 3733
    /* Memory-mapped stuff */
3734 3734
    cpu_register_physical_memory(OMAP_EMIFF_BASE, s->sdram_size,
3735
                    (emiff_base = qemu_ram_alloc(s->sdram_size)) | IO_MEM_RAM);
3735
                    (emiff_base = qemu_ram_alloc(NULL, "omap1.dram",
3736
                                                 s->sdram_size)) | IO_MEM_RAM);
3736 3737
    cpu_register_physical_memory(OMAP_IMIF_BASE, s->sram_size,
3737
                    (imif_base = qemu_ram_alloc(s->sram_size)) | IO_MEM_RAM);
3738
                    (imif_base = qemu_ram_alloc(NULL, "omap1.sram",
3739
                                                s->sram_size)) | IO_MEM_RAM);
3738 3740

  
3739 3741
    omap_clkm_init(0xfffece00, 0xe1008000, s);
3740 3742

  
b/hw/omap2.c
2253 2253

  
2254 2254
    /* Memory-mapped stuff */
2255 2255
    cpu_register_physical_memory(OMAP2_Q2_BASE, s->sdram_size,
2256
                    (q2_base = qemu_ram_alloc(s->sdram_size)) | IO_MEM_RAM);
2256
                    (q2_base = qemu_ram_alloc(NULL, "omap2.dram",
2257
                                              s->sdram_size)) | IO_MEM_RAM);
2257 2258
    cpu_register_physical_memory(OMAP2_SRAM_BASE, s->sram_size,
2258
                    (sram_base = qemu_ram_alloc(s->sram_size)) | IO_MEM_RAM);
2259
                    (sram_base = qemu_ram_alloc(NULL, "omap2.sram",
2260
                                                s->sram_size)) | IO_MEM_RAM);
2259 2261

  
2260 2262
    s->l4 = omap_l4_init(OMAP2_L4_BASE, 54);
2261 2263

  
b/hw/omap_sx1.c
139 139

  
140 140
    /* External Flash (EMIFS) */
141 141
    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
142
                                 qemu_ram_alloc(flash_size) | IO_MEM_ROM);
142
                                 qemu_ram_alloc(NULL, "omap_sx1.flash0-0",
143
                                                flash_size) | IO_MEM_ROM);
143 144

  
144 145
    io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val);
145 146
    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
......
157 158
#endif
158 159

  
159 160
    if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
160
        if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(flash_size),
161
        if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(NULL,
162
                                   "omap_sx1.flash0-1", flash_size),
161 163
                                   dinfo->bdrv, sector_size,
162 164
                                   flash_size / sector_size,
163 165
                                   4, 0, 0, 0, 0, be)) {
......
170 172
    if ((version == 1) &&
171 173
            (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
172 174
        cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
173
                                     qemu_ram_alloc(flash1_size) | IO_MEM_ROM);
175
                                     qemu_ram_alloc(NULL, "omap_sx1.flash1-0",
176
                                                    flash1_size) | IO_MEM_ROM);
174 177
        io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val);
175 178
        cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
176 179
                        OMAP_CS1_SIZE - flash1_size, io);
177 180

  
178
        if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(flash1_size),
181
        if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(NULL,
182
                                   "omap_sx1.flash1-1", flash1_size),
179 183
                                   dinfo->bdrv, sector_size,
180 184
                                   flash1_size / sector_size,
181 185
                                   4, 0, 0, 0, 0, be)) {
b/hw/onenand.c
638 638
        s->bdrv = dinfo->bdrv;
639 639
    s->otp = memset(qemu_malloc((64 + 2) << PAGE_SHIFT),
640 640
                    0xff, (64 + 2) << PAGE_SHIFT);
641
    s->ram = qemu_ram_alloc(0xc000 << s->shift);
641
    s->ram = qemu_ram_alloc(NULL, "onenand.ram", 0xc000 << s->shift);
642 642
    ram = qemu_get_ram_ptr(s->ram);
643 643
    s->boot[0] = ram + (0x0000 << s->shift);
644 644
    s->boot[1] = ram + (0x8000 << s->shift);
b/hw/palm.c
213 213

  
214 214
    /* External Flash (EMIFS) */
215 215
    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
216
                    qemu_ram_alloc(flash_size) | IO_MEM_ROM);
216
                                 qemu_ram_alloc(NULL, "palmte.flash",
217
                                                flash_size) | IO_MEM_ROM);
217 218

  
218 219
    io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val);
219 220
    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
b/hw/pc.c
909 909
    linux_boot = (kernel_filename != NULL);
910 910

  
911 911
    /* allocate RAM */
912
    ram_addr = qemu_ram_alloc(below_4g_mem_size + above_4g_mem_size);
912
    ram_addr = qemu_ram_alloc(NULL, "pc.ram",
913
                              below_4g_mem_size + above_4g_mem_size);
913 914
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
914 915
    cpu_register_physical_memory(0x100000,
915 916
                 below_4g_mem_size - 0x100000,
......
932 933
        (bios_size % 65536) != 0) {
933 934
        goto bios_error;
934 935
    }
935
    bios_offset = qemu_ram_alloc(bios_size);
936
    bios_offset = qemu_ram_alloc(NULL, "pc.bios", bios_size);
936 937
    ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
937 938
    if (ret != 0) {
938 939
    bios_error:
......
950 951
                                 isa_bios_size,
951 952
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
952 953

  
953
    option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
954
    option_rom_offset = qemu_ram_alloc(NULL, "pc.rom", PC_ROM_SIZE);
954 955
    cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
955 956

  
956 957
    /* map all the bios at the top of memory */
b/hw/pci.c
1713 1713
    int size;
1714 1714
    char *path;
1715 1715
    void *ptr;
1716
    char name[32];
1716 1717

  
1717 1718
    if (!pdev->romfile)
1718 1719
        return 0;
......
1748 1749
        size = 1 << qemu_fls(size);
1749 1750
    }
1750 1751

  
1751
    pdev->rom_offset = qemu_ram_alloc(size);
1752
    if (pdev->qdev.info->vmsd)
1753
        snprintf(name, sizeof(name), "%s.rom", pdev->qdev.info->vmsd->name);
1754
    else
1755
        snprintf(name, sizeof(name), "%s.rom", pdev->qdev.info->name);
1756
    pdev->rom_offset = qemu_ram_alloc(&pdev->qdev, name, size);
1752 1757

  
1753 1758
    ptr = qemu_get_ram_ptr(pdev->rom_offset);
1754 1759
    load_image(path, ptr);
b/hw/petalogix_s3adsp1800_mmu.c
137 137
    qemu_register_reset(main_cpu_reset, env);
138 138

  
139 139
    /* Attach emulated BRAM through the LMB.  */
140
    phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE);
140
    phys_lmb_bram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.lmb_bram",
141
                                   LMB_BRAM_SIZE);
141 142
    cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE,
142 143
                                 phys_lmb_bram | IO_MEM_RAM);
143 144

  
144
    phys_ram = qemu_ram_alloc(ram_size);
145
    phys_ram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.ram", ram_size);
145 146
    cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM);
146 147

  
147
    phys_flash = qemu_ram_alloc(FLASH_SIZE);
148
    phys_flash = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE);
148 149
    dinfo = drive_get(IF_PFLASH, 0, 0);
149 150
    pflash_cfi01_register(0xa0000000, phys_flash,
150 151
                          dinfo ? dinfo->bdrv : NULL, (64 * 1024),
b/hw/ppc405_boards.c
190 190
    DriveInfo *dinfo;
191 191

  
192 192
    /* XXX: fix this */
193
    ram_bases[0] = qemu_ram_alloc(0x08000000);
193
    ram_bases[0] = qemu_ram_alloc(NULL, "ef405ep.ram", 0x08000000);
194 194
    ram_sizes[0] = 0x08000000;
195 195
    ram_bases[1] = 0x00000000;
196 196
    ram_sizes[1] = 0x00000000;
......
202 202
                        kernel_filename == NULL ? 0 : 1);
203 203
    /* allocate SRAM */
204 204
    sram_size = 512 * 1024;
205
    sram_offset = qemu_ram_alloc(sram_size);
205
    sram_offset = qemu_ram_alloc(NULL, "ef405ep.sram", sram_size);
206 206
#ifdef DEBUG_BOARD_INIT
207 207
    printf("%s: register SRAM at offset %08lx\n", __func__, sram_offset);
208 208
#endif
......
217 217
    dinfo = drive_get(IF_PFLASH, 0, fl_idx);
218 218
    if (dinfo) {
219 219
        bios_size = bdrv_getlength(dinfo->bdrv);
220
        bios_offset = qemu_ram_alloc(bios_size);
220
        bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", bios_size);
221 221
        fl_sectors = (bios_size + 65535) >> 16;
222 222
#ifdef DEBUG_BOARD_INIT
223 223
        printf("Register parallel flash %d size " TARGET_FMT_lx
......
236 236
#ifdef DEBUG_BOARD_INIT
237 237
        printf("Load BIOS from file\n");
238 238
#endif
239
        bios_offset = qemu_ram_alloc(BIOS_SIZE);
239
        bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", BIOS_SIZE);
240 240
        if (bios_name == NULL)
241 241
            bios_name = BIOS_FILENAME;
242 242
        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
......
509 509
    DriveInfo *dinfo;
510 510

  
511 511
    /* RAM is soldered to the board so the size cannot be changed */
512
    ram_bases[0] = qemu_ram_alloc(0x04000000);
512
    ram_bases[0] = qemu_ram_alloc(NULL, "taihu_405ep.ram-0", 0x04000000);
513 513
    ram_sizes[0] = 0x04000000;
514
    ram_bases[1] = qemu_ram_alloc(0x04000000);
514
    ram_bases[1] = qemu_ram_alloc(NULL, "taihu_405ep.ram-1", 0x04000000);
515 515
    ram_sizes[1] = 0x04000000;
516 516
    ram_size = 0x08000000;
517 517
#ifdef DEBUG_BOARD_INIT
......
531 531
        /* XXX: should check that size is 2MB */
532 532
        //        bios_size = 2 * 1024 * 1024;
533 533
        fl_sectors = (bios_size + 65535) >> 16;
534
        bios_offset = qemu_ram_alloc(bios_size);
534
        bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size);
535 535
#ifdef DEBUG_BOARD_INIT
536 536
        printf("Register parallel flash %d size " TARGET_FMT_lx
537 537
               " at offset %08lx addr " TARGET_FMT_lx " '%s' %d\n",
......
551 551
#endif
552 552
        if (bios_name == NULL)
553 553
            bios_name = BIOS_FILENAME;
554
        bios_offset = qemu_ram_alloc(BIOS_SIZE);
554
        bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", BIOS_SIZE);
555 555
        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
556 556
        if (filename) {
557 557
            bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset));
......
580 580
               fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
581 581
               bdrv_get_device_name(dinfo->bdrv));
582 582
#endif
583
        bios_offset = qemu_ram_alloc(bios_size);
583
        bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.flash", bios_size);
584 584
        pflash_cfi02_register(0xfc000000, bios_offset,
585 585
                              dinfo->bdrv, 65536, fl_sectors, 1,
586 586
                              4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
b/hw/ppc405_uc.c
995 995
    ppc405_ocm_t *ocm;
996 996

  
997 997
    ocm = qemu_mallocz(sizeof(ppc405_ocm_t));
998
    ocm->offset = qemu_ram_alloc(4096);
998
    ocm->offset = qemu_ram_alloc(NULL, "ppc405.ocm", 4096);
999 999
    qemu_register_reset(&ocm_reset, ocm);
1000 1000
    ppc_dcr_register(env, OCM0_ISARC,
1001 1001
                     ocm, &dcr_read_ocm, &dcr_write_ocm);
b/hw/ppc4xx_devs.c
668 668
            unsigned int bank_size = sdram_bank_sizes[j];
669 669

  
670 670
            if (bank_size <= size_left) {
671
                ram_bases[i] = qemu_ram_alloc(bank_size);
671
                char name[32];
672
                snprintf(name, sizeof(name), "ppc4xx.sdram%d", i);
673
                ram_bases[i] = qemu_ram_alloc(NULL, name, bank_size);
672 674
                ram_sizes[i] = bank_size;
673 675
                size_left -= bank_size;
674 676
                break;
b/hw/ppc_newworld.c
173 173
    }
174 174

  
175 175
    /* allocate RAM */
176
    ram_offset = qemu_ram_alloc(ram_size);
176
    ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
177 177
    cpu_register_physical_memory(0, ram_size, ram_offset);
178 178

  
179 179
    /* allocate and load BIOS */
180
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
180
    bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
181 181
    if (bios_name == NULL)
182 182
        bios_name = PROM_FILENAME;
183 183
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
......
198 198
    }
199 199

  
200 200
    /* allocate and load VGA BIOS */
201
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
201
    vga_bios_offset = qemu_ram_alloc(NULL, "ppc_core99.vbios", VGA_BIOS_SIZE);
202 202
    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
203 203
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
204 204
    if (filename) {
b/hw/ppc_oldworld.c
179 179
        exit(1);
180 180
    }
181 181

  
182
    ram_offset = qemu_ram_alloc(ram_size);
182
    ram_offset = qemu_ram_alloc(NULL, "ppc_heathrow.ram", ram_size);
183 183
    cpu_register_physical_memory(0, ram_size, ram_offset);
184 184

  
185 185
    /* allocate and load BIOS */
186
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
186
    bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.bios", BIOS_SIZE);
187 187
    if (bios_name == NULL)
188 188
        bios_name = PROM_FILENAME;
189 189
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
......
203 203
    }
204 204

  
205 205
    /* allocate and load VGA BIOS */
206
    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
206
    vga_bios_offset = qemu_ram_alloc(NULL, "ppc_heathrow.vbios", VGA_BIOS_SIZE);
207 207
    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
208 208
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
209 209
    if (filename) {
b/hw/ppc_prep.c
604 604
    }
605 605

  
606 606
    /* allocate RAM */
607
    ram_offset = qemu_ram_alloc(ram_size);
607
    ram_offset = qemu_ram_alloc(NULL, "ppc_prep.ram", ram_size);
608 608
    cpu_register_physical_memory(0, ram_size, ram_offset);
609 609

  
610 610
    /* allocate and load BIOS */
611
    bios_offset = qemu_ram_alloc(BIOS_SIZE);
611
    bios_offset = qemu_ram_alloc(NULL, "ppc_prep.bios", BIOS_SIZE);
612 612
    if (bios_name == NULL)
613 613
        bios_name = BIOS_FILENAME;
614 614
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
b/hw/ppce500_mpc8544ds.c
189 189
    ram_size &= ~(RAM_SIZES_ALIGN - 1);
190 190

  
191 191
    /* Register Memory */
192
    cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
192
    cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(NULL,
193
                                 "mpc8544ds.ram", ram_size));
193 194

  
194 195
    /* MPIC */
195 196
    irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
b/hw/pxa2xx.c
2054 2054

  
2055 2055
    /* SDRAM & Internal Memory Storage */
2056 2056
    cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
2057
                    sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
2057
                    sdram_size, qemu_ram_alloc(NULL, "pxa270.sdram",
2058
                                               sdram_size) | IO_MEM_RAM);
2058 2059
    cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
2059
                    0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
2060
                    0x40000, qemu_ram_alloc(NULL, "pxa270.internal",
2061
                                            0x40000) | IO_MEM_RAM);
2060 2062

  
2061 2063
    s->pic = pxa2xx_pic_init(0x40d00000, s->env);
2062 2064

  
......
2175 2177

  
2176 2178
    /* SDRAM & Internal Memory Storage */
2177 2179
    cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size,
2178
                    qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
2180
                    qemu_ram_alloc(NULL, "pxa255.sdram",
2181
                                   sdram_size) | IO_MEM_RAM);
2179 2182
    cpu_register_physical_memory(PXA2XX_INTERNAL_BASE, PXA2XX_INTERNAL_SIZE,
2180
                    qemu_ram_alloc(PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM);
2183
                    qemu_ram_alloc(NULL, "pxa255.internal",
2184
                                   PXA2XX_INTERNAL_SIZE) | IO_MEM_RAM);
2181 2185

  
2182 2186
    s->pic = pxa2xx_pic_init(0x40d00000, s->env);
2183 2187

  
b/hw/r2d.c
242 242
    }
243 243

  
244 244
    /* Allocate memory space */
245
    sdram_addr = qemu_ram_alloc(SDRAM_SIZE);
245
    sdram_addr = qemu_ram_alloc(NULL, "r2d.sdram", SDRAM_SIZE);
246 246
    cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, sdram_addr);
247 247
    /* Register peripherals */
248 248
    s = sh7750_init(env);
......
258 258

  
259 259
    /* onboard flash memory */
260 260
    dinfo = drive_get(IF_PFLASH, 0, 0);
261
    pflash_cfi02_register(0x0, qemu_ram_alloc(FLASH_SIZE),
261
    pflash_cfi02_register(0x0, qemu_ram_alloc(NULL, "r2d.flash", FLASH_SIZE),
262 262
                          dinfo ? dinfo->bdrv : NULL, (16 * 1024),
263 263
                          FLASH_SIZE >> 16,
264 264
                          1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
b/hw/realview.c
196 196
        /* Core tile RAM.  */
197 197
        low_ram_size = ram_size - 0x20000000;
198 198
        ram_size = 0x20000000;
199
        ram_offset = qemu_ram_alloc(low_ram_size);
199
        ram_offset = qemu_ram_alloc(NULL, "realview.lowmem", low_ram_size);
200 200
        cpu_register_physical_memory(0x20000000, low_ram_size,
201 201
                                     ram_offset | IO_MEM_RAM);
202 202
    }
203 203

  
204
    ram_offset = qemu_ram_alloc(ram_size);
204
    ram_offset = qemu_ram_alloc(NULL, "realview.highmem", ram_size);
205 205
    low_ram_size = ram_size;
206 206
    if (low_ram_size > 0x10000000)
207 207
      low_ram_size = 0x10000000;
......
354 354
       startup code.  I guess this works on real hardware because the
355 355
       BootROM happens to be in ROM/flash or in memory that isn't clobbered
356 356
       until after Linux boots the secondary CPUs.  */
357
    ram_offset = qemu_ram_alloc(0x1000);
357
    ram_offset = qemu_ram_alloc(NULL, "realview.hack", 0x1000);
358 358
    cpu_register_physical_memory(SMP_BOOT_ADDR, 0x1000,
359 359
                                 ram_offset | IO_MEM_RAM);
360 360

  
b/hw/s390-virtio.c
157 157
    s390_bus = s390_virtio_bus_init(&ram_size);
158 158

  
159 159
    /* allocate RAM */
160
    ram_addr = qemu_ram_alloc(ram_size);
160
    ram_addr = qemu_ram_alloc(NULL, "s390.ram", ram_size);
161 161
    cpu_register_physical_memory(0, ram_size, ram_addr);
162 162

  
163 163
    /* init CPUs */
b/hw/sm501.c
1371 1371
    s->dc_crt_control = 0x00010000;
1372 1372

  
1373 1373
    /* allocate local memory */
1374
    s->local_mem_offset = qemu_ram_alloc(local_mem_bytes);
1374
    s->local_mem_offset = qemu_ram_alloc(NULL, "sm501.local", local_mem_bytes);
1375 1375
    s->local_mem = qemu_get_ram_ptr(s->local_mem_offset);
1376 1376
    cpu_register_physical_memory(base, local_mem_bytes, s->local_mem_offset);
1377 1377

  
b/hw/spitz.c
962 962
    sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
963 963

  
964 964
    cpu_register_physical_memory(0, SPITZ_ROM,
965
                    qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM);
965
                    qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
966 966

  
967 967
    /* Setup peripherals */
968 968
    spitz_keyboard_register(cpu);
b/hw/sun4m.c
592 592
{
593 593
    ram_addr_t idreg_offset;
594 594

  
595
    idreg_offset = qemu_ram_alloc(sizeof(idreg_data));
595
    idreg_offset = qemu_ram_alloc(NULL, "sun4m.idreg", sizeof(idreg_data));
596 596
    sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM);
597 597
    return 0;
598 598
}
......
627 627
{
628 628
    ram_addr_t afx_offset;
629 629

  
630
    afx_offset = qemu_ram_alloc(4);
630
    afx_offset = qemu_ram_alloc(NULL, "sun4m.afx", 4);
631 631
    sysbus_init_mmio(dev, 4, afx_offset | IO_MEM_RAM);
632 632
    return 0;
633 633
}
......
690 690
{
691 691
    ram_addr_t prom_offset;
692 692

  
693
    prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
693
    prom_offset = qemu_ram_alloc(NULL, "sun4m.prom", PROM_SIZE_MAX);
694 694
    sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
695 695
    return 0;
696 696
}
......
725 725

  
726 726
    RAM_size = d->size;
727 727

  
728
    ram_offset = qemu_ram_alloc(RAM_size);
728
    ram_offset = qemu_ram_alloc(NULL, "sun4m.ram", RAM_size);
729 729
    sysbus_init_mmio(dev, RAM_size, ram_offset);
730 730
    return 0;
731 731
}
b/hw/sun4u.c
629 629
{
630 630
    ram_addr_t prom_offset;
631 631

  
632
    prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
632
    prom_offset = qemu_ram_alloc(NULL, "sun4u.prom", PROM_SIZE_MAX);
633 633
    sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
634 634
    return 0;
635 635
}
......
665 665

  
666 666
    RAM_size = d->size;
667 667

  
668
    ram_offset = qemu_ram_alloc(RAM_size);
668
    ram_offset = qemu_ram_alloc(NULL, "sun4u.ram", RAM_size);
669 669
    sysbus_init_mmio(dev, RAM_size, ram_offset);
670 670
    return 0;
671 671
}
b/hw/syborg.c
51 51
    }
52 52

  
53 53
    /* RAM at address zero. */
54
    ram_addr = qemu_ram_alloc(ram_size);
54
    ram_addr = qemu_ram_alloc(NULL, "syborg.ram", ram_size);
55 55
    cpu_register_physical_memory(0, ram_size, ram_addr | IO_MEM_RAM);
56 56

  
57 57
    cpu_pic = arm_pic_init_cpu(env);
b/hw/tc6393xb.c
593 593
                    tc6393xb_writefn, s);
594 594
    cpu_register_physical_memory(base, 0x10000, iomemtype);
595 595

  
596
    s->vram_addr = qemu_ram_alloc(0x100000);
596
    s->vram_addr = qemu_ram_alloc(NULL, "tc6393xb.vram", 0x100000);
597 597
    s->vram_ptr = qemu_get_ram_ptr(s->vram_addr);
598 598
    cpu_register_physical_memory(base + 0x100000, 0x100000, s->vram_addr);
599 599
    s->scr_width = 480;
b/hw/tcx.c
510 510
    int size;
511 511
    uint8_t *vram_base;
512 512

  
513
    vram_offset = qemu_ram_alloc(s->vram_size * (1 + 4 + 4));
513
    vram_offset = qemu_ram_alloc(NULL, "tcx.vram", s->vram_size * (1 + 4 + 4));
514 514
    vram_base = qemu_get_ram_ptr(vram_offset);
515 515
    s->vram_offset = vram_offset;
516 516

  
b/hw/tosa.c
215 215
    cpu = pxa255_init(tosa_binfo.ram_size);
216 216

  
217 217
    cpu_register_physical_memory(0, TOSA_ROM,
218
                    qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM);
218
                    qemu_ram_alloc(NULL, "tosa.rom", TOSA_ROM) | IO_MEM_ROM);
219 219

  
220 220
    tmio = tc6393xb_init(0x10000000,
221 221
            pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]);
b/hw/versatilepb.c
180 180
        fprintf(stderr, "Unable to find CPU definition\n");
181 181
        exit(1);
182 182
    }
183
    ram_offset = qemu_ram_alloc(ram_size);
183
    ram_offset = qemu_ram_alloc(NULL, "versatile.ram", ram_size);
184 184
    /* ??? RAM should repeat to fill physical memory space.  */
185 185
    /* SDRAM at address zero.  */
186 186
    cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
b/hw/vga.c
2261 2261
#else
2262 2262
    s->is_vbe_vmstate = 0;
2263 2263
#endif
2264
    s->vram_offset = qemu_ram_alloc(vga_ram_size);
2264
    s->vram_offset = qemu_ram_alloc(NULL, "vga.vram", vga_ram_size);
2265 2265
    s->vram_ptr = qemu_get_ram_ptr(s->vram_offset);
2266 2266
    s->vram_size = vga_ram_size;
2267 2267
    s->get_bpp = vga_get_bpp;
b/hw/vmware_vga.c
1164 1164

  
1165 1165

  
1166 1166
    s->fifo_size = SVGA_FIFO_SIZE;
1167
    s->fifo_offset = qemu_ram_alloc(s->fifo_size);
1167
    s->fifo_offset = qemu_ram_alloc(NULL, "vmsvga.fifo", s->fifo_size);
1168 1168
    s->fifo_ptr = qemu_get_ram_ptr(s->fifo_offset);
1169 1169

  
1170 1170
    vga_common_init(&s->vga, vga_ram_size);

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