Revision 17786d52

b/hw/intel-hda.c
19 19

  
20 20
#include "hw.h"
21 21
#include "pci.h"
22
#include "msi.h"
22 23
#include "qemu-timer.h"
23 24
#include "audiodev.h"
24 25
#include "intel-hda.h"
......
188 189

  
189 190
    /* properties */
190 191
    uint32_t debug;
192
    uint32_t msi;
191 193
};
192 194

  
193 195
struct IntelHDAReg {
......
268 270

  
269 271
static void intel_hda_update_irq(IntelHDAState *d)
270 272
{
273
    int msi = d->msi && msi_enabled(&d->pci);
271 274
    int level;
272 275

  
273 276
    intel_hda_update_int_sts(d);
......
276 279
    } else {
277 280
        level = 0;
278 281
    }
279
    dprint(d, 2, "%s: level %d\n", __FUNCTION__, level);
280
    qemu_set_irq(d->pci.irq[0], level);
282
    dprint(d, 2, "%s: level %d [%s]\n", __FUNCTION__,
283
           level, msi ? "msi" : "intx");
284
    if (msi) {
285
        if (level) {
286
            msi_notify(&d->pci, 0);
287
        }
288
    } else {
289
        qemu_set_irq(d->pci.irq[0], level);
290
    }
281 291
}
282 292

  
283 293
static int intel_hda_send_command(IntelHDAState *d, uint32_t verb)
......
1148 1158
                                          intel_hda_mmio_write, d);
1149 1159
    pci_register_bar(&d->pci, 0, 0x4000, PCI_BASE_ADDRESS_SPACE_MEMORY,
1150 1160
                     intel_hda_map);
1161
    if (d->msi) {
1162
        msi_init(&d->pci, 0x50, 1, true, false);
1163
    }
1151 1164

  
1152 1165
    hda_codec_bus_init(&d->pci.qdev, &d->codecs,
1153 1166
                       intel_hda_response, intel_hda_xfer);
......
1159 1172
{
1160 1173
    IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci);
1161 1174

  
1175
    if (d->msi) {
1176
        msi_uninit(&d->pci);
1177
    }
1162 1178
    cpu_unregister_io_memory(d->mmio_addr);
1163 1179
    return 0;
1164 1180
}
1165 1181

  
1182
static void intel_hda_write_config(PCIDevice *pci, uint32_t addr,
1183
                                   uint32_t val, int len)
1184
{
1185
    IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci);
1186

  
1187
    pci_default_write_config(pci, addr, val, len);
1188
    if (d->msi) {
1189
        msi_write_config(pci, addr, val, len);
1190
    }
1191
}
1192

  
1166 1193
static int intel_hda_post_load(void *opaque, int version)
1167 1194
{
1168 1195
    IntelHDAState* d = opaque;
......
1246 1273
    .qdev.reset   = intel_hda_reset,
1247 1274
    .init         = intel_hda_init,
1248 1275
    .exit         = intel_hda_exit,
1276
    .config_write = intel_hda_write_config,
1249 1277
    .qdev.props   = (Property[]) {
1250 1278
        DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0),
1279
        DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 1),
1251 1280
        DEFINE_PROP_END_OF_LIST(),
1252 1281
    }
1253 1282
};

Also available in: Unified diff