Revision 17786d52 hw/intel-hda.c
b/hw/intel-hda.c | ||
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#include "hw.h" |
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#include "pci.h" |
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#include "msi.h" |
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#include "qemu-timer.h" |
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#include "audiodev.h" |
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#include "intel-hda.h" |
... | ... | |
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|
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/* properties */ |
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uint32_t debug; |
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uint32_t msi; |
|
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}; |
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|
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struct IntelHDAReg { |
... | ... | |
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|
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static void intel_hda_update_irq(IntelHDAState *d) |
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{ |
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int msi = d->msi && msi_enabled(&d->pci); |
|
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int level; |
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|
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intel_hda_update_int_sts(d); |
... | ... | |
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} else { |
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level = 0; |
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} |
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dprint(d, 2, "%s: level %d\n", __FUNCTION__, level); |
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qemu_set_irq(d->pci.irq[0], level); |
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dprint(d, 2, "%s: level %d [%s]\n", __FUNCTION__, |
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level, msi ? "msi" : "intx"); |
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if (msi) { |
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if (level) { |
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msi_notify(&d->pci, 0); |
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} |
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} else { |
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qemu_set_irq(d->pci.irq[0], level); |
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} |
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} |
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|
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static int intel_hda_send_command(IntelHDAState *d, uint32_t verb) |
... | ... | |
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intel_hda_mmio_write, d); |
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pci_register_bar(&d->pci, 0, 0x4000, PCI_BASE_ADDRESS_SPACE_MEMORY, |
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intel_hda_map); |
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if (d->msi) { |
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msi_init(&d->pci, 0x50, 1, true, false); |
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} |
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|
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hda_codec_bus_init(&d->pci.qdev, &d->codecs, |
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intel_hda_response, intel_hda_xfer); |
... | ... | |
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{ |
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IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); |
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if (d->msi) { |
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msi_uninit(&d->pci); |
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} |
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cpu_unregister_io_memory(d->mmio_addr); |
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return 0; |
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} |
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static void intel_hda_write_config(PCIDevice *pci, uint32_t addr, |
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uint32_t val, int len) |
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{ |
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IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); |
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|
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pci_default_write_config(pci, addr, val, len); |
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if (d->msi) { |
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msi_write_config(pci, addr, val, len); |
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} |
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} |
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|
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static int intel_hda_post_load(void *opaque, int version) |
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{ |
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IntelHDAState* d = opaque; |
... | ... | |
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.qdev.reset = intel_hda_reset, |
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.init = intel_hda_init, |
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.exit = intel_hda_exit, |
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.config_write = intel_hda_write_config, |
|
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.qdev.props = (Property[]) { |
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DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0), |
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DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 1), |
|
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DEFINE_PROP_END_OF_LIST(), |
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} |
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}; |
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