Revision 187337f8 hw/pxa2xx.c
| b/hw/pxa2xx.c | ||
|---|---|---|
| 1725 | 1725 |
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| 1726 | 1726 |
iomemtype = cpu_register_io_memory(0, pxa2xx_i2s_readfn, |
| 1727 | 1727 |
pxa2xx_i2s_writefn, s); |
| 1728 |
cpu_register_physical_memory(s->base & 0xfff00000, 0xfffff, iomemtype);
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|
| 1728 |
cpu_register_physical_memory(s->base & 0xfff00000, 0x100000, iomemtype);
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| 1729 | 1729 |
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| 1730 | 1730 |
register_savevm("pxa2xx_i2s", base, 0,
|
| 1731 | 1731 |
pxa2xx_i2s_save, pxa2xx_i2s_load, s); |
| ... | ... | |
| 1988 | 1988 |
|
| 1989 | 1989 |
iomemtype = cpu_register_io_memory(0, pxa2xx_fir_readfn, |
| 1990 | 1990 |
pxa2xx_fir_writefn, s); |
| 1991 |
cpu_register_physical_memory(s->base, 0xfff, iomemtype);
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|
| 1991 |
cpu_register_physical_memory(s->base, 0x1000, iomemtype);
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|
| 1992 | 1992 |
|
| 1993 | 1993 |
if (chr) |
| 1994 | 1994 |
qemu_chr_add_handlers(chr, pxa2xx_fir_is_empty, |
| ... | ... | |
| 2061 | 2061 |
s->clkcfg = 0x00000009; /* Turbo mode active */ |
| 2062 | 2062 |
iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn, |
| 2063 | 2063 |
pxa2xx_cm_writefn, s); |
| 2064 |
cpu_register_physical_memory(s->cm_base, 0xfff, iomemtype);
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|
| 2064 |
cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
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| 2065 | 2065 |
register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
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| 2066 | 2066 |
|
| 2067 | 2067 |
cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s); |
| ... | ... | |
| 2072 | 2072 |
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */ |
| 2073 | 2073 |
iomemtype = cpu_register_io_memory(0, pxa2xx_mm_readfn, |
| 2074 | 2074 |
pxa2xx_mm_writefn, s); |
| 2075 |
cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
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|
| 2075 |
cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
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| 2076 | 2076 |
register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
|
| 2077 | 2077 |
|
| 2078 | 2078 |
s->pm_base = 0x40f00000; |
| 2079 | 2079 |
iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn, |
| 2080 | 2080 |
pxa2xx_pm_writefn, s); |
| 2081 |
cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
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| 2081 |
cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
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| 2082 | 2082 |
register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
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| 2083 | 2083 |
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| 2084 | 2084 |
for (i = 0; pxa27x_ssp[i].io_base; i ++); |
| ... | ... | |
| 2093 | 2093 |
|
| 2094 | 2094 |
iomemtype = cpu_register_io_memory(0, pxa2xx_ssp_readfn, |
| 2095 | 2095 |
pxa2xx_ssp_writefn, &ssp[i]); |
| 2096 |
cpu_register_physical_memory(ssp[i].base, 0xfff, iomemtype);
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| 2096 |
cpu_register_physical_memory(ssp[i].base, 0x1000, iomemtype);
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| 2097 | 2097 |
register_savevm("pxa2xx_ssp", i, 0,
|
| 2098 | 2098 |
pxa2xx_ssp_save, pxa2xx_ssp_load, s); |
| 2099 | 2099 |
} |
| ... | ... | |
| 2108 | 2108 |
s->rtc_base = 0x40900000; |
| 2109 | 2109 |
iomemtype = cpu_register_io_memory(0, pxa2xx_rtc_readfn, |
| 2110 | 2110 |
pxa2xx_rtc_writefn, s); |
| 2111 |
cpu_register_physical_memory(s->rtc_base, 0xfff, iomemtype);
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| 2111 |
cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
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| 2112 | 2112 |
pxa2xx_rtc_init(s); |
| 2113 | 2113 |
register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
|
| 2114 | 2114 |
|
| ... | ... | |
| 2170 | 2170 |
s->clkcfg = 0x00000009; /* Turbo mode active */ |
| 2171 | 2171 |
iomemtype = cpu_register_io_memory(0, pxa2xx_cm_readfn, |
| 2172 | 2172 |
pxa2xx_cm_writefn, s); |
| 2173 |
cpu_register_physical_memory(s->cm_base, 0xfff, iomemtype);
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| 2173 |
cpu_register_physical_memory(s->cm_base, 0x1000, iomemtype);
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| 2174 | 2174 |
register_savevm("pxa2xx_cm", 0, 0, pxa2xx_cm_save, pxa2xx_cm_load, s);
|
| 2175 | 2175 |
|
| 2176 | 2176 |
cpu_arm_set_cp_io(s->env, 14, pxa2xx_cp14_read, pxa2xx_cp14_write, s); |
| ... | ... | |
| 2181 | 2181 |
s->mm_regs[MECR >> 2] = 0x00000001; /* Two PC Card sockets */ |
| 2182 | 2182 |
iomemtype = cpu_register_io_memory(0, pxa2xx_mm_readfn, |
| 2183 | 2183 |
pxa2xx_mm_writefn, s); |
| 2184 |
cpu_register_physical_memory(s->mm_base, 0xfff, iomemtype);
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|
| 2184 |
cpu_register_physical_memory(s->mm_base, 0x1000, iomemtype);
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| 2185 | 2185 |
register_savevm("pxa2xx_mm", 0, 0, pxa2xx_mm_save, pxa2xx_mm_load, s);
|
| 2186 | 2186 |
|
| 2187 | 2187 |
s->pm_base = 0x40f00000; |
| 2188 | 2188 |
iomemtype = cpu_register_io_memory(0, pxa2xx_pm_readfn, |
| 2189 | 2189 |
pxa2xx_pm_writefn, s); |
| 2190 |
cpu_register_physical_memory(s->pm_base, 0xff, iomemtype);
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| 2190 |
cpu_register_physical_memory(s->pm_base, 0x100, iomemtype);
|
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| 2191 | 2191 |
register_savevm("pxa2xx_pm", 0, 0, pxa2xx_pm_save, pxa2xx_pm_load, s);
|
| 2192 | 2192 |
|
| 2193 | 2193 |
for (i = 0; pxa255_ssp[i].io_base; i ++); |
| ... | ... | |
| 2202 | 2202 |
|
| 2203 | 2203 |
iomemtype = cpu_register_io_memory(0, pxa2xx_ssp_readfn, |
| 2204 | 2204 |
pxa2xx_ssp_writefn, &ssp[i]); |
| 2205 |
cpu_register_physical_memory(ssp[i].base, 0xfff, iomemtype);
|
|
| 2205 |
cpu_register_physical_memory(ssp[i].base, 0x1000, iomemtype);
|
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| 2206 | 2206 |
register_savevm("pxa2xx_ssp", i, 0,
|
| 2207 | 2207 |
pxa2xx_ssp_save, pxa2xx_ssp_load, s); |
| 2208 | 2208 |
} |
| ... | ... | |
| 2217 | 2217 |
s->rtc_base = 0x40900000; |
| 2218 | 2218 |
iomemtype = cpu_register_io_memory(0, pxa2xx_rtc_readfn, |
| 2219 | 2219 |
pxa2xx_rtc_writefn, s); |
| 2220 |
cpu_register_physical_memory(s->rtc_base, 0xfff, iomemtype);
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|
| 2220 |
cpu_register_physical_memory(s->rtc_base, 0x1000, iomemtype);
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|
| 2221 | 2221 |
pxa2xx_rtc_init(s); |
| 2222 | 2222 |
register_savevm("pxa2xx_rtc", 0, 0, pxa2xx_rtc_save, pxa2xx_rtc_load, s);
|
| 2223 | 2223 |
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Also available in: Unified diff