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1
/*
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 *  i386 micro operations
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 *
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#define ASM_SOFTMMU
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#include "exec.h"
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/* n must be a constant to be efficient */
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static inline target_long lshift(target_long x, int n)
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{
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    if (n >= 0)
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        return x << n;
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    else
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        return x >> (-n);
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}
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#ifdef TARGET_X86_64
84

    
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#define REG (env->regs[8])
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#define REGNAME _R8
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[9])
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#define REGNAME _R9
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[10])
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#define REGNAME _R10
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[11])
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#define REGNAME _R11
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[12])
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#define REGNAME _R12
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#include "opreg_template.h"
112
#undef REG
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#undef REGNAME
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#define REG (env->regs[13])
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#define REGNAME _R13
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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121
#define REG (env->regs[14])
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#define REGNAME _R14
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[15])
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#define REGNAME _R15
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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133
#endif
134

    
135
/* operations with flags */
136

    
137
/* update flags with T0 and T1 (add/sub case) */
138
void OPPROTO op_update2_cc(void)
139
{
140
    CC_SRC = T1;
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    CC_DST = T0;
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}
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144
/* update flags with T0 (logic operation case) */
145
void OPPROTO op_update1_cc(void)
146
{
147
    CC_DST = T0;
148
}
149

    
150
void OPPROTO op_update_neg_cc(void)
151
{
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    CC_SRC = -T0;
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    CC_DST = T0;
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}
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void OPPROTO op_cmpl_T0_T1_cc(void)
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{
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    CC_SRC = T1;
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    CC_DST = T0 - T1;
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}
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void OPPROTO op_update_inc_cc(void)
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{
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    CC_SRC = cc_table[CC_OP].compute_c();
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    CC_DST = T0;
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}
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void OPPROTO op_testl_T0_T1_cc(void)
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{
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    CC_DST = T0 & T1;
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}
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/* operations without flags */
174

    
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void OPPROTO op_negl_T0(void)
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{
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    T0 = -T0;
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}
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void OPPROTO op_incl_T0(void)
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{
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    T0++;
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}
184

    
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void OPPROTO op_decl_T0(void)
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{
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    T0--;
188
}
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void OPPROTO op_notl_T0(void)
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{
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    T0 = ~T0;
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}
194

    
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/* multiply/divide */
196

    
197
/* XXX: add eflags optimizations */
198
/* XXX: add non P4 style flags */
199

    
200
void OPPROTO op_mulb_AL_T0(void)
201
{
202
    unsigned int res;
203
    res = (uint8_t)EAX * (uint8_t)T0;
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    EAX = (EAX & ~0xffff) | res;
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    CC_DST = res;
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    CC_SRC = (res & 0xff00);
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}
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void OPPROTO op_imulb_AL_T0(void)
210
{
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    int res;
212
    res = (int8_t)EAX * (int8_t)T0;
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    EAX = (EAX & ~0xffff) | (res & 0xffff);
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    CC_DST = res;
215
    CC_SRC = (res != (int8_t)res);
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}
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218
void OPPROTO op_mulw_AX_T0(void)
219
{
220
    unsigned int res;
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    res = (uint16_t)EAX * (uint16_t)T0;
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    EAX = (EAX & ~0xffff) | (res & 0xffff);
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    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = res >> 16;
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}
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void OPPROTO op_imulw_AX_T0(void)
229
{
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    int res;
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    res = (int16_t)EAX * (int16_t)T0;
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    EAX = (EAX & ~0xffff) | (res & 0xffff);
233
    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
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    CC_DST = res;
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    CC_SRC = (res != (int16_t)res);
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}
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238
void OPPROTO op_mull_EAX_T0(void)
239
{
240
    uint64_t res;
241
    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
242
    EAX = (uint32_t)res;
243
    EDX = (uint32_t)(res >> 32);
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    CC_DST = (uint32_t)res;
245
    CC_SRC = (uint32_t)(res >> 32);
246
}
247

    
248
void OPPROTO op_imull_EAX_T0(void)
249
{
250
    int64_t res;
251
    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
252
    EAX = (uint32_t)(res);
253
    EDX = (uint32_t)(res >> 32);
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    CC_DST = res;
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    CC_SRC = (res != (int32_t)res);
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}
257

    
258
void OPPROTO op_imulw_T0_T1(void)
259
{
260
    int res;
261
    res = (int16_t)T0 * (int16_t)T1;
262
    T0 = res;
263
    CC_DST = res;
264
    CC_SRC = (res != (int16_t)res);
265
}
266

    
267
void OPPROTO op_imull_T0_T1(void)
268
{
269
    int64_t res;
270
    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
271
    T0 = res;
272
    CC_DST = res;
273
    CC_SRC = (res != (int32_t)res);
274
}
275

    
276
#ifdef TARGET_X86_64
277
void OPPROTO op_mulq_EAX_T0(void)
278
{
279
    helper_mulq_EAX_T0();
280
}
281

    
282
void OPPROTO op_imulq_EAX_T0(void)
283
{
284
    helper_imulq_EAX_T0();
285
}
286

    
287
void OPPROTO op_imulq_T0_T1(void)
288
{
289
    helper_imulq_T0_T1();
290
}
291
#endif
292

    
293
/* division, flags are undefined */
294

    
295
void OPPROTO op_divb_AL_T0(void)
296
{
297
    unsigned int num, den, q, r;
298

    
299
    num = (EAX & 0xffff);
300
    den = (T0 & 0xff);
301
    if (den == 0) {
302
        raise_exception(EXCP00_DIVZ);
303
    }
304
    q = (num / den);
305
    if (q > 0xff)
306
        raise_exception(EXCP00_DIVZ);
307
    q &= 0xff;
308
    r = (num % den) & 0xff;
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    EAX = (EAX & ~0xffff) | (r << 8) | q;
310
}
311

    
312
void OPPROTO op_idivb_AL_T0(void)
313
{
314
    int num, den, q, r;
315

    
316
    num = (int16_t)EAX;
317
    den = (int8_t)T0;
318
    if (den == 0) {
319
        raise_exception(EXCP00_DIVZ);
320
    }
321
    q = (num / den);
322
    if (q != (int8_t)q)
323
        raise_exception(EXCP00_DIVZ);
324
    q &= 0xff;
325
    r = (num % den) & 0xff;
326
    EAX = (EAX & ~0xffff) | (r << 8) | q;
327
}
328

    
329
void OPPROTO op_divw_AX_T0(void)
330
{
331
    unsigned int num, den, q, r;
332

    
333
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
334
    den = (T0 & 0xffff);
335
    if (den == 0) {
336
        raise_exception(EXCP00_DIVZ);
337
    }
338
    q = (num / den);
339
    if (q > 0xffff)
340
        raise_exception(EXCP00_DIVZ);
341
    q &= 0xffff;
342
    r = (num % den) & 0xffff;
343
    EAX = (EAX & ~0xffff) | q;
344
    EDX = (EDX & ~0xffff) | r;
345
}
346

    
347
void OPPROTO op_idivw_AX_T0(void)
348
{
349
    int num, den, q, r;
350

    
351
    num = (EAX & 0xffff) | ((EDX & 0xffff) << 16);
352
    den = (int16_t)T0;
353
    if (den == 0) {
354
        raise_exception(EXCP00_DIVZ);
355
    }
356
    q = (num / den);
357
    if (q != (int16_t)q)
358
        raise_exception(EXCP00_DIVZ);
359
    q &= 0xffff;
360
    r = (num % den) & 0xffff;
361
    EAX = (EAX & ~0xffff) | q;
362
    EDX = (EDX & ~0xffff) | r;
363
}
364

    
365
#ifdef TARGET_X86_64
366
void OPPROTO op_divq_EAX_T0(void)
367
{
368
    helper_divq_EAX_T0();
369
}
370

    
371
void OPPROTO op_idivq_EAX_T0(void)
372
{
373
    helper_idivq_EAX_T0();
374
}
375
#endif
376

    
377
/* constant load & misc op */
378

    
379
/* XXX: consistent names */
380
void OPPROTO op_addl_T1_im(void)
381
{
382
    T1 += PARAM1;
383
}
384

    
385
void OPPROTO op_movl_T1_A0(void)
386
{
387
    T1 = A0;
388
}
389

    
390
void OPPROTO op_addl_A0_AL(void)
391
{
392
    A0 = (uint32_t)(A0 + (EAX & 0xff));
393
}
394

    
395
#ifdef WORDS_BIGENDIAN
396
typedef union UREG64 {
397
    struct { uint16_t v3, v2, v1, v0; } w;
398
    struct { uint32_t v1, v0; } l;
399
    uint64_t q;
400
} UREG64;
401
#else
402
typedef union UREG64 {
403
    struct { uint16_t v0, v1, v2, v3; } w;
404
    struct { uint32_t v0, v1; } l;
405
    uint64_t q;
406
} UREG64;
407
#endif
408

    
409
#define PARAMQ1 \
410
({\
411
    UREG64 __p;\
412
    __p.l.v1 = PARAM1;\
413
    __p.l.v0 = PARAM2;\
414
    __p.q;\
415
})
416

    
417
#ifdef TARGET_X86_64
418

    
419
void OPPROTO op_addq_A0_AL(void)
420
{
421
    A0 = (A0 + (EAX & 0xff));
422
}
423

    
424
#endif
425

    
426
void OPPROTO op_hlt(void)
427
{
428
    helper_hlt();
429
}
430

    
431
void OPPROTO op_monitor(void)
432
{
433
    helper_monitor();
434
}
435

    
436
void OPPROTO op_mwait(void)
437
{
438
    helper_mwait();
439
}
440

    
441
void OPPROTO op_debug(void)
442
{
443
    env->exception_index = EXCP_DEBUG;
444
    cpu_loop_exit();
445
}
446

    
447
void OPPROTO op_raise_interrupt(void)
448
{
449
    int intno, next_eip_addend;
450
    intno = PARAM1;
451
    next_eip_addend = PARAM2;
452
    raise_interrupt(intno, 1, 0, next_eip_addend);
453
}
454

    
455
void OPPROTO op_raise_exception(void)
456
{
457
    int exception_index;
458
    exception_index = PARAM1;
459
    raise_exception(exception_index);
460
}
461

    
462
void OPPROTO op_into(void)
463
{
464
    int eflags;
465
    eflags = cc_table[CC_OP].compute_all();
466
    if (eflags & CC_O) {
467
        raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
468
    }
469
    FORCE_RET();
470
}
471

    
472
void OPPROTO op_cli(void)
473
{
474
    env->eflags &= ~IF_MASK;
475
}
476

    
477
void OPPROTO op_sti(void)
478
{
479
    env->eflags |= IF_MASK;
480
}
481

    
482
void OPPROTO op_set_inhibit_irq(void)
483
{
484
    env->hflags |= HF_INHIBIT_IRQ_MASK;
485
}
486

    
487
void OPPROTO op_reset_inhibit_irq(void)
488
{
489
    env->hflags &= ~HF_INHIBIT_IRQ_MASK;
490
}
491

    
492
void OPPROTO op_rsm(void)
493
{
494
    helper_rsm();
495
}
496

    
497
#if 0
498
/* vm86plus instructions */
499
void OPPROTO op_cli_vm(void)
500
{
501
    env->eflags &= ~VIF_MASK;
502
}
503

504
void OPPROTO op_sti_vm(void)
505
{
506
    env->eflags |= VIF_MASK;
507
    if (env->eflags & VIP_MASK) {
508
        EIP = PARAM1;
509
        raise_exception(EXCP0D_GPF);
510
    }
511
    FORCE_RET();
512
}
513
#endif
514

    
515
void OPPROTO op_boundw(void)
516
{
517
    int low, high, v;
518
    low = ldsw(A0);
519
    high = ldsw(A0 + 2);
520
    v = (int16_t)T0;
521
    if (v < low || v > high) {
522
        raise_exception(EXCP05_BOUND);
523
    }
524
    FORCE_RET();
525
}
526

    
527
void OPPROTO op_boundl(void)
528
{
529
    int low, high, v;
530
    low = ldl(A0);
531
    high = ldl(A0 + 4);
532
    v = T0;
533
    if (v < low || v > high) {
534
        raise_exception(EXCP05_BOUND);
535
    }
536
    FORCE_RET();
537
}
538

    
539
void OPPROTO op_cmpxchg8b(void)
540
{
541
    helper_cmpxchg8b();
542
}
543

    
544
void OPPROTO op_single_step(void)
545
{
546
    helper_single_step();
547
}
548

    
549
/* multiple size ops */
550

    
551
#define ldul ldl
552

    
553
#define SHIFT 0
554
#include "ops_template.h"
555
#undef SHIFT
556

    
557
#define SHIFT 1
558
#include "ops_template.h"
559
#undef SHIFT
560

    
561
#define SHIFT 2
562
#include "ops_template.h"
563
#undef SHIFT
564

    
565
#ifdef TARGET_X86_64
566

    
567
#define SHIFT 3
568
#include "ops_template.h"
569
#undef SHIFT
570

    
571
#endif
572

    
573
/* sign extend */
574

    
575
void OPPROTO op_movsbl_T0_T0(void)
576
{
577
    T0 = (int8_t)T0;
578
}
579

    
580
void OPPROTO op_movzbl_T0_T0(void)
581
{
582
    T0 = (uint8_t)T0;
583
}
584

    
585
void OPPROTO op_movswl_T0_T0(void)
586
{
587
    T0 = (int16_t)T0;
588
}
589

    
590
void OPPROTO op_movzwl_T0_T0(void)
591
{
592
    T0 = (uint16_t)T0;
593
}
594

    
595
void OPPROTO op_movswl_EAX_AX(void)
596
{
597
    EAX = (uint32_t)((int16_t)EAX);
598
}
599

    
600
#ifdef TARGET_X86_64
601
void OPPROTO op_movslq_T0_T0(void)
602
{
603
    T0 = (int32_t)T0;
604
}
605

    
606
void OPPROTO op_movslq_RAX_EAX(void)
607
{
608
    EAX = (int32_t)EAX;
609
}
610
#endif
611

    
612
void OPPROTO op_movsbw_AX_AL(void)
613
{
614
    EAX = (EAX & ~0xffff) | ((int8_t)EAX & 0xffff);
615
}
616

    
617
void OPPROTO op_movslq_EDX_EAX(void)
618
{
619
    EDX = (uint32_t)((int32_t)EAX >> 31);
620
}
621

    
622
void OPPROTO op_movswl_DX_AX(void)
623
{
624
    EDX = (EDX & ~0xffff) | (((int16_t)EAX >> 15) & 0xffff);
625
}
626

    
627
#ifdef TARGET_X86_64
628
void OPPROTO op_movsqo_RDX_RAX(void)
629
{
630
    EDX = (int64_t)EAX >> 63;
631
}
632
#endif
633

    
634
/* string ops helpers */
635

    
636
void OPPROTO op_addl_ESI_T0(void)
637
{
638
    ESI = (uint32_t)(ESI + T0);
639
}
640

    
641
void OPPROTO op_addw_ESI_T0(void)
642
{
643
    ESI = (ESI & ~0xffff) | ((ESI + T0) & 0xffff);
644
}
645

    
646
void OPPROTO op_addl_EDI_T0(void)
647
{
648
    EDI = (uint32_t)(EDI + T0);
649
}
650

    
651
void OPPROTO op_addw_EDI_T0(void)
652
{
653
    EDI = (EDI & ~0xffff) | ((EDI + T0) & 0xffff);
654
}
655

    
656
void OPPROTO op_decl_ECX(void)
657
{
658
    ECX = (uint32_t)(ECX - 1);
659
}
660

    
661
void OPPROTO op_decw_ECX(void)
662
{
663
    ECX = (ECX & ~0xffff) | ((ECX - 1) & 0xffff);
664
}
665

    
666
#ifdef TARGET_X86_64
667
void OPPROTO op_addq_ESI_T0(void)
668
{
669
    ESI = (ESI + T0);
670
}
671

    
672
void OPPROTO op_addq_EDI_T0(void)
673
{
674
    EDI = (EDI + T0);
675
}
676

    
677
void OPPROTO op_decq_ECX(void)
678
{
679
    ECX--;
680
}
681
#endif
682

    
683
void OPPROTO op_rdtsc(void)
684
{
685
    helper_rdtsc();
686
}
687

    
688
void OPPROTO op_rdpmc(void)
689
{
690
    helper_rdpmc();
691
}
692

    
693
void OPPROTO op_cpuid(void)
694
{
695
    helper_cpuid();
696
}
697

    
698
void OPPROTO op_enter_level(void)
699
{
700
    helper_enter_level(PARAM1, PARAM2);
701
}
702

    
703
#ifdef TARGET_X86_64
704
void OPPROTO op_enter64_level(void)
705
{
706
    helper_enter64_level(PARAM1, PARAM2);
707
}
708
#endif
709

    
710
void OPPROTO op_sysenter(void)
711
{
712
    helper_sysenter();
713
}
714

    
715
void OPPROTO op_sysexit(void)
716
{
717
    helper_sysexit();
718
}
719

    
720
#ifdef TARGET_X86_64
721
void OPPROTO op_syscall(void)
722
{
723
    helper_syscall(PARAM1);
724
}
725

    
726
void OPPROTO op_sysret(void)
727
{
728
    helper_sysret(PARAM1);
729
}
730
#endif
731

    
732
void OPPROTO op_rdmsr(void)
733
{
734
    helper_rdmsr();
735
}
736

    
737
void OPPROTO op_wrmsr(void)
738
{
739
    helper_wrmsr();
740
}
741

    
742
/* bcd */
743

    
744
/* XXX: exception */
745
void OPPROTO op_aam(void)
746
{
747
    int base = PARAM1;
748
    int al, ah;
749
    al = EAX & 0xff;
750
    ah = al / base;
751
    al = al % base;
752
    EAX = (EAX & ~0xffff) | al | (ah << 8);
753
    CC_DST = al;
754
}
755

    
756
void OPPROTO op_aad(void)
757
{
758
    int base = PARAM1;
759
    int al, ah;
760
    al = EAX & 0xff;
761
    ah = (EAX >> 8) & 0xff;
762
    al = ((ah * base) + al) & 0xff;
763
    EAX = (EAX & ~0xffff) | al;
764
    CC_DST = al;
765
}
766

    
767
void OPPROTO op_aaa(void)
768
{
769
    int icarry;
770
    int al, ah, af;
771
    int eflags;
772

    
773
    eflags = cc_table[CC_OP].compute_all();
774
    af = eflags & CC_A;
775
    al = EAX & 0xff;
776
    ah = (EAX >> 8) & 0xff;
777

    
778
    icarry = (al > 0xf9);
779
    if (((al & 0x0f) > 9 ) || af) {
780
        al = (al + 6) & 0x0f;
781
        ah = (ah + 1 + icarry) & 0xff;
782
        eflags |= CC_C | CC_A;
783
    } else {
784
        eflags &= ~(CC_C | CC_A);
785
        al &= 0x0f;
786
    }
787
    EAX = (EAX & ~0xffff) | al | (ah << 8);
788
    CC_SRC = eflags;
789
    FORCE_RET();
790
}
791

    
792
void OPPROTO op_aas(void)
793
{
794
    int icarry;
795
    int al, ah, af;
796
    int eflags;
797

    
798
    eflags = cc_table[CC_OP].compute_all();
799
    af = eflags & CC_A;
800
    al = EAX & 0xff;
801
    ah = (EAX >> 8) & 0xff;
802

    
803
    icarry = (al < 6);
804
    if (((al & 0x0f) > 9 ) || af) {
805
        al = (al - 6) & 0x0f;
806
        ah = (ah - 1 - icarry) & 0xff;
807
        eflags |= CC_C | CC_A;
808
    } else {
809
        eflags &= ~(CC_C | CC_A);
810
        al &= 0x0f;
811
    }
812
    EAX = (EAX & ~0xffff) | al | (ah << 8);
813
    CC_SRC = eflags;
814
    FORCE_RET();
815
}
816

    
817
void OPPROTO op_daa(void)
818
{
819
    int al, af, cf;
820
    int eflags;
821

    
822
    eflags = cc_table[CC_OP].compute_all();
823
    cf = eflags & CC_C;
824
    af = eflags & CC_A;
825
    al = EAX & 0xff;
826

    
827
    eflags = 0;
828
    if (((al & 0x0f) > 9 ) || af) {
829
        al = (al + 6) & 0xff;
830
        eflags |= CC_A;
831
    }
832
    if ((al > 0x9f) || cf) {
833
        al = (al + 0x60) & 0xff;
834
        eflags |= CC_C;
835
    }
836
    EAX = (EAX & ~0xff) | al;
837
    /* well, speed is not an issue here, so we compute the flags by hand */
838
    eflags |= (al == 0) << 6; /* zf */
839
    eflags |= parity_table[al]; /* pf */
840
    eflags |= (al & 0x80); /* sf */
841
    CC_SRC = eflags;
842
    FORCE_RET();
843
}
844

    
845
void OPPROTO op_das(void)
846
{
847
    int al, al1, af, cf;
848
    int eflags;
849

    
850
    eflags = cc_table[CC_OP].compute_all();
851
    cf = eflags & CC_C;
852
    af = eflags & CC_A;
853
    al = EAX & 0xff;
854

    
855
    eflags = 0;
856
    al1 = al;
857
    if (((al & 0x0f) > 9 ) || af) {
858
        eflags |= CC_A;
859
        if (al < 6 || cf)
860
            eflags |= CC_C;
861
        al = (al - 6) & 0xff;
862
    }
863
    if ((al1 > 0x99) || cf) {
864
        al = (al - 0x60) & 0xff;
865
        eflags |= CC_C;
866
    }
867
    EAX = (EAX & ~0xff) | al;
868
    /* well, speed is not an issue here, so we compute the flags by hand */
869
    eflags |= (al == 0) << 6; /* zf */
870
    eflags |= parity_table[al]; /* pf */
871
    eflags |= (al & 0x80); /* sf */
872
    CC_SRC = eflags;
873
    FORCE_RET();
874
}
875

    
876
/* segment handling */
877

    
878
/* never use it with R_CS */
879
void OPPROTO op_movl_seg_T0(void)
880
{
881
    load_seg(PARAM1, T0);
882
}
883

    
884
/* faster VM86 version */
885
void OPPROTO op_movl_seg_T0_vm(void)
886
{
887
    int selector;
888
    SegmentCache *sc;
889

    
890
    selector = T0 & 0xffff;
891
    /* env->segs[] access */
892
    sc = (SegmentCache *)((char *)env + PARAM1);
893
    sc->selector = selector;
894
    sc->base = (selector << 4);
895
}
896

    
897
void OPPROTO op_movl_T0_seg(void)
898
{
899
    T0 = env->segs[PARAM1].selector;
900
}
901

    
902
void OPPROTO op_lsl(void)
903
{
904
    helper_lsl();
905
}
906

    
907
void OPPROTO op_lar(void)
908
{
909
    helper_lar();
910
}
911

    
912
void OPPROTO op_verr(void)
913
{
914
    helper_verr();
915
}
916

    
917
void OPPROTO op_verw(void)
918
{
919
    helper_verw();
920
}
921

    
922
void OPPROTO op_arpl(void)
923
{
924
    if ((T0 & 3) < (T1 & 3)) {
925
        /* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
926
        T0 = (T0 & ~3) | (T1 & 3);
927
        T1 = CC_Z;
928
   } else {
929
        T1 = 0;
930
    }
931
    FORCE_RET();
932
}
933

    
934
void OPPROTO op_arpl_update(void)
935
{
936
    int eflags;
937
    eflags = cc_table[CC_OP].compute_all();
938
    CC_SRC = (eflags & ~CC_Z) | T1;
939
}
940

    
941
/* T0: segment, T1:eip */
942
void OPPROTO op_ljmp_protected_T0_T1(void)
943
{
944
    helper_ljmp_protected_T0_T1(PARAM1);
945
}
946

    
947
void OPPROTO op_lcall_real_T0_T1(void)
948
{
949
    helper_lcall_real_T0_T1(PARAM1, PARAM2);
950
}
951

    
952
void OPPROTO op_lcall_protected_T0_T1(void)
953
{
954
    helper_lcall_protected_T0_T1(PARAM1, PARAM2);
955
}
956

    
957
void OPPROTO op_iret_real(void)
958
{
959
    helper_iret_real(PARAM1);
960
}
961

    
962
void OPPROTO op_iret_protected(void)
963
{
964
    helper_iret_protected(PARAM1, PARAM2);
965
}
966

    
967
void OPPROTO op_lret_protected(void)
968
{
969
    helper_lret_protected(PARAM1, PARAM2);
970
}
971

    
972
void OPPROTO op_lldt_T0(void)
973
{
974
    helper_lldt_T0();
975
}
976

    
977
void OPPROTO op_ltr_T0(void)
978
{
979
    helper_ltr_T0();
980
}
981

    
982
/* CR registers access. */
983
void OPPROTO op_movl_crN_T0(void)
984
{
985
    helper_movl_crN_T0(PARAM1);
986
}
987

    
988
/* These pseudo-opcodes check for SVM intercepts. */
989
void OPPROTO op_svm_check_intercept(void)
990
{
991
    A0 = PARAM1 & PARAM2;
992
    svm_check_intercept(PARAMQ1);
993
}
994

    
995
void OPPROTO op_svm_check_intercept_param(void)
996
{
997
    A0 = PARAM1 & PARAM2;
998
    svm_check_intercept_param(PARAMQ1, T1);
999
}
1000

    
1001
void OPPROTO op_svm_vmexit(void)
1002
{
1003
    A0 = PARAM1 & PARAM2;
1004
    vmexit(PARAMQ1, T1);
1005
}
1006

    
1007
void OPPROTO op_geneflags(void)
1008
{
1009
    CC_SRC = cc_table[CC_OP].compute_all();
1010
}
1011

    
1012
/* This pseudo-opcode checks for IO intercepts. */
1013
#if !defined(CONFIG_USER_ONLY)
1014
void OPPROTO op_svm_check_intercept_io(void)
1015
{
1016
    A0 = PARAM1 & PARAM2;
1017
    /* PARAMQ1 = TYPE (0 = OUT, 1 = IN; 4 = STRING; 8 = REP)
1018
       T0      = PORT
1019
       T1      = next eip */
1020
    stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), T1);
1021
    /* ASIZE does not appear on real hw */
1022
    svm_check_intercept_param(SVM_EXIT_IOIO,
1023
                              (PARAMQ1 & ~SVM_IOIO_ASIZE_MASK) |
1024
                              ((T0 & 0xffff) << 16));
1025
}
1026
#endif
1027

    
1028
#if !defined(CONFIG_USER_ONLY)
1029
void OPPROTO op_movtl_T0_cr8(void)
1030
{
1031
    T0 = cpu_get_apic_tpr(env);
1032
}
1033
#endif
1034

    
1035
/* DR registers access */
1036
void OPPROTO op_movl_drN_T0(void)
1037
{
1038
    helper_movl_drN_T0(PARAM1);
1039
}
1040

    
1041
void OPPROTO op_lmsw_T0(void)
1042
{
1043
    /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
1044
       if already set to one. */
1045
    T0 = (env->cr[0] & ~0xe) | (T0 & 0xf);
1046
    helper_movl_crN_T0(0);
1047
}
1048

    
1049
void OPPROTO op_invlpg_A0(void)
1050
{
1051
    helper_invlpg(A0);
1052
}
1053

    
1054
void OPPROTO op_movl_T0_env(void)
1055
{
1056
    T0 = *(uint32_t *)((char *)env + PARAM1);
1057
}
1058

    
1059
void OPPROTO op_movl_env_T0(void)
1060
{
1061
    *(uint32_t *)((char *)env + PARAM1) = T0;
1062
}
1063

    
1064
void OPPROTO op_movl_env_T1(void)
1065
{
1066
    *(uint32_t *)((char *)env + PARAM1) = T1;
1067
}
1068

    
1069
void OPPROTO op_movtl_T0_env(void)
1070
{
1071
    T0 = *(target_ulong *)((char *)env + PARAM1);
1072
}
1073

    
1074
void OPPROTO op_movtl_env_T0(void)
1075
{
1076
    *(target_ulong *)((char *)env + PARAM1) = T0;
1077
}
1078

    
1079
void OPPROTO op_movtl_T1_env(void)
1080
{
1081
    T1 = *(target_ulong *)((char *)env + PARAM1);
1082
}
1083

    
1084
void OPPROTO op_movtl_env_T1(void)
1085
{
1086
    *(target_ulong *)((char *)env + PARAM1) = T1;
1087
}
1088

    
1089
void OPPROTO op_clts(void)
1090
{
1091
    env->cr[0] &= ~CR0_TS_MASK;
1092
    env->hflags &= ~HF_TS_MASK;
1093
}
1094

    
1095
/* flags handling */
1096

    
1097
void OPPROTO op_jmp_label(void)
1098
{
1099
    GOTO_LABEL_PARAM(1);
1100
}
1101

    
1102
void OPPROTO op_jnz_T0_label(void)
1103
{
1104
    if (T0)
1105
        GOTO_LABEL_PARAM(1);
1106
    FORCE_RET();
1107
}
1108

    
1109
void OPPROTO op_jz_T0_label(void)
1110
{
1111
    if (!T0)
1112
        GOTO_LABEL_PARAM(1);
1113
    FORCE_RET();
1114
}
1115

    
1116
/* slow set cases (compute x86 flags) */
1117
void OPPROTO op_seto_T0_cc(void)
1118
{
1119
    int eflags;
1120
    eflags = cc_table[CC_OP].compute_all();
1121
    T0 = (eflags >> 11) & 1;
1122
}
1123

    
1124
void OPPROTO op_setb_T0_cc(void)
1125
{
1126
    T0 = cc_table[CC_OP].compute_c();
1127
}
1128

    
1129
void OPPROTO op_setz_T0_cc(void)
1130
{
1131
    int eflags;
1132
    eflags = cc_table[CC_OP].compute_all();
1133
    T0 = (eflags >> 6) & 1;
1134
}
1135

    
1136
void OPPROTO op_setbe_T0_cc(void)
1137
{
1138
    int eflags;
1139
    eflags = cc_table[CC_OP].compute_all();
1140
    T0 = (eflags & (CC_Z | CC_C)) != 0;
1141
}
1142

    
1143
void OPPROTO op_sets_T0_cc(void)
1144
{
1145
    int eflags;
1146
    eflags = cc_table[CC_OP].compute_all();
1147
    T0 = (eflags >> 7) & 1;
1148
}
1149

    
1150
void OPPROTO op_setp_T0_cc(void)
1151
{
1152
    int eflags;
1153
    eflags = cc_table[CC_OP].compute_all();
1154
    T0 = (eflags >> 2) & 1;
1155
}
1156

    
1157
void OPPROTO op_setl_T0_cc(void)
1158
{
1159
    int eflags;
1160
    eflags = cc_table[CC_OP].compute_all();
1161
    T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
1162
}
1163

    
1164
void OPPROTO op_setle_T0_cc(void)
1165
{
1166
    int eflags;
1167
    eflags = cc_table[CC_OP].compute_all();
1168
    T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
1169
}
1170

    
1171
void OPPROTO op_xor_T0_1(void)
1172
{
1173
    T0 ^= 1;
1174
}
1175

    
1176
void OPPROTO op_mov_T0_cc(void)
1177
{
1178
    T0 = cc_table[CC_OP].compute_all();
1179
}
1180

    
1181
/* XXX: clear VIF/VIP in all ops ? */
1182

    
1183
void OPPROTO op_movl_eflags_T0(void)
1184
{
1185
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
1186
}
1187

    
1188
void OPPROTO op_movw_eflags_T0(void)
1189
{
1190
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
1191
}
1192

    
1193
void OPPROTO op_movl_eflags_T0_io(void)
1194
{
1195
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
1196
}
1197

    
1198
void OPPROTO op_movw_eflags_T0_io(void)
1199
{
1200
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
1201
}
1202

    
1203
void OPPROTO op_movl_eflags_T0_cpl0(void)
1204
{
1205
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
1206
}
1207

    
1208
void OPPROTO op_movw_eflags_T0_cpl0(void)
1209
{
1210
    load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
1211
}
1212

    
1213
#if 0
1214
/* vm86plus version */
1215
void OPPROTO op_movw_eflags_T0_vm(void)
1216
{
1217
    int eflags;
1218
    eflags = T0;
1219
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1220
    DF = 1 - (2 * ((eflags >> 10) & 1));
1221
    /* we also update some system flags as in user mode */
1222
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
1223
        (eflags & FL_UPDATE_MASK16);
1224
    if (eflags & IF_MASK) {
1225
        env->eflags |= VIF_MASK;
1226
        if (env->eflags & VIP_MASK) {
1227
            EIP = PARAM1;
1228
            raise_exception(EXCP0D_GPF);
1229
        }
1230
    }
1231
    FORCE_RET();
1232
}
1233

1234
void OPPROTO op_movl_eflags_T0_vm(void)
1235
{
1236
    int eflags;
1237
    eflags = T0;
1238
    CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
1239
    DF = 1 - (2 * ((eflags >> 10) & 1));
1240
    /* we also update some system flags as in user mode */
1241
    env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
1242
        (eflags & FL_UPDATE_MASK32);
1243
    if (eflags & IF_MASK) {
1244
        env->eflags |= VIF_MASK;
1245
        if (env->eflags & VIP_MASK) {
1246
            EIP = PARAM1;
1247
            raise_exception(EXCP0D_GPF);
1248
        }
1249
    }
1250
    FORCE_RET();
1251
}
1252
#endif
1253

    
1254
/* XXX: compute only O flag */
1255
void OPPROTO op_movb_eflags_T0(void)
1256
{
1257
    int of;
1258
    of = cc_table[CC_OP].compute_all() & CC_O;
1259
    CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
1260
}
1261

    
1262
void OPPROTO op_movl_T0_eflags(void)
1263
{
1264
    int eflags;
1265
    eflags = cc_table[CC_OP].compute_all();
1266
    eflags |= (DF & DF_MASK);
1267
    eflags |= env->eflags & ~(VM_MASK | RF_MASK);
1268
    T0 = eflags;
1269
}
1270

    
1271
/* vm86plus version */
1272
#if 0
1273
void OPPROTO op_movl_T0_eflags_vm(void)
1274
{
1275
    int eflags;
1276
    eflags = cc_table[CC_OP].compute_all();
1277
    eflags |= (DF & DF_MASK);
1278
    eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
1279
    if (env->eflags & VIF_MASK)
1280
        eflags |= IF_MASK;
1281
    T0 = eflags;
1282
}
1283
#endif
1284

    
1285
void OPPROTO op_cld(void)
1286
{
1287
    DF = 1;
1288
}
1289

    
1290
void OPPROTO op_std(void)
1291
{
1292
    DF = -1;
1293
}
1294

    
1295
void OPPROTO op_clc(void)
1296
{
1297
    int eflags;
1298
    eflags = cc_table[CC_OP].compute_all();
1299
    eflags &= ~CC_C;
1300
    CC_SRC = eflags;
1301
}
1302

    
1303
void OPPROTO op_stc(void)
1304
{
1305
    int eflags;
1306
    eflags = cc_table[CC_OP].compute_all();
1307
    eflags |= CC_C;
1308
    CC_SRC = eflags;
1309
}
1310

    
1311
void OPPROTO op_cmc(void)
1312
{
1313
    int eflags;
1314
    eflags = cc_table[CC_OP].compute_all();
1315
    eflags ^= CC_C;
1316
    CC_SRC = eflags;
1317
}
1318

    
1319
void OPPROTO op_salc(void)
1320
{
1321
    int cf;
1322
    cf = cc_table[CC_OP].compute_c();
1323
    EAX = (EAX & ~0xff) | ((-cf) & 0xff);
1324
}
1325

    
1326
static int compute_all_eflags(void)
1327
{
1328
    return CC_SRC;
1329
}
1330

    
1331
static int compute_c_eflags(void)
1332
{
1333
    return CC_SRC & CC_C;
1334
}
1335

    
1336
CCTable cc_table[CC_OP_NB] = {
1337
    [CC_OP_DYNAMIC] = { /* should never happen */ },
1338

    
1339
    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
1340

    
1341
    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
1342
    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
1343
    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
1344

    
1345
    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
1346
    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
1347
    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
1348

    
1349
    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
1350
    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
1351
    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
1352

    
1353
    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
1354
    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
1355
    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
1356

    
1357
    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
1358
    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
1359
    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
1360

    
1361
    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
1362
    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
1363
    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
1364

    
1365
    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
1366
    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
1367
    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
1368

    
1369
    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
1370
    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
1371
    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
1372

    
1373
    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
1374
    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
1375
    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
1376

    
1377
    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
1378
    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
1379
    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
1380

    
1381
#ifdef TARGET_X86_64
1382
    [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
1383

    
1384
    [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq  },
1385

    
1386
    [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq  },
1387

    
1388
    [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq  },
1389

    
1390
    [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq  },
1391

    
1392
    [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
1393

    
1394
    [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
1395

    
1396
    [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
1397

    
1398
    [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
1399

    
1400
    [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
1401
#endif
1402
};
1403

    
1404
void OPPROTO op_fcomi_dummy(void)
1405
{
1406
    T0 = 0;
1407
}
1408

    
1409
/* threading support */
1410
void OPPROTO op_lock(void)
1411
{
1412
    cpu_lock();
1413
}
1414

    
1415
void OPPROTO op_unlock(void)
1416
{
1417
    cpu_unlock();
1418
}
1419

    
1420
/* SSE support */
1421
void OPPROTO op_com_dummy(void)
1422
{
1423
    T0 = 0;
1424
}
1425

    
1426
/* Secure Virtual Machine ops */
1427

    
1428
void OPPROTO op_vmrun(void)
1429
{
1430
    helper_vmrun(EAX);
1431
}
1432

    
1433
void OPPROTO op_vmmcall(void)
1434
{
1435
    helper_vmmcall();
1436
}
1437

    
1438
void OPPROTO op_vmload(void)
1439
{
1440
    helper_vmload(EAX);
1441
}
1442

    
1443
void OPPROTO op_vmsave(void)
1444
{
1445
    helper_vmsave(EAX);
1446
}
1447

    
1448
void OPPROTO op_stgi(void)
1449
{
1450
    helper_stgi();
1451
}
1452

    
1453
void OPPROTO op_clgi(void)
1454
{
1455
    helper_clgi();
1456
}
1457

    
1458
void OPPROTO op_skinit(void)
1459
{
1460
    helper_skinit();
1461
}
1462

    
1463
void OPPROTO op_invlpga(void)
1464
{
1465
    helper_invlpga();
1466
}