root / hw / etraxfs_dma.h @ 1a1ea6f0
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| 1 | 1ba13a5d | edgar_igl | struct etraxfs_dma_client
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| 2 | 1ba13a5d | edgar_igl | {
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| 3 | 1ba13a5d | edgar_igl | /* DMA controller. */
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| 4 | 1ba13a5d | edgar_igl | int channel;
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| 5 | 1ba13a5d | edgar_igl | void *ctrl;
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| 6 | 1ba13a5d | edgar_igl | |
| 7 | 1ba13a5d | edgar_igl | /* client. */
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| 8 | 1ba13a5d | edgar_igl | struct
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| 9 | 1ba13a5d | edgar_igl | {
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| 10 | 1ba13a5d | edgar_igl | int (*push)(void *opaque, unsigned char *buf, int len); |
| 11 | 1ba13a5d | edgar_igl | void (*pull)(void *opaque); |
| 12 | 1ba13a5d | edgar_igl | void *opaque;
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| 13 | 1ba13a5d | edgar_igl | } client; |
| 14 | 1ba13a5d | edgar_igl | }; |
| 15 | 1ba13a5d | edgar_igl | |
| 16 | c227f099 | Anthony Liguori | void *etraxfs_dmac_init(target_phys_addr_t base, int nr_channels); |
| 17 | 1ba13a5d | edgar_igl | void etraxfs_dmac_connect(void *opaque, int channel, qemu_irq *line, |
| 18 | 1ba13a5d | edgar_igl | int input);
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| 19 | 1ba13a5d | edgar_igl | void etraxfs_dmac_connect_client(void *opaque, int c, |
| 20 | 1ba13a5d | edgar_igl | struct etraxfs_dma_client *cl);
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| 21 | 1ba13a5d | edgar_igl | int etraxfs_dmac_input(struct etraxfs_dma_client *client, |
| 22 | 1ba13a5d | edgar_igl | void *buf, int len, int eop); |