Revision 1a1f7dbc
| b/target-alpha/helper.h | ||
|---|---|---|
| 3 | 3 |
DEF_HELPER_0(tb_flush, void) |
| 4 | 4 |
|
| 5 | 5 |
DEF_HELPER_2(excp, void, int, int) |
| 6 |
DEF_HELPER_1(amask, i64, i64) |
|
| 7 | 6 |
DEF_HELPER_0(load_pcc, i64) |
| 8 | 7 |
DEF_HELPER_0(rc, i64) |
| 9 | 8 |
DEF_HELPER_0(rs, i64) |
| b/target-alpha/op_helper.c | ||
|---|---|---|
| 37 | 37 |
cpu_loop_exit(); |
| 38 | 38 |
} |
| 39 | 39 |
|
| 40 |
uint64_t helper_amask (uint64_t arg) |
|
| 41 |
{
|
|
| 42 |
switch (env->implver) {
|
|
| 43 |
case IMPLVER_2106x: |
|
| 44 |
/* EV4, EV45, LCA, LCA45 & EV5 */ |
|
| 45 |
break; |
|
| 46 |
case IMPLVER_21164: |
|
| 47 |
case IMPLVER_21264: |
|
| 48 |
case IMPLVER_21364: |
|
| 49 |
arg &= ~env->amask; |
|
| 50 |
break; |
|
| 51 |
} |
|
| 52 |
return arg; |
|
| 53 |
} |
|
| 54 |
|
|
| 55 | 40 |
uint64_t helper_load_pcc (void) |
| 56 | 41 |
{
|
| 57 | 42 |
/* XXX: TODO */ |
| b/target-alpha/translate.c | ||
|---|---|---|
| 1160 | 1160 |
/* AMASK */ |
| 1161 | 1161 |
if (likely(rc != 31)) {
|
| 1162 | 1162 |
if (islit) |
| 1163 |
tcg_gen_movi_i64(cpu_ir[rc], helper_amask(lit));
|
|
| 1163 |
tcg_gen_movi_i64(cpu_ir[rc], lit);
|
|
| 1164 | 1164 |
else |
| 1165 |
gen_helper_amask(cpu_ir[rc], cpu_ir[rb]); |
|
| 1165 |
tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[rb]); |
|
| 1166 |
switch (ctx->env->implver) {
|
|
| 1167 |
case IMPLVER_2106x: |
|
| 1168 |
/* EV4, EV45, LCA, LCA45 & EV5 */ |
|
| 1169 |
break; |
|
| 1170 |
case IMPLVER_21164: |
|
| 1171 |
case IMPLVER_21264: |
|
| 1172 |
case IMPLVER_21364: |
|
| 1173 |
tcg_gen_andi_i64(cpu_ir[rc], cpu_ir[rc], |
|
| 1174 |
~(uint64_t)ctx->amask); |
|
| 1175 |
break; |
|
| 1176 |
} |
|
| 1166 | 1177 |
} |
| 1167 | 1178 |
break; |
| 1168 | 1179 |
case 0x64: |
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