Revision 1b050077 target-i386/op_helper.c
| b/target-i386/op_helper.c | ||
|---|---|---|
| 2969 | 2969 |
EDX = (uint32_t)(val >> 32); |
| 2970 | 2970 |
} |
| 2971 | 2971 |
|
| 2972 |
void helper_rdtscp(void) |
|
| 2973 |
{
|
|
| 2974 |
helper_rdtsc(); |
|
| 2975 |
ECX = (uint32_t)(env->tsc_aux); |
|
| 2976 |
} |
|
| 2977 |
|
|
| 2972 | 2978 |
void helper_rdpmc(void) |
| 2973 | 2979 |
{
|
| 2974 | 2980 |
if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
|
| ... | ... | |
| 3107 | 3113 |
&& (val == 0 || val == ~(uint64_t)0)) |
| 3108 | 3114 |
env->mcg_ctl = val; |
| 3109 | 3115 |
break; |
| 3116 |
case MSR_TSC_AUX: |
|
| 3117 |
env->tsc_aux = val; |
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| 3118 |
break; |
|
| 3110 | 3119 |
default: |
| 3111 | 3120 |
if ((uint32_t)ECX >= MSR_MC0_CTL |
| 3112 | 3121 |
&& (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {
|
| ... | ... | |
| 3177 | 3186 |
case MSR_KERNELGSBASE: |
| 3178 | 3187 |
val = env->kernelgsbase; |
| 3179 | 3188 |
break; |
| 3189 |
case MSR_TSC_AUX: |
|
| 3190 |
val = env->tsc_aux; |
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| 3191 |
break; |
|
| 3180 | 3192 |
#endif |
| 3181 | 3193 |
case MSR_MTRRphysBase(0): |
| 3182 | 3194 |
case MSR_MTRRphysBase(1): |
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