Revision 1b050077 target-i386/translate.c

b/target-i386/translate.c
7206 7206
                gen_eob(s);
7207 7207
            }
7208 7208
            break;
7209
        case 7: /* invlpg */
7210
            if (s->cpl != 0) {
7211
                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
7209
        case 7:
7210
            if (mod != 3) { /* invlpg */
7211
                if (s->cpl != 0) {
7212
                    gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
7213
                } else {
7214
                    if (s->cc_op != CC_OP_DYNAMIC)
7215
                        gen_op_set_cc_op(s->cc_op);
7216
                    gen_jmp_im(pc_start - s->cs_base);
7217
                    gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
7218
                    gen_helper_invlpg(cpu_A0);
7219
                    gen_jmp_im(s->pc - s->cs_base);
7220
                    gen_eob(s);
7221
                }
7212 7222
            } else {
7213
                if (mod == 3) {
7223
                switch (rm) {
7224
                case 0: /* swapgs */
7214 7225
#ifdef TARGET_X86_64
7215
                    if (CODE64(s) && rm == 0) {
7216
                        /* swapgs */
7217
                        tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
7218
                        tcg_gen_ld_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,kernelgsbase));
7219
                        tcg_gen_st_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
7220
                        tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,kernelgsbase));
7226
                    if (CODE64(s)) {
7227
                        if (s->cpl != 0) {
7228
                            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
7229
                        } else {
7230
                            tcg_gen_ld_tl(cpu_T[0], cpu_env,
7231
                                offsetof(CPUX86State,segs[R_GS].base));
7232
                            tcg_gen_ld_tl(cpu_T[1], cpu_env,
7233
                                offsetof(CPUX86State,kernelgsbase));
7234
                            tcg_gen_st_tl(cpu_T[1], cpu_env,
7235
                                offsetof(CPUX86State,segs[R_GS].base));
7236
                            tcg_gen_st_tl(cpu_T[0], cpu_env,
7237
                                offsetof(CPUX86State,kernelgsbase));
7238
                        }
7221 7239
                    } else
7222 7240
#endif
7223 7241
                    {
7224 7242
                        goto illegal_op;
7225 7243
                    }
7226
                } else {
7244
                    break;
7245
                case 1: /* rdtscp */
7246
                    if (!(s->cpuid_ext2_features & CPUID_EXT2_RDTSCP))
7247
                        goto illegal_op;
7227 7248
                    if (s->cc_op != CC_OP_DYNAMIC)
7228 7249
                        gen_op_set_cc_op(s->cc_op);
7229 7250
                    gen_jmp_im(pc_start - s->cs_base);
7230
                    gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
7231
                    gen_helper_invlpg(cpu_A0);
7232
                    gen_jmp_im(s->pc - s->cs_base);
7233
                    gen_eob(s);
7251
                    if (use_icount)
7252
                        gen_io_start();
7253
                    gen_helper_rdtscp();
7254
                    if (use_icount) {
7255
                        gen_io_end();
7256
                        gen_jmp(s, s->pc - s->cs_base);
7257
                    }
7258
                    break;
7259
                default:
7260
                    goto illegal_op;
7234 7261
                }
7235 7262
            }
7236 7263
            break;

Also available in: Unified diff