root / opc-i386.h @ 1b6b029e
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| 1 |
DEF(end) |
|---|---|
| 2 |
DEF(movl_A0_EAX) |
| 3 |
DEF(addl_A0_EAX) |
| 4 |
DEF(addl_A0_EAX_s1) |
| 5 |
DEF(addl_A0_EAX_s2) |
| 6 |
DEF(addl_A0_EAX_s3) |
| 7 |
DEF(movl_T0_EAX) |
| 8 |
DEF(movl_T1_EAX) |
| 9 |
DEF(movh_T0_EAX) |
| 10 |
DEF(movh_T1_EAX) |
| 11 |
DEF(movl_EAX_T0) |
| 12 |
DEF(movl_EAX_T1) |
| 13 |
DEF(movl_EAX_A0) |
| 14 |
DEF(cmovw_EAX_T1_T0) |
| 15 |
DEF(cmovl_EAX_T1_T0) |
| 16 |
DEF(movw_EAX_T0) |
| 17 |
DEF(movw_EAX_T1) |
| 18 |
DEF(movw_EAX_A0) |
| 19 |
DEF(movb_EAX_T0) |
| 20 |
DEF(movh_EAX_T0) |
| 21 |
DEF(movb_EAX_T1) |
| 22 |
DEF(movh_EAX_T1) |
| 23 |
DEF(movl_A0_ECX) |
| 24 |
DEF(addl_A0_ECX) |
| 25 |
DEF(addl_A0_ECX_s1) |
| 26 |
DEF(addl_A0_ECX_s2) |
| 27 |
DEF(addl_A0_ECX_s3) |
| 28 |
DEF(movl_T0_ECX) |
| 29 |
DEF(movl_T1_ECX) |
| 30 |
DEF(movh_T0_ECX) |
| 31 |
DEF(movh_T1_ECX) |
| 32 |
DEF(movl_ECX_T0) |
| 33 |
DEF(movl_ECX_T1) |
| 34 |
DEF(movl_ECX_A0) |
| 35 |
DEF(cmovw_ECX_T1_T0) |
| 36 |
DEF(cmovl_ECX_T1_T0) |
| 37 |
DEF(movw_ECX_T0) |
| 38 |
DEF(movw_ECX_T1) |
| 39 |
DEF(movw_ECX_A0) |
| 40 |
DEF(movb_ECX_T0) |
| 41 |
DEF(movh_ECX_T0) |
| 42 |
DEF(movb_ECX_T1) |
| 43 |
DEF(movh_ECX_T1) |
| 44 |
DEF(movl_A0_EDX) |
| 45 |
DEF(addl_A0_EDX) |
| 46 |
DEF(addl_A0_EDX_s1) |
| 47 |
DEF(addl_A0_EDX_s2) |
| 48 |
DEF(addl_A0_EDX_s3) |
| 49 |
DEF(movl_T0_EDX) |
| 50 |
DEF(movl_T1_EDX) |
| 51 |
DEF(movh_T0_EDX) |
| 52 |
DEF(movh_T1_EDX) |
| 53 |
DEF(movl_EDX_T0) |
| 54 |
DEF(movl_EDX_T1) |
| 55 |
DEF(movl_EDX_A0) |
| 56 |
DEF(cmovw_EDX_T1_T0) |
| 57 |
DEF(cmovl_EDX_T1_T0) |
| 58 |
DEF(movw_EDX_T0) |
| 59 |
DEF(movw_EDX_T1) |
| 60 |
DEF(movw_EDX_A0) |
| 61 |
DEF(movb_EDX_T0) |
| 62 |
DEF(movh_EDX_T0) |
| 63 |
DEF(movb_EDX_T1) |
| 64 |
DEF(movh_EDX_T1) |
| 65 |
DEF(movl_A0_EBX) |
| 66 |
DEF(addl_A0_EBX) |
| 67 |
DEF(addl_A0_EBX_s1) |
| 68 |
DEF(addl_A0_EBX_s2) |
| 69 |
DEF(addl_A0_EBX_s3) |
| 70 |
DEF(movl_T0_EBX) |
| 71 |
DEF(movl_T1_EBX) |
| 72 |
DEF(movh_T0_EBX) |
| 73 |
DEF(movh_T1_EBX) |
| 74 |
DEF(movl_EBX_T0) |
| 75 |
DEF(movl_EBX_T1) |
| 76 |
DEF(movl_EBX_A0) |
| 77 |
DEF(cmovw_EBX_T1_T0) |
| 78 |
DEF(cmovl_EBX_T1_T0) |
| 79 |
DEF(movw_EBX_T0) |
| 80 |
DEF(movw_EBX_T1) |
| 81 |
DEF(movw_EBX_A0) |
| 82 |
DEF(movb_EBX_T0) |
| 83 |
DEF(movh_EBX_T0) |
| 84 |
DEF(movb_EBX_T1) |
| 85 |
DEF(movh_EBX_T1) |
| 86 |
DEF(movl_A0_ESP) |
| 87 |
DEF(addl_A0_ESP) |
| 88 |
DEF(addl_A0_ESP_s1) |
| 89 |
DEF(addl_A0_ESP_s2) |
| 90 |
DEF(addl_A0_ESP_s3) |
| 91 |
DEF(movl_T0_ESP) |
| 92 |
DEF(movl_T1_ESP) |
| 93 |
DEF(movh_T0_ESP) |
| 94 |
DEF(movh_T1_ESP) |
| 95 |
DEF(movl_ESP_T0) |
| 96 |
DEF(movl_ESP_T1) |
| 97 |
DEF(movl_ESP_A0) |
| 98 |
DEF(cmovw_ESP_T1_T0) |
| 99 |
DEF(cmovl_ESP_T1_T0) |
| 100 |
DEF(movw_ESP_T0) |
| 101 |
DEF(movw_ESP_T1) |
| 102 |
DEF(movw_ESP_A0) |
| 103 |
DEF(movb_ESP_T0) |
| 104 |
DEF(movh_ESP_T0) |
| 105 |
DEF(movb_ESP_T1) |
| 106 |
DEF(movh_ESP_T1) |
| 107 |
DEF(movl_A0_EBP) |
| 108 |
DEF(addl_A0_EBP) |
| 109 |
DEF(addl_A0_EBP_s1) |
| 110 |
DEF(addl_A0_EBP_s2) |
| 111 |
DEF(addl_A0_EBP_s3) |
| 112 |
DEF(movl_T0_EBP) |
| 113 |
DEF(movl_T1_EBP) |
| 114 |
DEF(movh_T0_EBP) |
| 115 |
DEF(movh_T1_EBP) |
| 116 |
DEF(movl_EBP_T0) |
| 117 |
DEF(movl_EBP_T1) |
| 118 |
DEF(movl_EBP_A0) |
| 119 |
DEF(cmovw_EBP_T1_T0) |
| 120 |
DEF(cmovl_EBP_T1_T0) |
| 121 |
DEF(movw_EBP_T0) |
| 122 |
DEF(movw_EBP_T1) |
| 123 |
DEF(movw_EBP_A0) |
| 124 |
DEF(movb_EBP_T0) |
| 125 |
DEF(movh_EBP_T0) |
| 126 |
DEF(movb_EBP_T1) |
| 127 |
DEF(movh_EBP_T1) |
| 128 |
DEF(movl_A0_ESI) |
| 129 |
DEF(addl_A0_ESI) |
| 130 |
DEF(addl_A0_ESI_s1) |
| 131 |
DEF(addl_A0_ESI_s2) |
| 132 |
DEF(addl_A0_ESI_s3) |
| 133 |
DEF(movl_T0_ESI) |
| 134 |
DEF(movl_T1_ESI) |
| 135 |
DEF(movh_T0_ESI) |
| 136 |
DEF(movh_T1_ESI) |
| 137 |
DEF(movl_ESI_T0) |
| 138 |
DEF(movl_ESI_T1) |
| 139 |
DEF(movl_ESI_A0) |
| 140 |
DEF(cmovw_ESI_T1_T0) |
| 141 |
DEF(cmovl_ESI_T1_T0) |
| 142 |
DEF(movw_ESI_T0) |
| 143 |
DEF(movw_ESI_T1) |
| 144 |
DEF(movw_ESI_A0) |
| 145 |
DEF(movb_ESI_T0) |
| 146 |
DEF(movh_ESI_T0) |
| 147 |
DEF(movb_ESI_T1) |
| 148 |
DEF(movh_ESI_T1) |
| 149 |
DEF(movl_A0_EDI) |
| 150 |
DEF(addl_A0_EDI) |
| 151 |
DEF(addl_A0_EDI_s1) |
| 152 |
DEF(addl_A0_EDI_s2) |
| 153 |
DEF(addl_A0_EDI_s3) |
| 154 |
DEF(movl_T0_EDI) |
| 155 |
DEF(movl_T1_EDI) |
| 156 |
DEF(movh_T0_EDI) |
| 157 |
DEF(movh_T1_EDI) |
| 158 |
DEF(movl_EDI_T0) |
| 159 |
DEF(movl_EDI_T1) |
| 160 |
DEF(movl_EDI_A0) |
| 161 |
DEF(cmovw_EDI_T1_T0) |
| 162 |
DEF(cmovl_EDI_T1_T0) |
| 163 |
DEF(movw_EDI_T0) |
| 164 |
DEF(movw_EDI_T1) |
| 165 |
DEF(movw_EDI_A0) |
| 166 |
DEF(movb_EDI_T0) |
| 167 |
DEF(movh_EDI_T0) |
| 168 |
DEF(movb_EDI_T1) |
| 169 |
DEF(movh_EDI_T1) |
| 170 |
DEF(addl_T0_T1_cc) |
| 171 |
DEF(orl_T0_T1_cc) |
| 172 |
DEF(andl_T0_T1_cc) |
| 173 |
DEF(subl_T0_T1_cc) |
| 174 |
DEF(xorl_T0_T1_cc) |
| 175 |
DEF(cmpl_T0_T1_cc) |
| 176 |
DEF(negl_T0_cc) |
| 177 |
DEF(incl_T0_cc) |
| 178 |
DEF(decl_T0_cc) |
| 179 |
DEF(testl_T0_T1_cc) |
| 180 |
DEF(addl_T0_T1) |
| 181 |
DEF(orl_T0_T1) |
| 182 |
DEF(andl_T0_T1) |
| 183 |
DEF(subl_T0_T1) |
| 184 |
DEF(xorl_T0_T1) |
| 185 |
DEF(negl_T0) |
| 186 |
DEF(incl_T0) |
| 187 |
DEF(decl_T0) |
| 188 |
DEF(notl_T0) |
| 189 |
DEF(bswapl_T0) |
| 190 |
DEF(mulb_AL_T0) |
| 191 |
DEF(imulb_AL_T0) |
| 192 |
DEF(mulw_AX_T0) |
| 193 |
DEF(imulw_AX_T0) |
| 194 |
DEF(mull_EAX_T0) |
| 195 |
DEF(imull_EAX_T0) |
| 196 |
DEF(imulw_T0_T1) |
| 197 |
DEF(imull_T0_T1) |
| 198 |
DEF(divb_AL_T0) |
| 199 |
DEF(idivb_AL_T0) |
| 200 |
DEF(divw_AX_T0) |
| 201 |
DEF(idivw_AX_T0) |
| 202 |
DEF(divl_EAX_T0) |
| 203 |
DEF(idivl_EAX_T0) |
| 204 |
DEF(movl_T0_im) |
| 205 |
DEF(addl_T0_im) |
| 206 |
DEF(andl_T0_ffff) |
| 207 |
DEF(movl_T0_T1) |
| 208 |
DEF(movl_T1_im) |
| 209 |
DEF(addl_T1_im) |
| 210 |
DEF(movl_T1_A0) |
| 211 |
DEF(movl_A0_im) |
| 212 |
DEF(addl_A0_im) |
| 213 |
DEF(andl_A0_ffff) |
| 214 |
DEF(ldub_T0_A0) |
| 215 |
DEF(ldsb_T0_A0) |
| 216 |
DEF(lduw_T0_A0) |
| 217 |
DEF(ldsw_T0_A0) |
| 218 |
DEF(ldl_T0_A0) |
| 219 |
DEF(ldub_T1_A0) |
| 220 |
DEF(ldsb_T1_A0) |
| 221 |
DEF(lduw_T1_A0) |
| 222 |
DEF(ldsw_T1_A0) |
| 223 |
DEF(ldl_T1_A0) |
| 224 |
DEF(stb_T0_A0) |
| 225 |
DEF(stw_T0_A0) |
| 226 |
DEF(stl_T0_A0) |
| 227 |
DEF(add_bitw_A0_T1) |
| 228 |
DEF(add_bitl_A0_T1) |
| 229 |
DEF(jmp_T0) |
| 230 |
DEF(jmp_im) |
| 231 |
DEF(int_im) |
| 232 |
DEF(int3) |
| 233 |
DEF(into) |
| 234 |
DEF(jb_subb) |
| 235 |
DEF(jz_subb) |
| 236 |
DEF(jbe_subb) |
| 237 |
DEF(js_subb) |
| 238 |
DEF(jl_subb) |
| 239 |
DEF(jle_subb) |
| 240 |
DEF(setb_T0_subb) |
| 241 |
DEF(setz_T0_subb) |
| 242 |
DEF(setbe_T0_subb) |
| 243 |
DEF(sets_T0_subb) |
| 244 |
DEF(setl_T0_subb) |
| 245 |
DEF(setle_T0_subb) |
| 246 |
DEF(rolb_T0_T1_cc) |
| 247 |
DEF(rolb_T0_T1) |
| 248 |
DEF(rorb_T0_T1_cc) |
| 249 |
DEF(rorb_T0_T1) |
| 250 |
DEF(rclb_T0_T1_cc) |
| 251 |
DEF(rcrb_T0_T1_cc) |
| 252 |
DEF(shlb_T0_T1_cc) |
| 253 |
DEF(shlb_T0_T1) |
| 254 |
DEF(shrb_T0_T1_cc) |
| 255 |
DEF(shrb_T0_T1) |
| 256 |
DEF(sarb_T0_T1_cc) |
| 257 |
DEF(sarb_T0_T1) |
| 258 |
DEF(adcb_T0_T1_cc) |
| 259 |
DEF(sbbb_T0_T1_cc) |
| 260 |
DEF(cmpxchgb_T0_T1_EAX_cc) |
| 261 |
DEF(movsb) |
| 262 |
DEF(rep_movsb) |
| 263 |
DEF(stosb) |
| 264 |
DEF(rep_stosb) |
| 265 |
DEF(lodsb) |
| 266 |
DEF(rep_lodsb) |
| 267 |
DEF(scasb) |
| 268 |
DEF(repz_scasb) |
| 269 |
DEF(repnz_scasb) |
| 270 |
DEF(cmpsb) |
| 271 |
DEF(repz_cmpsb) |
| 272 |
DEF(repnz_cmpsb) |
| 273 |
DEF(outsb) |
| 274 |
DEF(rep_outsb) |
| 275 |
DEF(insb) |
| 276 |
DEF(rep_insb) |
| 277 |
DEF(outb_T0_T1) |
| 278 |
DEF(inb_T0_T1) |
| 279 |
DEF(jb_subw) |
| 280 |
DEF(jz_subw) |
| 281 |
DEF(jbe_subw) |
| 282 |
DEF(js_subw) |
| 283 |
DEF(jl_subw) |
| 284 |
DEF(jle_subw) |
| 285 |
DEF(loopnzw) |
| 286 |
DEF(loopzw) |
| 287 |
DEF(loopw) |
| 288 |
DEF(jecxzw) |
| 289 |
DEF(setb_T0_subw) |
| 290 |
DEF(setz_T0_subw) |
| 291 |
DEF(setbe_T0_subw) |
| 292 |
DEF(sets_T0_subw) |
| 293 |
DEF(setl_T0_subw) |
| 294 |
DEF(setle_T0_subw) |
| 295 |
DEF(rolw_T0_T1_cc) |
| 296 |
DEF(rolw_T0_T1) |
| 297 |
DEF(rorw_T0_T1_cc) |
| 298 |
DEF(rorw_T0_T1) |
| 299 |
DEF(rclw_T0_T1_cc) |
| 300 |
DEF(rcrw_T0_T1_cc) |
| 301 |
DEF(shlw_T0_T1_cc) |
| 302 |
DEF(shlw_T0_T1) |
| 303 |
DEF(shrw_T0_T1_cc) |
| 304 |
DEF(shrw_T0_T1) |
| 305 |
DEF(sarw_T0_T1_cc) |
| 306 |
DEF(sarw_T0_T1) |
| 307 |
DEF(shldw_T0_T1_im_cc) |
| 308 |
DEF(shldw_T0_T1_ECX_cc) |
| 309 |
DEF(shrdw_T0_T1_im_cc) |
| 310 |
DEF(shrdw_T0_T1_ECX_cc) |
| 311 |
DEF(adcw_T0_T1_cc) |
| 312 |
DEF(sbbw_T0_T1_cc) |
| 313 |
DEF(cmpxchgw_T0_T1_EAX_cc) |
| 314 |
DEF(btw_T0_T1_cc) |
| 315 |
DEF(btsw_T0_T1_cc) |
| 316 |
DEF(btrw_T0_T1_cc) |
| 317 |
DEF(btcw_T0_T1_cc) |
| 318 |
DEF(bsfw_T0_cc) |
| 319 |
DEF(bsrw_T0_cc) |
| 320 |
DEF(movsw) |
| 321 |
DEF(rep_movsw) |
| 322 |
DEF(stosw) |
| 323 |
DEF(rep_stosw) |
| 324 |
DEF(lodsw) |
| 325 |
DEF(rep_lodsw) |
| 326 |
DEF(scasw) |
| 327 |
DEF(repz_scasw) |
| 328 |
DEF(repnz_scasw) |
| 329 |
DEF(cmpsw) |
| 330 |
DEF(repz_cmpsw) |
| 331 |
DEF(repnz_cmpsw) |
| 332 |
DEF(outsw) |
| 333 |
DEF(rep_outsw) |
| 334 |
DEF(insw) |
| 335 |
DEF(rep_insw) |
| 336 |
DEF(outw_T0_T1) |
| 337 |
DEF(inw_T0_T1) |
| 338 |
DEF(jb_subl) |
| 339 |
DEF(jz_subl) |
| 340 |
DEF(jbe_subl) |
| 341 |
DEF(js_subl) |
| 342 |
DEF(jl_subl) |
| 343 |
DEF(jle_subl) |
| 344 |
DEF(loopnzl) |
| 345 |
DEF(loopzl) |
| 346 |
DEF(loopl) |
| 347 |
DEF(jecxzl) |
| 348 |
DEF(setb_T0_subl) |
| 349 |
DEF(setz_T0_subl) |
| 350 |
DEF(setbe_T0_subl) |
| 351 |
DEF(sets_T0_subl) |
| 352 |
DEF(setl_T0_subl) |
| 353 |
DEF(setle_T0_subl) |
| 354 |
DEF(roll_T0_T1_cc) |
| 355 |
DEF(roll_T0_T1) |
| 356 |
DEF(rorl_T0_T1_cc) |
| 357 |
DEF(rorl_T0_T1) |
| 358 |
DEF(rcll_T0_T1_cc) |
| 359 |
DEF(rcrl_T0_T1_cc) |
| 360 |
DEF(shll_T0_T1_cc) |
| 361 |
DEF(shll_T0_T1) |
| 362 |
DEF(shrl_T0_T1_cc) |
| 363 |
DEF(shrl_T0_T1) |
| 364 |
DEF(sarl_T0_T1_cc) |
| 365 |
DEF(sarl_T0_T1) |
| 366 |
DEF(shldl_T0_T1_im_cc) |
| 367 |
DEF(shldl_T0_T1_ECX_cc) |
| 368 |
DEF(shrdl_T0_T1_im_cc) |
| 369 |
DEF(shrdl_T0_T1_ECX_cc) |
| 370 |
DEF(adcl_T0_T1_cc) |
| 371 |
DEF(sbbl_T0_T1_cc) |
| 372 |
DEF(cmpxchgl_T0_T1_EAX_cc) |
| 373 |
DEF(btl_T0_T1_cc) |
| 374 |
DEF(btsl_T0_T1_cc) |
| 375 |
DEF(btrl_T0_T1_cc) |
| 376 |
DEF(btcl_T0_T1_cc) |
| 377 |
DEF(bsfl_T0_cc) |
| 378 |
DEF(bsrl_T0_cc) |
| 379 |
DEF(movsl) |
| 380 |
DEF(rep_movsl) |
| 381 |
DEF(stosl) |
| 382 |
DEF(rep_stosl) |
| 383 |
DEF(lodsl) |
| 384 |
DEF(rep_lodsl) |
| 385 |
DEF(scasl) |
| 386 |
DEF(repz_scasl) |
| 387 |
DEF(repnz_scasl) |
| 388 |
DEF(cmpsl) |
| 389 |
DEF(repz_cmpsl) |
| 390 |
DEF(repnz_cmpsl) |
| 391 |
DEF(outsl) |
| 392 |
DEF(rep_outsl) |
| 393 |
DEF(insl) |
| 394 |
DEF(rep_insl) |
| 395 |
DEF(outl_T0_T1) |
| 396 |
DEF(inl_T0_T1) |
| 397 |
DEF(movsbl_T0_T0) |
| 398 |
DEF(movzbl_T0_T0) |
| 399 |
DEF(movswl_T0_T0) |
| 400 |
DEF(movzwl_T0_T0) |
| 401 |
DEF(movswl_EAX_AX) |
| 402 |
DEF(movsbw_AX_AL) |
| 403 |
DEF(movslq_EDX_EAX) |
| 404 |
DEF(movswl_DX_AX) |
| 405 |
DEF(pushl_T0) |
| 406 |
DEF(pushw_T0) |
| 407 |
DEF(pushl_ss32_T0) |
| 408 |
DEF(pushw_ss32_T0) |
| 409 |
DEF(pushl_ss16_T0) |
| 410 |
DEF(pushw_ss16_T0) |
| 411 |
DEF(popl_T0) |
| 412 |
DEF(popw_T0) |
| 413 |
DEF(popl_ss32_T0) |
| 414 |
DEF(popw_ss32_T0) |
| 415 |
DEF(popl_ss16_T0) |
| 416 |
DEF(popw_ss16_T0) |
| 417 |
DEF(addl_ESP_4) |
| 418 |
DEF(addl_ESP_2) |
| 419 |
DEF(addw_ESP_4) |
| 420 |
DEF(addw_ESP_2) |
| 421 |
DEF(addl_ESP_im) |
| 422 |
DEF(addw_ESP_im) |
| 423 |
DEF(rdtsc) |
| 424 |
DEF(aam) |
| 425 |
DEF(aad) |
| 426 |
DEF(aaa) |
| 427 |
DEF(aas) |
| 428 |
DEF(daa) |
| 429 |
DEF(das) |
| 430 |
DEF(movl_seg_T0) |
| 431 |
DEF(movl_T0_seg) |
| 432 |
DEF(addl_A0_seg) |
| 433 |
DEF(jo_cc) |
| 434 |
DEF(jb_cc) |
| 435 |
DEF(jz_cc) |
| 436 |
DEF(jbe_cc) |
| 437 |
DEF(js_cc) |
| 438 |
DEF(jp_cc) |
| 439 |
DEF(jl_cc) |
| 440 |
DEF(jle_cc) |
| 441 |
DEF(seto_T0_cc) |
| 442 |
DEF(setb_T0_cc) |
| 443 |
DEF(setz_T0_cc) |
| 444 |
DEF(setbe_T0_cc) |
| 445 |
DEF(sets_T0_cc) |
| 446 |
DEF(setp_T0_cc) |
| 447 |
DEF(setl_T0_cc) |
| 448 |
DEF(setle_T0_cc) |
| 449 |
DEF(xor_T0_1) |
| 450 |
DEF(set_cc_op) |
| 451 |
DEF(movl_eflags_T0) |
| 452 |
DEF(movb_eflags_T0) |
| 453 |
DEF(movl_T0_eflags) |
| 454 |
DEF(cld) |
| 455 |
DEF(std) |
| 456 |
DEF(clc) |
| 457 |
DEF(stc) |
| 458 |
DEF(cmc) |
| 459 |
DEF(salc) |
| 460 |
DEF(flds_FT0_A0) |
| 461 |
DEF(fldl_FT0_A0) |
| 462 |
DEF(fild_FT0_A0) |
| 463 |
DEF(fildl_FT0_A0) |
| 464 |
DEF(fildll_FT0_A0) |
| 465 |
DEF(flds_ST0_A0) |
| 466 |
DEF(fldl_ST0_A0) |
| 467 |
DEF(fldt_ST0_A0) |
| 468 |
DEF(fild_ST0_A0) |
| 469 |
DEF(fildl_ST0_A0) |
| 470 |
DEF(fildll_ST0_A0) |
| 471 |
DEF(fsts_ST0_A0) |
| 472 |
DEF(fstl_ST0_A0) |
| 473 |
DEF(fstt_ST0_A0) |
| 474 |
DEF(fist_ST0_A0) |
| 475 |
DEF(fistl_ST0_A0) |
| 476 |
DEF(fistll_ST0_A0) |
| 477 |
DEF(fbld_ST0_A0) |
| 478 |
DEF(fbst_ST0_A0) |
| 479 |
DEF(fpush) |
| 480 |
DEF(fpop) |
| 481 |
DEF(fdecstp) |
| 482 |
DEF(fincstp) |
| 483 |
DEF(fmov_ST0_FT0) |
| 484 |
DEF(fmov_FT0_STN) |
| 485 |
DEF(fmov_ST0_STN) |
| 486 |
DEF(fmov_STN_ST0) |
| 487 |
DEF(fxchg_ST0_STN) |
| 488 |
DEF(fcom_ST0_FT0) |
| 489 |
DEF(fucom_ST0_FT0) |
| 490 |
DEF(fadd_ST0_FT0) |
| 491 |
DEF(fmul_ST0_FT0) |
| 492 |
DEF(fsub_ST0_FT0) |
| 493 |
DEF(fsubr_ST0_FT0) |
| 494 |
DEF(fdiv_ST0_FT0) |
| 495 |
DEF(fdivr_ST0_FT0) |
| 496 |
DEF(fadd_STN_ST0) |
| 497 |
DEF(fmul_STN_ST0) |
| 498 |
DEF(fsub_STN_ST0) |
| 499 |
DEF(fsubr_STN_ST0) |
| 500 |
DEF(fdiv_STN_ST0) |
| 501 |
DEF(fdivr_STN_ST0) |
| 502 |
DEF(fchs_ST0) |
| 503 |
DEF(fabs_ST0) |
| 504 |
DEF(fxam_ST0) |
| 505 |
DEF(fld1_ST0) |
| 506 |
DEF(fldl2t_ST0) |
| 507 |
DEF(fldl2e_ST0) |
| 508 |
DEF(fldpi_ST0) |
| 509 |
DEF(fldlg2_ST0) |
| 510 |
DEF(fldln2_ST0) |
| 511 |
DEF(fldz_ST0) |
| 512 |
DEF(fldz_FT0) |
| 513 |
DEF(f2xm1) |
| 514 |
DEF(fyl2x) |
| 515 |
DEF(fptan) |
| 516 |
DEF(fpatan) |
| 517 |
DEF(fxtract) |
| 518 |
DEF(fprem1) |
| 519 |
DEF(fprem) |
| 520 |
DEF(fyl2xp1) |
| 521 |
DEF(fsqrt) |
| 522 |
DEF(fsincos) |
| 523 |
DEF(frndint) |
| 524 |
DEF(fscale) |
| 525 |
DEF(fsin) |
| 526 |
DEF(fcos) |
| 527 |
DEF(fnstsw_A0) |
| 528 |
DEF(fnstsw_EAX) |
| 529 |
DEF(fnstcw_A0) |
| 530 |
DEF(fldcw_A0) |
| 531 |
DEF(fclex) |
| 532 |
DEF(fninit) |
| 533 |
DEF(lock) |
| 534 |
DEF(unlock) |