Revision 1cdb9c3d

b/configure
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  echo "#define CONFIG_DARWIN_USER 1" >> $config_h
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fi
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if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64"  -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el" -o "$target_cpu" = "ppc" ; then
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if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64"  -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el"; then
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  echo "CONFIG_SOFTFLOAT=yes" >> $config_mak
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  echo "#define CONFIG_SOFTFLOAT 1" >> $config_h
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fi
b/target-ppc/exec.h
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#include "cpu.h"
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#include "exec-all.h"
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/* For normal operations, precise emulation should not be needed */
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//#define USE_PRECISE_EMULATION 1
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#define USE_PRECISE_EMULATION 0
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register struct CPUPPCState *env asm(AREG0);
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#if TARGET_LONG_BITS > HOST_LONG_BITS
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/* no registers can be used */
b/target-ppc/op.c
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/* fadd - fadd. */
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void OPPROTO op_fadd (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fadd();
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#else
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    FT0 = float64_add(FT0, FT1, &env->fp_status);
......
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/* fsub - fsub. */
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void OPPROTO op_fsub (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fsub();
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#else
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    FT0 = float64_sub(FT0, FT1, &env->fp_status);
......
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/* fmul - fmul. */
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void OPPROTO op_fmul (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fmul();
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#else
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    FT0 = float64_mul(FT0, FT1, &env->fp_status);
......
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/* fdiv - fdiv. */
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void OPPROTO op_fdiv (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fdiv();
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#else
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    FT0 = float64_div(FT0, FT1, &env->fp_status);
......
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/* fmadd - fmadd. */
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void OPPROTO op_fmadd (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fmadd();
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#else
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    FT0 = float64_mul(FT0, FT1, &env->fp_status);
......
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/* fmsub - fmsub. */
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void OPPROTO op_fmsub (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_fmsub();
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#else
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    FT0 = float64_mul(FT0, FT1, &env->fp_status);
......
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/* frsp - frsp. */
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void OPPROTO op_frsp (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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    do_frsp();
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#else
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    FT0 = float64_to_float32(FT0, &env->fp_status);
b/target-ppc/op_helper.c
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}
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#endif
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_fadd (void)
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{
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    if (unlikely(float64_is_signaling_nan(FT0) ||
......
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        FT0 = float64_div(FT0, FT1, &env->fp_status);
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    }
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}
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#endif /* CONFIG_SOFTFLOAT */
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#endif /* USE_PRECISE_EMULATION */
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void do_fctiw (void)
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{
......
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        fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
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    } else {
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        p.ll = float64_to_int32(FT0, &env->fp_status);
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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        /* XXX: higher bits are not supposed to be significant.
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         *     to make tests easier, return the same as a real PowerPC 750
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         */
......
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        fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI);
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    } else {
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        p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status);
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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        /* XXX: higher bits are not supposed to be significant.
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         *     to make tests easier, return the same as a real PowerPC 750
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         */
......
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    do_fri(float_round_down);
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}
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_fmadd (void)
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{
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    if (unlikely(float64_is_signaling_nan(FT0) ||
......
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#endif
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    }
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}
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#endif /* CONFIG_SOFTFLOAT */
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#endif /* USE_PRECISE_EMULATION */
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void do_fnmadd (void)
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{
......
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        /* sNaN operation */
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        fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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    } else {
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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#ifdef FLOAT128
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        /* This is the way the PowerPC specification defines it */
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        float128 ft0_128, ft1_128;
......
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        /* sNaN operation */
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        fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN);
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    } else {
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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#ifdef FLOAT128
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        /* This is the way the PowerPC specification defines it */
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        float128 ft0_128, ft1_128;
......
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    }
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}
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_frsp (void)
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{
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    if (unlikely(float64_is_signaling_nan(FT0))) {
......
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        FT0 = float64_to_float32(FT0, &env->fp_status);
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    }
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}
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#endif /* CONFIG_SOFTFLOAT */
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#endif /* USE_PRECISE_EMULATION */
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void do_fsqrt (void)
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{
......
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        /* Zero reciprocal */
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        float_zero_divide_excp();
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    } else if (likely(isnormal(FT0))) {
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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        FT0 = float64_div(1.0, FT0, &env->fp_status);
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        FT0 = float64_to_float32(FT0, &env->fp_status);
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#else
b/target-ppc/op_helper.h
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#ifdef CONFIG_SOFTFLOAT
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void do_float_check_status (void);
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#endif
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_fadd (void);
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void do_fsub (void);
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void do_fmul (void);
......
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void do_fres (void);
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void do_frsqrte (void);
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void do_fsel (void);
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_fmadd (void);
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void do_fmsub (void);
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#endif
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void do_fnmadd (void);
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void do_fnmsub (void);
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#ifdef CONFIG_SOFTFLOAT
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#if USE_PRECISE_EMULATION
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void do_frsp (void);
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#endif
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void do_fctiw (void);

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