Revision 1cdb9c3d
b/configure | ||
---|---|---|
1224 | 1224 |
echo "#define CONFIG_DARWIN_USER 1" >> $config_h |
1225 | 1225 |
fi |
1226 | 1226 |
|
1227 |
if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el" -o "$target_cpu" = "ppc" ; then
|
|
1227 |
if test "$target_cpu" = "arm" -o "$target_cpu" = "armeb" -o "$target_cpu" = "sparc" -o "$target_cpu" = "sparc64" -o "$target_cpu" = "sparc32plus" -o "$target_cpu" = "m68k" -o "$target_cpu" = "mips" -o "$target_cpu" = "mipsel" -o "$target_cpu" = "mipsn32" -o "$target_cpu" = "mipsn32el" -o "$target_cpu" = "mips64" -o "$target_cpu" = "mips64el"; then |
|
1228 | 1228 |
echo "CONFIG_SOFTFLOAT=yes" >> $config_mak |
1229 | 1229 |
echo "#define CONFIG_SOFTFLOAT 1" >> $config_h |
1230 | 1230 |
fi |
b/target-ppc/exec.h | ||
---|---|---|
27 | 27 |
#include "cpu.h" |
28 | 28 |
#include "exec-all.h" |
29 | 29 |
|
30 |
/* For normal operations, precise emulation should not be needed */ |
|
31 |
//#define USE_PRECISE_EMULATION 1 |
|
32 |
#define USE_PRECISE_EMULATION 0 |
|
33 |
|
|
30 | 34 |
register struct CPUPPCState *env asm(AREG0); |
31 | 35 |
#if TARGET_LONG_BITS > HOST_LONG_BITS |
32 | 36 |
/* no registers can be used */ |
b/target-ppc/op.c | ||
---|---|---|
1716 | 1716 |
/* fadd - fadd. */ |
1717 | 1717 |
void OPPROTO op_fadd (void) |
1718 | 1718 |
{ |
1719 |
#ifdef CONFIG_SOFTFLOAT
|
|
1719 |
#if USE_PRECISE_EMULATION
|
|
1720 | 1720 |
do_fadd(); |
1721 | 1721 |
#else |
1722 | 1722 |
FT0 = float64_add(FT0, FT1, &env->fp_status); |
... | ... | |
1727 | 1727 |
/* fsub - fsub. */ |
1728 | 1728 |
void OPPROTO op_fsub (void) |
1729 | 1729 |
{ |
1730 |
#ifdef CONFIG_SOFTFLOAT
|
|
1730 |
#if USE_PRECISE_EMULATION
|
|
1731 | 1731 |
do_fsub(); |
1732 | 1732 |
#else |
1733 | 1733 |
FT0 = float64_sub(FT0, FT1, &env->fp_status); |
... | ... | |
1738 | 1738 |
/* fmul - fmul. */ |
1739 | 1739 |
void OPPROTO op_fmul (void) |
1740 | 1740 |
{ |
1741 |
#ifdef CONFIG_SOFTFLOAT
|
|
1741 |
#if USE_PRECISE_EMULATION
|
|
1742 | 1742 |
do_fmul(); |
1743 | 1743 |
#else |
1744 | 1744 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
... | ... | |
1749 | 1749 |
/* fdiv - fdiv. */ |
1750 | 1750 |
void OPPROTO op_fdiv (void) |
1751 | 1751 |
{ |
1752 |
#ifdef CONFIG_SOFTFLOAT
|
|
1752 |
#if USE_PRECISE_EMULATION
|
|
1753 | 1753 |
do_fdiv(); |
1754 | 1754 |
#else |
1755 | 1755 |
FT0 = float64_div(FT0, FT1, &env->fp_status); |
... | ... | |
1796 | 1796 |
/* fmadd - fmadd. */ |
1797 | 1797 |
void OPPROTO op_fmadd (void) |
1798 | 1798 |
{ |
1799 |
#ifdef CONFIG_SOFTFLOAT
|
|
1799 |
#if USE_PRECISE_EMULATION
|
|
1800 | 1800 |
do_fmadd(); |
1801 | 1801 |
#else |
1802 | 1802 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
... | ... | |
1808 | 1808 |
/* fmsub - fmsub. */ |
1809 | 1809 |
void OPPROTO op_fmsub (void) |
1810 | 1810 |
{ |
1811 |
#ifdef CONFIG_SOFTFLOAT
|
|
1811 |
#if USE_PRECISE_EMULATION
|
|
1812 | 1812 |
do_fmsub(); |
1813 | 1813 |
#else |
1814 | 1814 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
... | ... | |
1835 | 1835 |
/* frsp - frsp. */ |
1836 | 1836 |
void OPPROTO op_frsp (void) |
1837 | 1837 |
{ |
1838 |
#ifdef CONFIG_SOFTFLOAT
|
|
1838 |
#if USE_PRECISE_EMULATION
|
|
1839 | 1839 |
do_frsp(); |
1840 | 1840 |
#else |
1841 | 1841 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
b/target-ppc/op_helper.c | ||
---|---|---|
922 | 922 |
} |
923 | 923 |
#endif |
924 | 924 |
|
925 |
#ifdef CONFIG_SOFTFLOAT
|
|
925 |
#if USE_PRECISE_EMULATION
|
|
926 | 926 |
void do_fadd (void) |
927 | 927 |
{ |
928 | 928 |
if (unlikely(float64_is_signaling_nan(FT0) || |
... | ... | |
989 | 989 |
FT0 = float64_div(FT0, FT1, &env->fp_status); |
990 | 990 |
} |
991 | 991 |
} |
992 |
#endif /* CONFIG_SOFTFLOAT */
|
|
992 |
#endif /* USE_PRECISE_EMULATION */
|
|
993 | 993 |
|
994 | 994 |
void do_fctiw (void) |
995 | 995 |
{ |
... | ... | |
1003 | 1003 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
1004 | 1004 |
} else { |
1005 | 1005 |
p.ll = float64_to_int32(FT0, &env->fp_status); |
1006 |
#ifdef CONFIG_SOFTFLOAT
|
|
1006 |
#if USE_PRECISE_EMULATION
|
|
1007 | 1007 |
/* XXX: higher bits are not supposed to be significant. |
1008 | 1008 |
* to make tests easier, return the same as a real PowerPC 750 |
1009 | 1009 |
*/ |
... | ... | |
1025 | 1025 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); |
1026 | 1026 |
} else { |
1027 | 1027 |
p.ll = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
1028 |
#ifdef CONFIG_SOFTFLOAT
|
|
1028 |
#if USE_PRECISE_EMULATION
|
|
1029 | 1029 |
/* XXX: higher bits are not supposed to be significant. |
1030 | 1030 |
* to make tests easier, return the same as a real PowerPC 750 |
1031 | 1031 |
*/ |
... | ... | |
1114 | 1114 |
do_fri(float_round_down); |
1115 | 1115 |
} |
1116 | 1116 |
|
1117 |
#ifdef CONFIG_SOFTFLOAT
|
|
1117 |
#if USE_PRECISE_EMULATION
|
|
1118 | 1118 |
void do_fmadd (void) |
1119 | 1119 |
{ |
1120 | 1120 |
if (unlikely(float64_is_signaling_nan(FT0) || |
... | ... | |
1164 | 1164 |
#endif |
1165 | 1165 |
} |
1166 | 1166 |
} |
1167 |
#endif /* CONFIG_SOFTFLOAT */
|
|
1167 |
#endif /* USE_PRECISE_EMULATION */
|
|
1168 | 1168 |
|
1169 | 1169 |
void do_fnmadd (void) |
1170 | 1170 |
{ |
... | ... | |
1174 | 1174 |
/* sNaN operation */ |
1175 | 1175 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
1176 | 1176 |
} else { |
1177 |
#ifdef CONFIG_SOFTFLOAT
|
|
1177 |
#if USE_PRECISE_EMULATION
|
|
1178 | 1178 |
#ifdef FLOAT128 |
1179 | 1179 |
/* This is the way the PowerPC specification defines it */ |
1180 | 1180 |
float128 ft0_128, ft1_128; |
... | ... | |
1206 | 1206 |
/* sNaN operation */ |
1207 | 1207 |
fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); |
1208 | 1208 |
} else { |
1209 |
#ifdef CONFIG_SOFTFLOAT
|
|
1209 |
#if USE_PRECISE_EMULATION
|
|
1210 | 1210 |
#ifdef FLOAT128 |
1211 | 1211 |
/* This is the way the PowerPC specification defines it */ |
1212 | 1212 |
float128 ft0_128, ft1_128; |
... | ... | |
1230 | 1230 |
} |
1231 | 1231 |
} |
1232 | 1232 |
|
1233 |
#ifdef CONFIG_SOFTFLOAT
|
|
1233 |
#if USE_PRECISE_EMULATION
|
|
1234 | 1234 |
void do_frsp (void) |
1235 | 1235 |
{ |
1236 | 1236 |
if (unlikely(float64_is_signaling_nan(FT0))) { |
... | ... | |
1240 | 1240 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
1241 | 1241 |
} |
1242 | 1242 |
} |
1243 |
#endif /* CONFIG_SOFTFLOAT */
|
|
1243 |
#endif /* USE_PRECISE_EMULATION */
|
|
1244 | 1244 |
|
1245 | 1245 |
void do_fsqrt (void) |
1246 | 1246 |
{ |
... | ... | |
1295 | 1295 |
/* Zero reciprocal */ |
1296 | 1296 |
float_zero_divide_excp(); |
1297 | 1297 |
} else if (likely(isnormal(FT0))) { |
1298 |
#ifdef CONFIG_SOFTFLOAT
|
|
1298 |
#if USE_PRECISE_EMULATION
|
|
1299 | 1299 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
1300 | 1300 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
1301 | 1301 |
#else |
b/target-ppc/op_helper.h | ||
---|---|---|
98 | 98 |
#ifdef CONFIG_SOFTFLOAT |
99 | 99 |
void do_float_check_status (void); |
100 | 100 |
#endif |
101 |
#ifdef CONFIG_SOFTFLOAT
|
|
101 |
#if USE_PRECISE_EMULATION
|
|
102 | 102 |
void do_fadd (void); |
103 | 103 |
void do_fsub (void); |
104 | 104 |
void do_fmul (void); |
... | ... | |
109 | 109 |
void do_fres (void); |
110 | 110 |
void do_frsqrte (void); |
111 | 111 |
void do_fsel (void); |
112 |
#ifdef CONFIG_SOFTFLOAT
|
|
112 |
#if USE_PRECISE_EMULATION
|
|
113 | 113 |
void do_fmadd (void); |
114 | 114 |
void do_fmsub (void); |
115 | 115 |
#endif |
116 | 116 |
void do_fnmadd (void); |
117 | 117 |
void do_fnmsub (void); |
118 |
#ifdef CONFIG_SOFTFLOAT
|
|
118 |
#if USE_PRECISE_EMULATION
|
|
119 | 119 |
void do_frsp (void); |
120 | 120 |
#endif |
121 | 121 |
void do_fctiw (void); |
Also available in: Unified diff