Revision 1d0a48fb target-ppc/cpu.h
b/target-ppc/cpu.h | ||
---|---|---|
528 | 528 |
typedef struct ppc_spr_t ppc_spr_t; |
529 | 529 |
typedef struct ppc_dcr_t ppc_dcr_t; |
530 | 530 |
typedef struct ppc_avr_t ppc_avr_t; |
531 |
typedef struct ppc_tlb_t ppc_tlb_t;
|
|
531 |
typedef union ppc_tlb_t ppc_tlb_t;
|
|
532 | 532 |
|
533 | 533 |
/* SPR access micro-ops generations callbacks */ |
534 | 534 |
struct ppc_spr_t { |
... | ... | |
547 | 547 |
}; |
548 | 548 |
|
549 | 549 |
/* Software TLB cache */ |
550 |
struct ppc_tlb_t { |
|
550 |
typedef struct ppc6xx_tlb_t ppc6xx_tlb_t; |
|
551 |
struct ppc6xx_tlb_t { |
|
551 | 552 |
target_ulong pte0; |
552 | 553 |
target_ulong pte1; |
553 | 554 |
target_ulong EPN; |
555 |
}; |
|
556 |
|
|
557 |
typedef struct ppcemb_tlb_t ppcemb_tlb_t; |
|
558 |
struct ppcemb_tlb_t { |
|
559 |
target_ulong RPN; |
|
560 |
target_ulong EPN; |
|
554 | 561 |
target_ulong PID; |
555 | 562 |
int size; |
563 |
int prot; |
|
564 |
int attr; /* Storage attributes */ |
|
565 |
}; |
|
566 |
|
|
567 |
union ppc_tlb_t { |
|
568 |
ppc6xx_tlb_t tlb6; |
|
569 |
ppcemb_tlb_t tlbe; |
|
556 | 570 |
}; |
557 | 571 |
|
558 | 572 |
/*****************************************************************************/ |
... | ... | |
729 | 743 |
int nb_pids; /* Number of available PID registers */ |
730 | 744 |
ppc_tlb_t *tlb; /* TLB is optional. Allocate them only if needed */ |
731 | 745 |
/* Callbacks for specific checks on some implementations */ |
732 |
int (*tlb_check_more)(CPUPPCState *env, struct ppc_tlb_t *tlb, int *prot,
|
|
746 |
int (*tlb_check_more)(CPUPPCState *env, ppc_tlb_t *tlb, int *prot, |
|
733 | 747 |
target_ulong vaddr, int rw, int acc_type, |
734 | 748 |
int is_user); |
735 | 749 |
/* 403 dedicated access protection registers */ |
Also available in: Unified diff