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root / tcg @ 1d58ee9f

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  arm
  hppa
  i386
  ppc
  ppc64
  sparc
  x86_64
LICENSE 146 Bytes
README 12.1 kB
TODO 423 Bytes
tcg-dyngen.c 12.4 kB
tcg-op.h 46 kB
tcg-opc.h 7.5 kB
tcg-runtime.c 1.9 kB
tcg.c 61.8 kB
tcg.h 13.3 kB

Latest revisions

# Date Author Comment
1d58ee9f 07/23/2008 11:01 pm malc

Remove stray "i" from mul_i64

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4933 c046a42c-6fe2-441c-8c8c-71466251a162

810260a8 07/23/2008 10:17 pm malc

Preliminary PPC64/Linux host support

ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2

Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...
...

d643ccca 07/07/2008 11:15 pm bellard

64 bit signed comparison fix (Juergen Lock)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162

d795eb86 07/07/2008 10:34 pm blueswir1

Fix 64 bit constant generation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162

e924c485 07/04/2008 02:49 am malc

Fuse EQ and NE handling in tcg_out_brcond2

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4845 c046a42c-6fe2-441c-8c8c-71466251a162

8c5e95d8 07/03/2008 09:51 pm malc

Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4841 c046a42c-6fe2-441c-8c8c-71466251a162

a50f5b91 06/29/2008 06:25 pm pbrook

Suppress bogus compiler warnings.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162

ca88500f 06/23/2008 08:47 am malc

According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4779 c046a42c-6fe2-441c-8c8c-71466251a162

a35e86c5 06/23/2008 08:47 am malc

Shuffle contents of tcg_target_reg_alloc_order

Move reserved/volatile registers down. Currently qemu_ld/stXX are
marked with TCG_OPF_CALL_CLOBBER and since memory accesses are
frequent and R3 through R12 are volatile moving this down results in
less spills and tighter generated code....

17ca26e7 06/18/2008 04:58 am malc

Save LR into proper place on callers stack frame

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4745 c046a42c-6fe2-441c-8c8c-71466251a162

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