Revision 1d914fa0 hw/mc146818rtc.c
| b/hw/mc146818rtc.c | ||
|---|---|---|
| 28 | 28 |
#include "apic.h" |
| 29 | 29 |
#include "isa.h" |
| 30 | 30 |
#include "hpet_emul.h" |
| 31 |
#include "mc146818rtc.h" |
|
| 31 | 32 |
|
| 32 | 33 |
//#define DEBUG_CMOS |
| 33 | 34 |
|
| ... | ... | |
| 65 | 66 |
#define REG_C_PF 0x40 |
| 66 | 67 |
#define REG_C_AF 0x20 |
| 67 | 68 |
|
| 68 |
struct RTCState {
|
|
| 69 |
typedef struct RTCState {
|
|
| 69 | 70 |
ISADevice dev; |
| 70 | 71 |
uint8_t cmos_data[128]; |
| 71 | 72 |
uint8_t cmos_index; |
| ... | ... | |
| 85 | 86 |
QEMUTimer *coalesced_timer; |
| 86 | 87 |
QEMUTimer *second_timer; |
| 87 | 88 |
QEMUTimer *second_timer2; |
| 88 |
}; |
|
| 89 |
} RTCState;
|
|
| 89 | 90 |
|
| 90 | 91 |
static void rtc_irq_raise(qemu_irq irq) |
| 91 | 92 |
{
|
| ... | ... | |
| 492 | 493 |
} |
| 493 | 494 |
} |
| 494 | 495 |
|
| 495 |
void rtc_set_memory(RTCState *s, int addr, int val)
|
|
| 496 |
void rtc_set_memory(ISADevice *dev, int addr, int val)
|
|
| 496 | 497 |
{
|
| 498 |
RTCState *s = DO_UPCAST(RTCState, dev, dev); |
|
| 497 | 499 |
if (addr >= 0 && addr <= 127) |
| 498 | 500 |
s->cmos_data[addr] = val; |
| 499 | 501 |
} |
| 500 | 502 |
|
| 501 |
void rtc_set_date(RTCState *s, const struct tm *tm)
|
|
| 503 |
void rtc_set_date(ISADevice *dev, const struct tm *tm)
|
|
| 502 | 504 |
{
|
| 505 |
RTCState *s = DO_UPCAST(RTCState, dev, dev); |
|
| 503 | 506 |
s->current_tm = *tm; |
| 504 | 507 |
rtc_copy_date(s); |
| 505 | 508 |
} |
| ... | ... | |
| 508 | 511 |
#define REG_IBM_CENTURY_BYTE 0x32 |
| 509 | 512 |
#define REG_IBM_PS2_CENTURY_BYTE 0x37 |
| 510 | 513 |
|
| 511 |
static void rtc_set_date_from_host(RTCState *s)
|
|
| 514 |
static void rtc_set_date_from_host(ISADevice *dev)
|
|
| 512 | 515 |
{
|
| 516 |
RTCState *s = DO_UPCAST(RTCState, dev, dev); |
|
| 513 | 517 |
struct tm tm; |
| 514 | 518 |
int val; |
| 515 | 519 |
|
| 516 | 520 |
/* set the CMOS date */ |
| 517 | 521 |
qemu_get_timedate(&tm, 0); |
| 518 |
rtc_set_date(s, &tm);
|
|
| 522 |
rtc_set_date(dev, &tm);
|
|
| 519 | 523 |
|
| 520 | 524 |
val = rtc_to_bcd(s, (tm.tm_year / 100) + 19); |
| 521 |
rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
|
|
| 522 |
rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
|
|
| 525 |
rtc_set_memory(dev, REG_IBM_CENTURY_BYTE, val);
|
|
| 526 |
rtc_set_memory(dev, REG_IBM_PS2_CENTURY_BYTE, val);
|
|
| 523 | 527 |
} |
| 524 | 528 |
|
| 525 | 529 |
static int rtc_post_load(void *opaque, int version_id) |
| ... | ... | |
| 591 | 595 |
s->cmos_data[RTC_REG_C] = 0x00; |
| 592 | 596 |
s->cmos_data[RTC_REG_D] = 0x80; |
| 593 | 597 |
|
| 594 |
rtc_set_date_from_host(s);
|
|
| 598 |
rtc_set_date_from_host(dev);
|
|
| 595 | 599 |
|
| 596 | 600 |
s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s); |
| 597 | 601 |
#ifdef TARGET_I386 |
| ... | ... | |
| 614 | 618 |
return 0; |
| 615 | 619 |
} |
| 616 | 620 |
|
| 617 |
RTCState *rtc_init(int base_year)
|
|
| 621 |
ISADevice *rtc_init(int base_year)
|
|
| 618 | 622 |
{
|
| 619 | 623 |
ISADevice *dev; |
| 620 | 624 |
|
| 621 | 625 |
dev = isa_create("mc146818rtc");
|
| 622 | 626 |
qdev_prop_set_int32(&dev->qdev, "base_year", base_year); |
| 623 | 627 |
qdev_init_nofail(&dev->qdev); |
| 624 |
return DO_UPCAST(RTCState, dev, dev);
|
|
| 628 |
return dev;
|
|
| 625 | 629 |
} |
| 626 | 630 |
|
| 627 | 631 |
static ISADeviceInfo mc146818rtc_info = {
|
Also available in: Unified diff