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root / target-ppc @ 1e6784f9

Name Size
STATUS 9 kB
cpu.h 45.1 kB
exec.h 3.8 kB
helper.c 82.6 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op.c 48.4 kB
op_helper.c 64.1 kB
op_helper.h 11.3 kB
op_helper_mem.h 9.4 kB
op_mem.h 34.7 kB
op_template.h 3.8 kB
translate.c 211.2 kB
translate_init.c 234.1 kB

Latest revisions

# Date Author Comment
1e6784f9 09/30/2007 06:19 pm j_mayer

Fix PowerPC TLB miss dump code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3295 c046a42c-6fe2-441c-8c8c-71466251a162
068abdc8 09/30/2007 05:52 pm j_mayer

Fix inconsistent end conditions in ppc_find_xxx functions.
(crash reported by Andreas Farber when using default CPU).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3293 c046a42c-6fe2-441c-8c8c-71466251a162
be147d08 09/30/2007 04:03 pm j_mayer
  • Update OEA environment, following the PowerPC 2.04 specification:
    - New mtmsr/mtmsrd form that just update RI and EE bits
    - New hrfid, lq and stq instructions
    - Add support for supervisor and hypervisor modes process priority update
    - Code provision for hypervisor SPR accesses...
0db1b20e 09/30/2007 06:46 am j_mayer Synchronize with latest PowerPC ISA VEA:
  • fix invalid instructions bits masks
  • new wait instruction
  • more comments about effect of cache instructions on the MMU

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
c80f84e3 09/30/2007 04:18 am j_mayer

Implement Process Priority Register as defined in the PowerPC 2.04 spec.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3282 c046a42c-6fe2-441c-8c8c-71466251a162
d7e4b87e 09/30/2007 04:11 am j_mayer

Implement new floating-point instructions (fre, frin, friz, frip, frim)
as defined in the PowerPC 2.04 specification.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3281 c046a42c-6fe2-441c-8c8c-71466251a162
477023a6 09/30/2007 04:01 am j_mayer

Improve single-precision floats load & stores:
as the PowerPC registers only store double-precision floats,
use float64_to_float32 & float32_to_float64 to do the appropriate conversion.
Implement stfiwx.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3280 c046a42c-6fe2-441c-8c8c-71466251a162
bfa1e5cf 09/30/2007 03:50 am j_mayer

XER is to be treated as a 64 bits register on 64 bits implementations,
according to the PowerPC 2.04 specification.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3279 c046a42c-6fe2-441c-8c8c-71466251a162
a062e36c 09/30/2007 03:38 am j_mayer

Implement the PowerPC alternate time-base, following the 2.04 specification.
Share most code with the time-base management routines.
Remove time-base write routines from user-mode emulation environments.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
dee96f6c 09/29/2007 06:02 pm j_mayer

PowerPC emulation optimization:
avoid stopping translation after most SPR updates
when a context-synchronization instruction is also needed.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3265 c046a42c-6fe2-441c-8c8c-71466251a162

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