Revision 1eed09cb hw/palm.c
| b/hw/palm.c | ||
|---|---|---|
| 216 | 216 |
cpu_register_physical_memory(OMAP_CS0_BASE, flash_size, |
| 217 | 217 |
(phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM); |
| 218 | 218 |
|
| 219 |
io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
|
|
| 219 |
io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val); |
|
| 220 | 220 |
cpu_register_physical_memory(OMAP_CS0_BASE + flash_size, |
| 221 | 221 |
OMAP_CS0_SIZE - flash_size, io); |
| 222 |
io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
|
|
| 222 |
io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val); |
|
| 223 | 223 |
cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io); |
| 224 |
io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
|
|
| 224 |
io = cpu_register_io_memory(static_readfn, static_writefn, &cs2val); |
|
| 225 | 225 |
cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io); |
| 226 |
io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
|
|
| 226 |
io = cpu_register_io_memory(static_readfn, static_writefn, &cs3val); |
|
| 227 | 227 |
cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io); |
| 228 | 228 |
|
| 229 | 229 |
palmte_microwire_setup(cpu); |
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