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/*
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 *  PPC emulation helpers for qemu.
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 * 
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 *  Copyright (c) 2003 Jocelyn Mayer
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
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 */
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#include <math.h>
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#include "exec.h"
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#define MEMSUFFIX _raw
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#include "op_helper_mem.h"
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper_mem.h"
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#define MEMSUFFIX _kernel
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#include "op_helper_mem.h"
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#endif
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void do_queue_exception_err (uint32_t exception, int error_code)
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{
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    /* Queue real PPC exceptions */
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    if (exception < EXCP_PPC_MAX) {
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        env->exceptions |= 1 << exception;
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        env->errors[exception] = error_code;
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    } else {
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        /* Preserve compatibility with qemu core */
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        env->exceptions |= 1;
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        env->exception_index = exception;
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        env->error_code = error_code;
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    }
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}
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void do_queue_exception (uint32_t exception)
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{
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    do_queue_exception_err(exception, 0);
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}
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void do_check_exception_state (void)
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{
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    if ((env->exceptions & 1) == 1 || check_exception_state(env)) {
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        env->exceptions &= ~1;
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        cpu_loop_exit();
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    }
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}
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/*****************************************************************************/
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/* Helpers for "fat" micro operations */
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/* Special registers load and store */
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void do_load_cr (void)
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{
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    T0 = (env->crf[0] << 28) |
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        (env->crf[1] << 24) |
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        (env->crf[2] << 20) |
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        (env->crf[3] << 16) |
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        (env->crf[4] << 12) |
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        (env->crf[5] << 8) |
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        (env->crf[6] << 4) |
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        (env->crf[7] << 0);
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}
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void do_store_cr (uint32_t mask)
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{
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    int i, sh;
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    for (i = 0, sh = 7; i < 8; i++, sh --) {
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        if (mask & (1 << sh))
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            env->crf[i] = (T0 >> (sh * 4)) & 0xF;
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    }
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}
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void do_load_xer (void)
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{
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    T0 = (xer_so << XER_SO) |
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        (xer_ov << XER_OV) |
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        (xer_ca << XER_CA) |
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        (xer_bc << XER_BC);
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}
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void do_store_xer (void)
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{
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    xer_so = (T0 >> XER_SO) & 0x01;
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    xer_ov = (T0 >> XER_OV) & 0x01;
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    xer_ca = (T0 >> XER_CA) & 0x01;
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    xer_bc = (T0 >> XER_BC) & 0x1f;
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}
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void do_load_msr (void)
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{
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    T0 = (msr_pow << MSR_POW) |
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        (msr_ile << MSR_ILE) |
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        (msr_ee << MSR_EE) |
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        (msr_pr << MSR_PR) |
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        (msr_fp << MSR_FP) |
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        (msr_me << MSR_ME) |
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        (msr_fe0 << MSR_FE0) |
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        (msr_se << MSR_SE) |
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        (msr_be << MSR_BE) |
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        (msr_fe1 << MSR_FE1) |
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        (msr_ip << MSR_IP) |
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        (msr_ir << MSR_IR) |
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        (msr_dr << MSR_DR) |
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        (msr_ri << MSR_RI) |
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        (msr_le << MSR_LE);
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}
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void do_store_msr (void)
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{
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    if (((T0 >> MSR_IR) & 0x01) != msr_ir ||
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        ((T0 >> MSR_DR) & 0x01) != msr_dr) {
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        /* Flush all tlb when changing translation mode or privilege level */
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        do_tlbia();
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    }
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#if 0
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    if ((T0 >> MSR_IP) & 0x01) {
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        printf("Halting CPU. Stop emulation\n");
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        do_queue_exception(EXCP_HLT);
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        cpu_loop_exit();
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    }
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#endif
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    msr_pow = (T0 >> MSR_POW) & 0x03;
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    msr_ile = (T0 >> MSR_ILE) & 0x01;
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    msr_ee = (T0 >> MSR_EE) & 0x01;
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    msr_pr = (T0 >> MSR_PR) & 0x01;
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    msr_fp = (T0 >> MSR_FP) & 0x01;
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    msr_me = (T0 >> MSR_ME) & 0x01;
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    msr_fe0 = (T0 >> MSR_FE0) & 0x01;
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    msr_se = (T0 >> MSR_SE) & 0x01;
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    msr_be = (T0 >> MSR_BE) & 0x01;
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    msr_fe1 = (T0 >> MSR_FE1) & 0x01;
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    msr_ip = (T0 >> MSR_IP) & 0x01;
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    msr_ir = (T0 >> MSR_IR) & 0x01;
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    msr_dr = (T0 >> MSR_DR) & 0x01;
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    msr_ri = (T0 >> MSR_RI) & 0x01;
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    msr_le = (T0 >> MSR_LE) & 0x01;
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}
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/* shift right arithmetic helper */
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void do_sraw (void)
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{
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    int32_t ret;
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    xer_ca = 0;
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    if (T1 & 0x20) {
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        ret = (-1) * (T0 >> 31);
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        if (ret < 0)
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            xer_ca = 1;
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    } else {
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        ret = (int32_t)T0 >> (T1 & 0x1f);
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        if (ret < 0 && ((int32_t)T0 & ((1 << T1) - 1)) != 0)
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            xer_ca = 1;
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    }
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    (int32_t)T0 = ret;
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}
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/* Floating point operations helpers */
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void do_load_fpscr (void)
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{
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    /* The 32 MSB of the target fpr are undefined.
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     * They'll be zero...
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     */
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    union {
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        double d;
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        struct {
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            uint32_t u[2];
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        } s;
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    } u;
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    int i;
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    u.s.u[0] = 0;
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    u.s.u[1] = 0;
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    for (i = 0; i < 8; i++)
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        u.s.u[1] |= env->fpscr[i] << (4 * i);
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    FT0 = u.d;
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}
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void do_store_fpscr (uint32_t mask)
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{
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    /*
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     * We use only the 32 LSB of the incoming fpr
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     */
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    union {
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        double d;
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        struct {
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            uint32_t u[2];
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        } s;
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    } u;
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    int i;
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    u.d = FT0;
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    if (mask & 0x80)
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        env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[1] >> 28) & ~0x9);
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    for (i = 1; i < 7; i++) {
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        if (mask & (1 << (7 - i)))
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            env->fpscr[i] = (u.s.u[1] >> (4 * (7 - i))) & 0xF;
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    }
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    /* TODO: update FEX & VX */
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    /* Set rounding mode */
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    switch (env->fpscr[0] & 0x3) {
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    case 0:
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        /* Best approximation (round to nearest) */
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        fesetround(FE_TONEAREST);
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        break;
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    case 1:
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        /* Smaller magnitude (round toward zero) */
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        fesetround(FE_TOWARDZERO);
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        break;
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    case 2:
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        /* Round toward +infinite */
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        fesetround(FE_UPWARD);
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        break;
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    case 3:
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        /* Round toward -infinite */
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        fesetround(FE_DOWNWARD);
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        break;
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    }
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}
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void do_fctiw (void)
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{
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    union {
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        double d;
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        uint64_t i;
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    } *p = (void *)&FT1;
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    if (FT0 > (double)0x7FFFFFFF)
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        p->i = 0x7FFFFFFFULL << 32;
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    else if (FT0 < -(double)0x80000000)
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        p->i = 0x80000000ULL << 32;
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    else
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        p->i = 0;
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    p->i |= (uint32_t)FT0;
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    FT0 = p->d;
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}
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void do_fctiwz (void)
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{
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    union {
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        double d;
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        uint64_t i;
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    } *p = (void *)&FT1;
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    int cround = fegetround();
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    fesetround(FE_TOWARDZERO);
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    if (FT0 > (double)0x7FFFFFFF)
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        p->i = 0x7FFFFFFFULL << 32;
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    else if (FT0 < -(double)0x80000000)
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        p->i = 0x80000000ULL << 32;
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    else
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        p->i = 0;
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    p->i |= (uint32_t)FT0;
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    FT0 = p->d;
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    fesetround(cround);
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}
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void do_fnmadds (void)
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{
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    FTS0 = -((FTS0 * FTS1) + FTS2);
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}
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void do_fnmsubs (void)
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{
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    FTS0 = -((FTS0 * FTS1) - FTS2);
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}
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void do_fsqrt (void)
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{
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    FT0 = sqrt(FT0);
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}
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void do_fsqrts (void)
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{
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    FT0 = (float)sqrt((float)FT0);
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}
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void do_fres (void)
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{
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    FT0 = 1.0 / FT0;
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}
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void do_fsqrte (void)
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{
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    FT0 = 1.0 / sqrt(FT0);
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}
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void do_fsel (void)
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{
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    if (FT0 >= 0)
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        FT0 = FT2;
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    else
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        FT0 = FT1;
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}
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void do_fcmpu (void)
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{
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    env->fpscr[4] &= ~0x1;
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    if (isnan(FT0) || isnan(FT1)) {
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        T0 = 0x01;
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        env->fpscr[4] |= 0x1;
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        env->fpscr[6] |= 0x1;
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    } else if (FT0 < FT1) {
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        T0 = 0x08;
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    } else if (FT0 > FT1) {
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        T0 = 0x04;
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    } else {
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        T0 = 0x02;
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    }
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    env->fpscr[3] |= T0;
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}
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void do_fcmpo (void)
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{
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    env->fpscr[4] &= ~0x1;
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    if (isnan(FT0) || isnan(FT1)) {
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        T0 = 0x01;
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        env->fpscr[4] |= 0x1;
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        /* I don't know how to test "quiet" nan... */
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        if (0 /* || ! quiet_nan(...) */) {
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            env->fpscr[6] |= 0x1;
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            if (!(env->fpscr[1] & 0x8))
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                env->fpscr[4] |= 0x8;
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        } else {
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            env->fpscr[4] |= 0x8;
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        }
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    } else if (FT0 < FT1) {
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        T0 = 0x08;
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    } else if (FT0 > FT1) {
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        T0 = 0x04;
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    } else {
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        T0 = 0x02;
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    }
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    env->fpscr[3] |= T0;
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}
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void do_fabs (void)
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{
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    FT0 = fabsl(FT0);
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}
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void do_fnabs (void)
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{
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    FT0 = -fabsl(FT0);
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}
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/* Instruction cache invalidation helper */
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#define ICACHE_LINE_SIZE 32
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void do_icbi (void)
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{
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    /* Invalidate one cache line */
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    T0 &= ~(ICACHE_LINE_SIZE - 1);
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    tb_invalidate_page_range(T0, T0 + ICACHE_LINE_SIZE);
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}
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/* TLB invalidation helpers */
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void do_tlbia (void)
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{
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    tlb_flush(env, 1);
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}
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void do_tlbie (void)
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{
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    tlb_flush_page(env, T0);
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}
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/*****************************************************************************/
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/* Special helpers for debug */
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extern FILE *stdout;
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void dump_state (void)
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{
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    cpu_ppc_dump_state(env, stdout, 0);
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}
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void dump_rfi (void)
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{
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#if 0
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    printf("Return from interrupt %d => 0x%08x\n", pos, env->nip);
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    //    cpu_ppc_dump_state(env, stdout, 0);
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#endif
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}
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void dump_store_sr (int srnum)
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{
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#if 0
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    printf("%s: reg=%d 0x%08x\n", __func__, srnum, T0);
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#endif
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}
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static void _dump_store_bat (char ID, int ul, int nr)
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{
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    printf("Set %cBAT%d%c to 0x%08x (0x%08x)\n",
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           ID, nr, ul == 0 ? 'u' : 'l', T0, env->nip);
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}
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void dump_store_ibat (int ul, int nr)
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{
412
    _dump_store_bat('I', ul, nr);
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}
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void dump_store_dbat (int ul, int nr)
416
{
417
    _dump_store_bat('D', ul, nr);
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}
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void dump_store_tb (int ul)
421
{
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    printf("Set TB%c to 0x%08x\n", ul == 0 ? 'L' : 'U', T0);
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}
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void dump_update_tb(uint32_t param)
426
{
427
#if 0
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    printf("Update TB: 0x%08x + %d => 0x%08x\n", T1, param, T0);
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#endif
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}
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